From: Qi Zhang <qi.z.zhang@intel.com>
To: beilei.xing@intel.com
Cc: dev@dpdk.org, jingjing.wu@intel.com, Qi Zhang <qi.z.zhang@intel.com>
Subject: [dpdk-dev] [PATCH 08/25] net/i40e/base: code refactoring for LED blink
Date: Sun, 7 Jan 2018 22:43:18 -0500 [thread overview]
Message-ID: <1515383015-28042-9-git-send-email-qi.z.zhang@intel.com> (raw)
In-Reply-To: <1515383015-28042-1-git-send-email-qi.z.zhang@intel.com>
Code refactory, wrap repeated code in function.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/i40e/base/i40e_common.c | 202 ++++++++++++++++--------------------
1 file changed, 87 insertions(+), 115 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index 7e7fa228c..626534a50 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -6687,6 +6687,64 @@ enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw,
return status;
}
+/**
+ * i40e_led_get_reg - read LED register
+ * @hw: pointer to the HW structure
+ * @led_addr: LED register address
+ * @reg_val: read register value
+ **/
+static enum i40e_status_code i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr,
+ u32 *reg_val)
+{
+ enum i40e_status_code status;
+ u8 phy_addr = 0;
+
+ *reg_val = 0;
+ if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+ status = i40e_aq_get_phy_register(hw,
+ I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+ I40E_PHY_COM_REG_PAGE,
+ I40E_PHY_LED_PROV_REG_1,
+ reg_val, NULL);
+ } else {
+ phy_addr = i40e_get_phy_address(hw, hw->port);
+ status = i40e_read_phy_register_clause45(hw,
+ I40E_PHY_COM_REG_PAGE,
+ led_addr, phy_addr,
+ (u16 *)reg_val);
+ }
+ return status;
+}
+
+/**
+ * i40e_led_set_reg - write LED register
+ * @hw: pointer to the HW structure
+ * @led_addr: LED register address
+ * @reg_val: register value to write
+ **/
+static enum i40e_status_code i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr,
+ u32 reg_val)
+{
+ enum i40e_status_code status;
+ u8 phy_addr = 0;
+
+ if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+ status = i40e_aq_set_phy_register(hw,
+ I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+ I40E_PHY_COM_REG_PAGE,
+ I40E_PHY_LED_PROV_REG_1,
+ reg_val, NULL);
+ } else {
+ phy_addr = i40e_get_phy_address(hw, hw->port);
+ status = i40e_write_phy_register_clause45(hw,
+ I40E_PHY_COM_REG_PAGE,
+ led_addr, phy_addr,
+ (u16)reg_val);
+ }
+
+ return status;
+}
+
/**
* i40e_led_get_phy - return current on/off mode
* @hw: pointer to the hw struct
@@ -6699,43 +6757,35 @@ enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,
{
enum i40e_status_code status = I40E_SUCCESS;
u16 gpio_led_port;
+ u32 reg_val_aq;
+ u16 temp_addr;
u8 phy_addr = 0;
u16 reg_val;
- u16 temp_addr;
- u8 port_num;
- u32 i;
- u32 reg_val_aq;
if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status =
- i40e_aq_get_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- ®_val_aq, NULL);
- if (status)
- return status;
- *val = (u16)reg_val_aq;
- } else {
- temp_addr = I40E_PHY_LED_PROV_REG_1;
- i = rd32(hw, I40E_PFGEN_PORTNUM);
- port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
- phy_addr = i40e_get_phy_address(hw, port_num);
-
- for (gpio_led_port = 0; gpio_led_port < 3; gpio_led_port++,
- temp_addr++) {
- status =
- i40e_read_phy_register_clause45(hw,
+ status = i40e_aq_get_phy_register(hw,
+ I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+ I40E_PHY_COM_REG_PAGE,
+ I40E_PHY_LED_PROV_REG_1,
+ ®_val_aq, NULL);
+ if (status == I40E_SUCCESS)
+ *val = (u16)reg_val_aq;
+ return status;
+ }
+ temp_addr = I40E_PHY_LED_PROV_REG_1;
+ phy_addr = i40e_get_phy_address(hw, hw->port);
+ for (gpio_led_port = 0; gpio_led_port < 3; gpio_led_port++,
+ temp_addr++) {
+ status = i40e_read_phy_register_clause45(hw,
I40E_PHY_COM_REG_PAGE,
temp_addr, phy_addr,
®_val);
- if (status)
- return status;
- *val = reg_val;
- if (reg_val & I40E_PHY_LED_LINK_MODE_MASK) {
- *led_addr = temp_addr;
- break;
- }
+ if (status)
+ return status;
+ *val = reg_val;
+ if (reg_val & I40E_PHY_LED_LINK_MODE_MASK) {
+ *led_addr = temp_addr;
+ break;
}
}
return status;
@@ -6755,113 +6805,35 @@ enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
enum i40e_status_code status = I40E_SUCCESS;
u32 led_ctl = 0;
u32 led_reg = 0;
- u8 phy_addr = 0;
- u8 port_num;
- u32 i;
- if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status =
- i40e_aq_get_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- &led_reg, NULL);
- } else {
- i = rd32(hw, I40E_PFGEN_PORTNUM);
- port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
- phy_addr = i40e_get_phy_address(hw, port_num);
- status = i40e_read_phy_register_clause45(hw,
- I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16 *)&led_reg);
- }
+ status = i40e_led_get_reg(hw, led_addr, &led_reg);
if (status)
return status;
led_ctl = led_reg;
if (led_reg & I40E_PHY_LED_LINK_MODE_MASK) {
led_reg = 0;
- if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
- hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {
- status = i40e_aq_set_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- led_reg, NULL);
- } else {
- status = i40e_write_phy_register_clause45(hw,
- I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16)led_reg);
- }
+ status = i40e_led_set_reg(hw, led_addr, led_reg);
if (status)
return status;
}
- if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status =
- i40e_aq_get_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- &led_reg, NULL);
- } else {
- status = i40e_read_phy_register_clause45(hw,
- I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16 *)&led_reg);
- }
+ status = i40e_led_get_reg(hw, led_addr, &led_reg);
if (status)
goto restore_config;
if (on)
led_reg = I40E_PHY_LED_MANUAL_ON;
else
led_reg = 0;
-
- if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status =
- i40e_aq_set_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- led_reg, NULL);
- } else {
- status =
- i40e_write_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16)led_reg);
- }
+ status = i40e_led_set_reg(hw, led_addr, led_reg);
if (status)
goto restore_config;
if (mode & I40E_PHY_LED_MODE_ORIG) {
led_ctl = (mode & I40E_PHY_LED_MODE_MASK);
- if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status = i40e_aq_set_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- led_ctl, NULL);
- } else {
- status = i40e_write_phy_register_clause45(hw,
- I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16)led_ctl);
- }
+ status = i40e_led_set_reg(hw, led_addr, led_ctl);
}
return status;
+
restore_config:
- if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
- status =
- i40e_aq_set_phy_register(hw,
- I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
- I40E_PHY_COM_REG_PAGE,
- I40E_PHY_LED_PROV_REG_1,
- led_ctl, NULL);
- } else {
- status =
- i40e_write_phy_register_clause45(hw,
- I40E_PHY_COM_REG_PAGE,
- led_addr, phy_addr,
- (u16)led_ctl);
- }
+ status = i40e_led_set_reg(hw, led_addr, led_ctl);
return status;
}
#endif /* PF_DRIVER */
--
2.14.1
next prev parent reply other threads:[~2018-01-08 10:52 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-08 3:43 [dpdk-dev] [PATCH 00/25] net/i40e: update base code Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 01/25] net/i40e/base: add new PHY type Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 02/25] net/i40e/base: add capability macros Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 03/25] net/i40e/base: add (Q)SFP module memory access definitions Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 04/25] net/i40e/base: release spinlock before function returns Qi Zhang
2018-01-09 6:32 ` Xing, Beilei
2018-01-08 3:43 ` [dpdk-dev] [PATCH 05/25] net/i40e/base: retry AQC to overcome IRCRead hangs Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 06/25] net/i40e/base: add byte swaps in PHY register access Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 07/25] net/i40e/base: add macro for 25G device Qi Zhang
2018-01-08 3:43 ` Qi Zhang [this message]
2018-01-08 3:43 ` [dpdk-dev] [PATCH 09/25] net/i40e/base: add link speed convert function Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 10/25] net/i40e/base: add AQ command for DCB parameters Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 11/25] net/i40e/base: fix NVM lock Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 12/25] net/i40e/base: code clean Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 13/25] net/i40e/base: add NVM update preservation flags Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 14/25] net/i40e/base: enable AQ event get in NVM update Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 15/25] net/i40e/base: fix link LED blink Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 16/25] net/i40e/base: add defines for flat NVM Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 17/25] net/i40e/base: enhanced loopback AQ command Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 18/25] net/i40e/base: add rearrange process " Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 19/25] net/i40e/base: add AQ critical error type Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 20/25] net/i40e/base: fix compile issue for GCC 6.3 Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 21/25] net/i40e/base: code clean Qi Zhang
2018-01-09 6:21 ` Xing, Beilei
2018-01-08 3:43 ` [dpdk-dev] [PATCH 22/25] net/i40e/base: fix reading LLDP configuration Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 23/25] net/i40e/base: fix unaligned data issue Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 24/25] net/i40e: rename a field Qi Zhang
2018-01-08 3:43 ` [dpdk-dev] [PATCH 25/25] net/i40e/base: update README file Qi Zhang
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