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From: Rosen Xu <rosen.xu@intel.com>
To: dev@dpdk.org
Cc: declan.doherty@intel.com, tianfei.zhang@intel.com
Subject: [dpdk-dev] [RFC 2/4] lib/librte_eal/common:Add Intel FPGA Bus Running Command Parse Code
Date: Tue,  6 Mar 2018 09:43:56 +0800	[thread overview]
Message-ID: <1520300638-134954-3-git-send-email-rosen.xu@intel.com> (raw)
In-Reply-To: <1520300638-134954-1-git-send-email-rosen.xu@intel.com>

Signed-off-by: Rosen Xu <rosen.xu@intel.com>
---
 lib/librte_eal/common/eal_common_options.c | 8 +++++++-
 lib/librte_eal/common/eal_options.h        | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c
index 9f2f8d2..1158d21 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -73,6 +73,7 @@
 	{OPT_VDEV,              1, NULL, OPT_VDEV_NUM             },
 	{OPT_VFIO_INTR,         1, NULL, OPT_VFIO_INTR_NUM        },
 	{OPT_VMWARE_TSC_MAP,    0, NULL, OPT_VMWARE_TSC_MAP_NUM   },
+	{OPT_IFPGA,             1, NULL, OPT_IFPGA_NUM            },
 	{0,                     0, NULL, 0                        }
 };
 
@@ -1160,7 +1161,12 @@ static int xdigit2val(unsigned char c)
 
 		core_parsed = LCORE_OPT_MAP;
 		break;
-
+    case OPT_IFPGA_NUM:
+	    if (eal_option_device_add(RTE_DEVTYPE_VIRTUAL,
+	    		optarg) < 0) {
+	    	return -1;
+	    }
+	    break;
 	/* don't know what to do, leave this to caller */
 	default:
 		return 1;
diff --git a/lib/librte_eal/common/eal_options.h b/lib/librte_eal/common/eal_options.h
index e86c711..bdbb2c4 100644
--- a/lib/librte_eal/common/eal_options.h
+++ b/lib/librte_eal/common/eal_options.h
@@ -55,6 +55,8 @@ enum {
 	OPT_VFIO_INTR_NUM,
 #define OPT_VMWARE_TSC_MAP    "vmware-tsc-map"
 	OPT_VMWARE_TSC_MAP_NUM,
+#define OPT_IFPGA              "ifpga"
+	OPT_IFPGA_NUM,
 	OPT_LONG_MAX_NUM
 };
 
-- 
1.8.3.1

  parent reply	other threads:[~2018-03-06  1:42 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-06  1:43 [dpdk-dev] [RFC 0/4] Intel FPGA Bus Rosen Xu
2018-03-06  1:43 ` [dpdk-dev] [RFC 1/4] drivers/bus/ifpga:Intel FPGA Bus Lib Code Rosen Xu
2018-03-06  6:09   ` Shreyansh Jain
2018-03-06  9:24     ` Xu, Rosen
2018-03-06 10:05   ` Gaëtan Rivet
2018-03-09 15:34     ` Xu, Rosen
2018-03-06  1:43 ` Rosen Xu [this message]
2018-03-06  1:43 ` [dpdk-dev] [RFC 3/4] lib/librte_eal/common: Add Intel FPGA Bus Second Scan, it should be scanned after PCI Bus Rosen Xu
2018-03-06  6:20   ` Shreyansh Jain
2018-03-06 10:42     ` Xu, Rosen
2018-03-06 10:46       ` Gaëtan Rivet
2018-03-06 11:36         ` Bruce Richardson
2018-03-06 11:59           ` Gaëtan Rivet
2018-03-15  1:17             ` Xu, Rosen
2018-03-15  1:29           ` Xu, Rosen
2018-03-06  1:43 ` [dpdk-dev] [RFC 4/4] drivers/raw/ifpga_rawdev: Rawdev for Intel FPGA Device, it's a PCI Driver of FPGA Device Manager Rosen Xu
2018-03-06  6:48   ` Shreyansh Jain
2018-03-06  7:21     ` Shreyansh Jain
2018-03-07  4:10     ` Zhang, Tianfei

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