From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <nipun.gupta@nxp.com>
Received: from EUR01-DB5-obe.outbound.protection.outlook.com
(mail-db5eur01hn0207.outbound.protection.outlook.com [104.47.2.207])
by dpdk.org (Postfix) with ESMTP id 8132A1CA6A
for <dev@dpdk.org>; Sat, 7 Apr 2018 17:17:41 +0200 (CEST)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;
h=From:Date:Subject:Message-ID:Content-Type:MIME-Version;
bh=rx41358K6Xa55GTtlSqLySPriE8UnbedMejezY6JxcA=;
b=RLuT3z35Xp87SPSUaIPHrENwYh7EEXbPyGkYJe0eQlCjE28Uf+xxoP0hHfxCk3LRT8oARy1CaHSjFxIZhSZ9nFF6vju/nn7xw0lIkZfFftWCz3pC7WJCFWa/bnZaezJzZsHKBw41avFLV9/ViPHaU2fhHKYeJ0yUiE/0u6ANyrQ=
Authentication-Results: spf=none (sender IP is )
smtp.mailfrom=nipun.gupta@nxp.com;
Received: from b27504-OptiPlex-790.ap.freescale.net (14.142.187.166) by
HE1PR0401MB2425.eurprd04.prod.outlook.com (2603:10a6:3:25::22) with Microsoft
SMTP Server (version=TLS1_2,
cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.631.10; Sat, 7
Apr 2018 15:17:38 +0000
From: Nipun Gupta <nipun.gupta@nxp.com>
To: thomas@monjalon.net,
hemant.agrawal@nxp.com,
shreyansh.jain@nxp.com
Cc: dev@dpdk.org,
Nipun Gupta <nipun.gupta@nxp.com>
Date: Sat, 7 Apr 2018 20:47:00 +0530
Message-Id: <1523114224-9852-5-git-send-email-nipun.gupta@nxp.com>
X-Mailer: git-send-email 1.9.1
In-Reply-To: <1523114224-9852-1-git-send-email-nipun.gupta@nxp.com>
References: <1523114224-9852-1-git-send-email-nipun.gupta@nxp.com>
MIME-Version: 1.0
Content-Type: text/plain
X-Originating-IP: [14.142.187.166]
X-ClientProxiedBy: BM1PR0101CA0058.INDPRD01.PROD.OUTLOOK.COM
(2603:1096:b00:19::20) To HE1PR0401MB2425.eurprd04.prod.outlook.com
(2603:10a6:3:25::22)
X-MS-PublicTrafficType: Email
X-MS-Office365-Filtering-Correlation-Id: 1f8aa6f7-9d1f-4f37-4eb3-08d59c9ab3a2
X-MS-Office365-Filtering-HT: Tenant
X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0;
RULEID:(7020095)(4652020)(5600026)(4604075)(48565401081)(4534165)(7168020)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020);
SRVR:HE1PR0401MB2425;
X-Microsoft-Exchange-Diagnostics: 1; HE1PR0401MB2425;
3:sPfczvFfihNqCoYN338Ep4m215klLI2Rj3RXvHeKNj9WxcNhZ1mW13M47D3KrMS3DmPbP4+SeWHpXO+ZqIJC+SETjgQUN+4puGdEr/uxJwoo9RhCk89CdZZF2C0eIa9x5xJMM9TGOqLYcdVWgiwQCKb7vSgBjbzBOdj2Qt5KGYnczowYfUeVKRDFnatWkLDD5L9a5x3/oIVdh0lXCYqX+RjtTarBsz1qUj0dSoffq92tZsx/8EgONuJZLhuu4Ryg;
25:xjOiu7sRsVmSSGFJXFi1rBqZzC/g7rRm6mEN+70/hLxyYs43hCJyj8wIgDPH2d/soRFeILrtGZXiBNz9ChMMHYzUOgDb4PZrQDUxaB/t566M3rvzL5pReVfjG+h1vgqkW83i/rxsK1YA2hPMHdATov0TJ128j6HFNtoKjQ10N3aujh+YaKd5kfzNGzc6h7CBOUDk9SKyn33WP9/ywcx4N1fsY8eV6laMpzkp4M0cUFEJ+zwihQ6ryoqHVkZ4Ovu8qS8g0bPtKvvJJi1ayvhNW+YjY9pI+3rtfE8uqZqjoQuQLGaklh50yVNLo2dJu2qTj58FLlWLezUKBLQ8qXCsPQ==;
31:4I5PEVns4eRUiz/jyaS2ynZtok5wqsX9K4sPtpaQnKcZqiGrfwlo8kdsyIdALJgm4cR1La8wJDN5GPvpfH0ROSvI7nb53H+oSS7gkb8Ryby5W2W59CebH+uSF9AwvcrBVnlvgoqI/RlWdipXlJMSnt/R1fvxeDz5/SJsiPVIq3DuHAOsJUhLsuWibZ5QDQiwdJQBj9Z9g/7kZ54a25TdPm6kBzfZWx87Ki5yPh29PLA=
X-MS-TrafficTypeDiagnostic: HE1PR0401MB2425:
X-Microsoft-Exchange-Diagnostics: 1; HE1PR0401MB2425;
20:0UhNyBWCX6mMM3DaIQ/O9X0jkcmORAbxaZ5IgGNcrEc2WjIqaWE+FZNPUs9eJ66Z4pfhwD/s2f1SuqoLAajx+JzHY2yQ3IJE46QgpZlVbn0jBrAXskEzBz/1+qwRvOpdMciJ4SmkE98DzYdbkOeWkxPhCBX5wb/soUJ+iQqpTFgqygoHXyZ+SvMtQYzpRzs28GS6gipUbsh0KURRSSZt6HuX+I1XHDZP3r01VxCMTZeEFLCeQbS5IWBpMc4X9su5EGEf7mauOrcH5751GdEa+ljzfW5BEQHAmDnkw+R9cr9ETmzgmeNt8IFPdYTYBBgbJ3Nrk8G/FsSQPbxT7hgCkcq1sOcvzaEqDNSctytAGG3H29Gk6JopbLVM4dg32kwH6yyzBSAGIllLFInfkl/mfzkxsT0AnJrUZV12DXvCfu7yT/pIP6byyUm/D38jcCMO0QCvjgsDTlw+EGbbiVZ7Kw5puBOuFyrpnjEQK+tKQZSsAD5HgGXEadC83c2IlZRj;
4:4agbVFPVmwHBjxX40lR6GqF2fQMG4H1HgB+BU1aijPmNc+WpAVAVtae/p/ffOOmdd8xvk2CKd/DLDKaoGIafXXUIwQI/QiOjgtE9F5RHuo94znmtD+32iXgXLFjlAK7s4WxsHj8qmtKZeVGbJpkNJjE8to2wslyRLGqXkQ/ZoeySGOWjlJ7tTQem80lGbmb2dE2rHJLPYcTwFilGWYD09GH/Nqx3Foacpy0ds9k7MKZLtWgwULSxmXP/CZjYDzSb8H0aRa/U46L1XWuYVUhhgW775HzvSs4Rm0G+qBVX6UCaeebEKsS8i2kNy2K77po0dAgyusjbqH5SSd5BsuCJQ5VqVbdQq+w7KL3h/8hjjWfJPIc4ROE6bf7Bse31C8Rm
X-Microsoft-Antispam-PRVS: <HE1PR0401MB2425E29686C8CCAAFB40DCFBE6B90@HE1PR0401MB2425.eurprd04.prod.outlook.com>
X-Exchange-Antispam-Report-Test: UriScan:(185117386973197)(66839620246622)(275809806118684);
X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0;
RULEID:(8211001083)(6040522)(2401047)(8121501046)(5005006)(3231221)(2232076)(944501327)(52105095)(93006095)(93001095)(3002001)(10201501046)(6055026)(6041310)(20161123562045)(20161123560045)(20161123558120)(20161123564045)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(6072148)(201708071742011);
SRVR:HE1PR0401MB2425; BCL:0; PCL:0; RULEID:; SRVR:HE1PR0401MB2425;
X-Forefront-PRVS: 0635D5275E
X-Forefront-Antispam-Report: SFV:SPM;
SFS:(10009020)(39380400002)(376002)(39860400002)(366004)(396003)(346002)(199004)(189003)(2616005)(36756003)(6506007)(52116002)(6512007)(4326008)(478600001)(50226002)(66066001)(51416003)(76176011)(386003)(8936002)(50466002)(97736004)(6116002)(5660300001)(6666003)(86362001)(7736002)(305945005)(47776003)(6636002)(59450400001)(3846002)(5009440100003)(48376002)(16526019)(316002)(81166006)(106356001)(53936002)(55236004)(16586007)(68736007)(26005)(8676002)(25786009)(6486002)(186003)(2906002)(81156014)(486006)(446003)(476003)(105586002)(956004)(11346002)(59010400001);
DIR:OUT; SFP:1501; SCL:5; SRVR:HE1PR0401MB2425;
H:b27504-OptiPlex-790.ap.freescale.net; FPR:; SPF:None; LANG:en;
PTR:InfoNoRecords; A:1; MX:1;
Received-SPF: None (protection.outlook.com: nxp.com does not designate
permitted sender hosts)
X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; HE1PR0401MB2425;
23:3eowGpTv6SDY173PvBWRujOSBTO/PLIZE3CHp5M?=
=?us-ascii?Q?nRuR0kqZ8TFdReYChMJAfxttoZGEeKD/wPFemLYPFBxkQl19AD9oXIm93zcN?=
=?us-ascii?Q?TTQft9GRB3O1tdAZRcv+ogZgd1WMb+xnhctNNHmQ9oYSLNNVCkVL0QbsB0o8?=
=?us-ascii?Q?EqWmMibSOi8J6USPJVagG8m1KPASrtqieg1/AIoT1YlP9u4FMn2Oint/Qre5?=
=?us-ascii?Q?1R4F/2XLCHpI2nQN7xYKaDtDa0SROnBQ5Sp+WB/lW9xd1qAGAevY17H9LFHb?=
=?us-ascii?Q?EpeM+j/PfegIunK6se9o1wvxwUAmCsNC+GvfxhmO3nPb7OrhDgNXQjiMc+wb?=
=?us-ascii?Q?O5g8FOFVbAKPMBIP2G2Dd/v5DCAcriYIod7UUH0PqeS+gtEZPgXLLrwYXxVT?=
=?us-ascii?Q?UEAG7do1ky7vX5DVf4dxRsxNbMIo1vqJvBIt3Vx+6ODLDFnG1muk+ft6hvh1?=
=?us-ascii?Q?6KlWi1QPRWi7EnWlx/9Cpf4jyWTpc3Jciy0WtqIJfR35fjjuJazWKwOfSABz?=
=?us-ascii?Q?TKwCKhYGQ28XqQ5JqH/ydF6N4jC3z3v0X95V7KDipYukuBRiepViX6oOK72D?=
=?us-ascii?Q?IbnRrAtZ2i+HbOWWEB9v14b03fPQp01yLo/lEbkCbVjMWu0/JaZ7CYjKjXik?=
=?us-ascii?Q?l44oCNFBbpg6OPsavAZAta1wK+OXZuKKoPYIpTEigjFp7hXRSC73EBF1lQFj?=
=?us-ascii?Q?uo9OAqRuAXhFdubCJaG3OH9IlQm+BbA8WDjN+wo+ZtRO+BOLPFiwymLA/M+z?=
=?us-ascii?Q?qXMXEHFdK8tK2LOvxUEFjSScsj71Ih5amGx3o9PQXwpC+6cN1NoC0FR9h/ea?=
=?us-ascii?Q?7ICdBWETWzseKmHh8/Ee0F4+XEKW4fLqyC0oFoY5bCgm+2OEiMpsHeLW92Nj?=
=?us-ascii?Q?deEsl5CJadWIzF2UN2VccdaiVLC3SKHhg0iM3tIFmN16z/ffzl5SdVTMcmkp?=
=?us-ascii?Q?WeXpa9TNW5fM3DwR5ddVX8vxkXw34uLRGLlgfhnKgy8xwOlSX+gqFhOgAWcX?=
=?us-ascii?Q?jSoLwFiqILDNau5cDlnItzW9psx50ZuTfms9GZXDbn9a0ypRg/718X3jRzGp?=
=?us-ascii?Q?5Dhl4Xgt11r58dLEm13TkKdwFp6WLT/3GFiisfo404YdFsuLunxyw7B4qx30?=
=?us-ascii?Q?iZDCY5nVEouqLMzqTSMnHet2+BSnzpJVLiZiMSS1Pa2ZrK7Vb+FNqiISBrgZ?=
=?us-ascii?Q?YD7Q+zaIhVL2KGnJHsESjO5qj2QtWKU6FvztDV7wnGToZbV3eLbLqBMZ2kR4?=
=?us-ascii?Q?xlpbZ3GOo/UvU5ChDuUqxGvj4BMdUJZu5YO4CZZ0h8qXiY4aSJLZiNyUVzO9?=
=?us-ascii?Q?lhnyCzOisLtNNLGgQF5ruPnw=3D?=
X-Microsoft-Antispam-Message-Info: xpoH/X9EpSEqxp00CxUaR0I/fVtzing5W9Pp4OTZVX99uInfFEfSZ4s/jPuLtpMeMsJpwDF7oORrxcSr5uRp8e/j+lSCPS6PZMeLRaCrM1/Wr6RJn+8zBnheYFAUTXev2jlS8XWfcfnX4gnDrvhp8JyFI24tf4ljg69fhuLq8ErpUcioK/PBi4w86EfxFOqJywXacZo/8hKJy5DOGQRW8e/rgmBRB0MZO2TZ4Twzk2anE1dd/YCePYwrKD+VDRE6qdQbT+JTdsgIMFF0GCvEdsbvkSDPKiNOOhVf3TrQpZ50sk8nR2oqhq+RyshjQzZ+WiEl28rOxMGI2Vu+fo1PqLGJKd3vszkqvhAoigJ0+szs6vt145haelWWK8yabQOy+ykj+dShMAalN+qI3lY/nDpNq/w/P+kokTeQjOAgP0/6hsBS1puA/KekDAUxhVTM+3tsVfJko43kDLvbSAwvYOvXMCq40EZeh4DxyIsC1Mh2H1LOqY4uNWufAegkpbZD
X-Microsoft-Exchange-Diagnostics: 1; HE1PR0401MB2425;
6:N5IuRfPiizEm16s2SQN8XSobmDUQqjE3lfo9KGsdSTUssNUavRHOjvq/dZD7K1burw5u10WIImhmWFD5gplnkJT3MKre5h8kQv1DP0K82lNpxzQwManI7LKJexDuBU4XeySXB+j4H4swHP8+you54Z2OK+VOA7UorlA09xz9/nhwCSCtNr336qzA/Je+nRwZfDDFh4BVo189KNhGGwS37lfr2nnMde/NsJW3q0rtC8kbFMhvB2KqcTvHz+iT1DWxs1cpGW5k8mMYlIbVtbkruH8Z3oez5FvWI7ukUDrazZsAPolv8J3xDc/IN2tHRv7oUKguwcQwpwSVAz//l/fKdpUk7Eg+tohJkW/G+QWZu6qoaxPWQXTKab224fIs/C1Rsw72L6haYr7ZHEt2zfWbT3n0BIctqRhIlk3RonxD7NiF74S8NrEfHSHDGUdIV0sG6/9VQKjUJTc3+DAmzjgVL/KADnW4GZdHXVXrdl4Q/0BYfcAWtIGjp+zsdio/sGz5;
5:2EBIdVrVM6/G0RMvJwTBQ0XymudMSu3mqN3bqVJl/EdgXbfzMg7V71S7Iwkuzxmc4ah/ccubCCeZ9bSB9CbmO2Sv6EO67qA8tC1ZZzc7vI9JyIKNEUzFlmo594R+ehsSHDpkCZZ58Y7dn34qSDcfv1O+ma4Yf3tOBesrDRv2n94=;
24:cX7BKMALG334tLAFMeNum+oEq/prVxjSEn4jBfX1zRbmveKOQTnvPHPYj9Wz4DHf1XdOTprLUh/EDQMSiZtmSQ==
SpamDiagnosticOutput: 1:22
X-Microsoft-Exchange-Diagnostics: 1; HE1PR0401MB2425;
7:wJ8OUVtruV9FFhaZ97AIb7ULjIkp5YqYMHHbP+pmVFTR9JNFAVVNugHZvAL+CVORmBUPclR0ySkjIm+/VMKtEC//m67kZs0cK4IIfUTOgwrJY4gxYEDhexEW0Kh2gq99TkM62Gf3OMQS4H7/1alLySsSDbexfF87nR6Er3tOOqNz1125ttbdOdQEC2OjkdXNCo1y/fjOOfgN9jlg3eyaoR7zPd02z/xelMOl4hQhXzD3LigfWOhr23mvJZr7G1W+
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Apr 2018 15:17:38.1854 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 1f8aa6f7-9d1f-4f37-4eb3-08d59c9ab3a2
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0401MB2425
Subject: [dpdk-dev] [PATCH 4/8] raw/dpaa2_qdma: introduce the DPAA2 QDMA
driver
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://dpdk.org/ml/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://dpdk.org/ml/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Sat, 07 Apr 2018 15:17:41 -0000
DPAA2 QDMA driver uses MC DPDMAI object. This driver enables
the user (app) to perform data DMA without involving CPU in
the DMA process
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
MAINTAINERS | 5 +
config/common_base | 1 +
config/common_linuxapp | 1 +
drivers/raw/Makefile | 1 +
drivers/raw/dpaa2_qdma/Makefile | 34 +++
drivers/raw/dpaa2_qdma/dpaa2_qdma.c | 290 +++++++++++++++++++++
drivers/raw/dpaa2_qdma/dpaa2_qdma.h | 66 +++++
drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h | 33 +++
.../raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map | 4 +
mk/rte.app.mk | 1 +
10 files changed, 436 insertions(+)
create mode 100644 drivers/raw/dpaa2_qdma/Makefile
create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma.c
create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma.h
create mode 100644 drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h
create mode 100644 drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9ef5902..fccf5bb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -772,6 +772,11 @@ F: drivers/event/opdl/
F: doc/guides/eventdevs/opdl.rst
+DPAA2 QDMA
+M: Nipun Gupta <nipun.gupta@nxp.com>
+F: drivers/raw/dpaa2_qdma/
+
+
Packet processing
-----------------
diff --git a/config/common_base b/config/common_base
index 9c4361f..956fbc1 100644
--- a/config/common_base
+++ b/config/common_base
@@ -192,6 +192,7 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
CONFIG_RTE_LIBRTE_DPAA2_PMD=n
CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF=n
+CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA=n
#
# Compile burst-oriented Amazon ENA PMD driver
diff --git a/config/common_linuxapp b/config/common_linuxapp
index f25b3ea..0c6a1ce 100644
--- a/config/common_linuxapp
+++ b/config/common_linuxapp
@@ -38,3 +38,4 @@ CONFIG_RTE_LIBRTE_DPAA2_PMD=y
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF=y
+CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA=y
diff --git a/drivers/raw/Makefile b/drivers/raw/Makefile
index de3e662..7b5dcc3 100644
--- a/drivers/raw/Makefile
+++ b/drivers/raw/Makefile
@@ -7,6 +7,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
DIRS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV) += skeleton_rawdev
ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)
DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF) += dpaa2_cmdif
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += dpaa2_qdma
endif
include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/raw/dpaa2_qdma/Makefile b/drivers/raw/dpaa2_qdma/Makefile
new file mode 100644
index 0000000..f81ee08
--- /dev/null
+++ b/drivers/raw/dpaa2_qdma/Makefile
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2018 NXP
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_dpaa2_qdma.a
+
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+
+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc
+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include
+
+LDLIBS += -lrte_bus_fslmc
+LDLIBS += -lrte_eal
+LDLIBS += -lrte_mempool
+LDLIBS += -lrte_rawdev
+LDLIBS += -lrte_ring
+
+EXPORT_MAP := rte_pmd_dpaa2_qdma_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += dpaa2_qdma.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.c b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
new file mode 100644
index 0000000..4b7fa13
--- /dev/null
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.c
@@ -0,0 +1,290 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ */
+
+#include <string.h>
+
+#include <rte_eal.h>
+#include <rte_fslmc.h>
+#include <rte_atomic.h>
+#include <rte_lcore.h>
+#include <rte_rawdev.h>
+#include <rte_rawdev_pmd.h>
+#include <rte_malloc.h>
+#include <rte_ring.h>
+#include <rte_mempool.h>
+
+#include <mc/fsl_dpdmai.h>
+#include <portal/dpaa2_hw_pvt.h>
+#include <portal/dpaa2_hw_dpio.h>
+
+#include "dpaa2_qdma.h"
+#include "dpaa2_qdma_logs.h"
+
+/* Dynamic log type identifier */
+int dpaa2_qdma_logtype;
+
+/* QDMA device */
+static struct qdma_device qdma_dev;
+
+/* QDMA H/W queues list */
+TAILQ_HEAD(qdma_hw_queue_list, qdma_hw_queue);
+static struct qdma_hw_queue_list qdma_queue_list
+ = TAILQ_HEAD_INITIALIZER(qdma_queue_list);
+
+static const struct rte_rawdev_ops dpaa2_qdma_ops = {
+};
+
+static int
+add_hw_queues_to_list(struct dpaa2_dpdmai_dev *dpdmai_dev)
+{
+ struct qdma_hw_queue *queue;
+ int i;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ for (i = 0; i < dpdmai_dev->num_queues; i++) {
+ queue = rte_zmalloc(NULL, sizeof(struct qdma_hw_queue), 0);
+ if (!queue) {
+ DPAA2_QDMA_ERR(
+ "Memory allocation failed for QDMA queue\n");
+ return -ENOMEM;
+ }
+
+ queue->dpdmai_dev = dpdmai_dev;
+ queue->queue_id = i;
+
+ TAILQ_INSERT_TAIL(&qdma_queue_list, queue, next);
+ qdma_dev.num_hw_queues++;
+ }
+
+ return 0;
+}
+
+static int
+remove_hw_queues_from_list(struct dpaa2_dpdmai_dev *dpdmai_dev)
+{
+ struct qdma_hw_queue *queue;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ while ((queue = TAILQ_FIRST(&qdma_queue_list))) {
+ if (queue->dpdmai_dev == dpdmai_dev) {
+ TAILQ_REMOVE(&qdma_queue_list, queue, next);
+ rte_free(queue);
+ }
+ }
+
+ return 0;
+}
+
+static int
+dpaa2_dpdmai_dev_init(struct rte_rawdev *rawdev, int dpdmai_id)
+{
+ struct dpaa2_dpdmai_dev *dpdmai_dev = rawdev->dev_private;
+ struct dpdmai_rx_queue_cfg rx_queue_cfg;
+ struct dpdmai_attr attr;
+ struct dpdmai_rx_queue_attr rx_attr;
+ struct dpdmai_tx_queue_attr tx_attr;
+ int ret, i;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ /* Open DPDMAI device */
+ dpdmai_dev->dpdmai_id = dpdmai_id;
+ dpdmai_dev->dpdmai.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX];
+ ret = dpdmai_open(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->dpdmai_id, &dpdmai_dev->token);
+ if (ret) {
+ DPAA2_QDMA_ERR("dpdmai_open() failed with err: %d\n", ret);
+ return ret;
+ }
+ DPAA2_QDMA_DEBUG("Opened dpdmai object successfully\n");
+
+ /* Get DPDMAI attributes */
+ ret = dpdmai_get_attributes(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->token, &attr);
+ if (ret) {
+ DPAA2_QDMA_ERR("dpdmai get attributes failed with err: %d\n",
+ ret);
+ return ret;
+ }
+ dpdmai_dev->num_queues = attr.num_of_priorities;
+
+ /* Set up Rx Queues */
+ for (i = 0; i < attr.num_of_priorities; i++) {
+ struct dpaa2_queue *rxq;
+
+ memset(&rx_queue_cfg, 0, sizeof(struct dpdmai_rx_queue_cfg));
+ ret = dpdmai_set_rx_queue(&dpdmai_dev->dpdmai,
+ CMD_PRI_LOW,
+ dpdmai_dev->token,
+ i, &rx_queue_cfg);
+ if (ret) {
+ DPAA2_QDMA_ERR("Setting Rx queue failed with err: %d",
+ ret);
+ return ret;
+ }
+
+ /* Allocate DQ storage for the DPDMAI Rx queues */
+ rxq = &(dpdmai_dev->rx_queue[i]);
+ rxq->q_storage = rte_malloc("dq_storage",
+ sizeof(struct queue_storage_info_t),
+ RTE_CACHE_LINE_SIZE);
+ if (!rxq->q_storage) {
+ DPAA2_QDMA_ERR("q_storage allocation failed\n");
+ return -ENOMEM;
+ }
+
+ memset(rxq->q_storage, 0, sizeof(struct queue_storage_info_t));
+ ret = dpaa2_alloc_dq_storage(rxq->q_storage);
+ if (ret) {
+ DPAA2_QDMA_ERR("dpaa2_alloc_dq_storage failed\n");
+ return -ENOMEM;
+ }
+ }
+
+ /* Get Rx and Tx queues FQID's */
+ for (i = 0; i < DPDMAI_PRIO_NUM; i++) {
+ ret = dpdmai_get_rx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->token, i, &rx_attr);
+ if (ret) {
+ DPAA2_QDMA_ERR("Reading device failed with err: %d",
+ ret);
+ return ret;
+ }
+ dpdmai_dev->rx_queue[i].fqid = rx_attr.fqid;
+
+ ret = dpdmai_get_tx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->token, i, &tx_attr);
+ if (ret) {
+ DPAA2_QDMA_ERR("Reading device failed with err: %d",
+ ret);
+ return ret;
+ }
+ dpdmai_dev->tx_queue[i].fqid = tx_attr.fqid;
+ }
+
+ /* Enable the device */
+ ret = dpdmai_enable(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->token);
+ if (ret) {
+ DPAA2_QDMA_ERR("Enabling device failed with err: %d", ret);
+ return ret;
+ }
+
+ /* Add the HW queue to the global list */
+ ret = add_hw_queues_to_list(dpdmai_dev);
+ if (ret) {
+ DPAA2_QDMA_ERR("Adding H/W queue to list failed\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+dpaa2_dpdmai_dev_uninit(struct rte_rawdev *rawdev)
+{
+ struct dpaa2_dpdmai_dev *dpdmai_dev = rawdev->dev_private;
+ int ret, i;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ /* Remove HW queues from global list */
+ remove_hw_queues_from_list(dpdmai_dev);
+
+ ret = dpdmai_disable(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
+ dpdmai_dev->token);
+ if (ret)
+ DPAA2_QDMA_ERR("dmdmai disable failed");
+
+ /* Set up the DQRR storage for Rx */
+ for (i = 0; i < DPDMAI_PRIO_NUM; i++) {
+ struct dpaa2_queue *rxq = &(dpdmai_dev->rx_queue[i]);
+
+ dpaa2_free_dq_storage(rxq->q_storage);
+ rte_free(rxq->q_storage);
+ }
+
+ /* Close the device at underlying layer*/
+ ret = dpdmai_close(&dpdmai_dev->dpdmai, CMD_PRI_LOW, dpdmai_dev->token);
+ if (ret)
+ DPAA2_QDMA_ERR("Failure closing dpdmai device");
+
+ return 0;
+}
+
+static int
+rte_dpaa2_qdma_probe(struct rte_dpaa2_driver *dpaa2_drv,
+ struct rte_dpaa2_device *dpaa2_dev)
+{
+ struct rte_rawdev *rawdev;
+ int ret;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ rawdev = rte_rawdev_pmd_allocate(dpaa2_dev->device.name,
+ sizeof(struct dpaa2_dpdmai_dev),
+ rte_socket_id());
+ if (!rawdev) {
+ DPAA2_QDMA_ERR("Unable to allocate rawdevice\n");
+ return -EINVAL;
+ }
+
+ dpaa2_dev->rawdev = rawdev;
+ rawdev->dev_ops = &dpaa2_qdma_ops;
+ rawdev->device = &dpaa2_dev->device;
+ rawdev->driver_name = dpaa2_drv->driver.name;
+
+ /* For secondary processes, the primary has done all the work */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ /* Invoke PMD device initialization function */
+ ret = dpaa2_dpdmai_dev_init(rawdev, dpaa2_dev->object_id);
+ if (ret) {
+ rte_rawdev_pmd_release(rawdev);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+rte_dpaa2_qdma_remove(struct rte_dpaa2_device *dpaa2_dev)
+{
+ struct rte_rawdev *rawdev = dpaa2_dev->rawdev;
+ int ret;
+
+ DPAA2_QDMA_FUNC_TRACE();
+
+ dpaa2_dpdmai_dev_uninit(rawdev);
+
+ ret = rte_rawdev_pmd_release(rawdev);
+ if (ret)
+ DPAA2_QDMA_DEBUG("Device cleanup failed");
+
+ return 0;
+}
+
+static struct rte_dpaa2_driver rte_dpaa2_qdma_pmd = {
+ .drv_type = DPAA2_QDMA,
+ .probe = rte_dpaa2_qdma_probe,
+ .remove = rte_dpaa2_qdma_remove,
+};
+
+RTE_PMD_REGISTER_DPAA2(dpaa2_qdma, rte_dpaa2_qdma_pmd);
+
+RTE_INIT(dpaa2_qdma_init_log);
+
+static void
+dpaa2_qdma_init_log(void)
+{
+ dpaa2_qdma_logtype = rte_log_register("dpaa2.qdma");
+ if (dpaa2_qdma_logtype >= 0)
+ rte_log_set_level(dpaa2_qdma_logtype, RTE_LOG_INFO);
+}
diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.h b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h
new file mode 100644
index 0000000..8b3b1b9
--- /dev/null
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ */
+
+#ifndef __DPAA2_QDMA_H__
+#define __DPAA2_QDMA_H__
+
+/**
+ * Represents a QDMA device.
+ * A single QDMA device exists which is combination of multiple DPDMAI rawdev's.
+ */
+struct qdma_device {
+ /** total number of hw queues. */
+ uint16_t num_hw_queues;
+ /**
+ * Maximum number of hw queues to be alocated per core.
+ * This is limited by MAX_HW_QUEUE_PER_CORE
+ */
+ uint16_t max_hw_queues_per_core;
+ /** Maximum number of VQ's */
+ uint16_t max_vqs;
+ /** mode of operation - physical(h/w) or virtual */
+ uint8_t mode;
+ /** Device state - started or stopped */
+ uint8_t state;
+ /** FLE pool for the device */
+ struct rte_mempool *fle_pool;
+ /** FLE pool size */
+ int fle_pool_count;
+ /** A lock to QDMA device whenever required */
+ rte_spinlock_t lock;
+};
+
+/** Represents a QDMA H/W queue */
+struct qdma_hw_queue {
+ /** Pointer to Next instance */
+ TAILQ_ENTRY(qdma_hw_queue) next;
+ /** DPDMAI device to communicate with HW */
+ struct dpaa2_dpdmai_dev *dpdmai_dev;
+ /** queue ID to communicate with HW */
+ uint16_t queue_id;
+ /** Associated lcore id */
+ uint32_t lcore_id;
+ /** Number of users of this hw queue */
+ uint32_t num_users;
+};
+
+/** Represents a DPDMAI raw device */
+struct dpaa2_dpdmai_dev {
+ /** Pointer to Next device instance */
+ TAILQ_ENTRY(dpaa2_qdma_device) next;
+ /** handle to DPDMAI object */
+ struct fsl_mc_io dpdmai;
+ /** HW ID for DPDMAI object */
+ uint32_t dpdmai_id;
+ /** Tocken of this device */
+ uint16_t token;
+ /** Number of queue in this DPDMAI device */
+ uint8_t num_queues;
+ /** RX queues */
+ struct dpaa2_queue rx_queue[DPDMAI_PRIO_NUM];
+ /** TX queues */
+ struct dpaa2_queue tx_queue[DPDMAI_PRIO_NUM];
+};
+
+#endif /* __DPAA2_QDMA_H__ */
diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h b/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h
new file mode 100644
index 0000000..20902a8
--- /dev/null
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma_logs.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ */
+
+#ifndef __DPAA2_QDMA_LOGS_H__
+#define __DPAA2_QDMA_LOGS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern int dpaa2_qdma_logtype;
+
+#define DPAA2_QDMA_LOG(level, fmt, args...) \
+ rte_log(RTE_LOG_ ## level, dpaa2_qdma_logtype, "%s(): " fmt "\n", \
+ __func__, ##args)
+
+#define DPAA2_QDMA_FUNC_TRACE() DPAA2_QDMA_LOG(DEBUG, ">>")
+
+#define DPAA2_QDMA_DEBUG(fmt, args...) \
+ DPAA2_QDMA_LOG(DEBUG, fmt, ## args)
+#define DPAA2_QDMA_INFO(fmt, args...) \
+ DPAA2_QDMA_LOG(INFO, fmt, ## args)
+#define DPAA2_QDMA_ERR(fmt, args...) \
+ DPAA2_QDMA_LOG(ERR, fmt, ## args)
+#define DPAA2_QDMA_WARN(fmt, args...) \
+ DPAA2_QDMA_LOG(WARNING, fmt, ## args)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DPAA2_QDMA_LOGS_H__ */
diff --git a/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map
new file mode 100644
index 0000000..9b9ab1a
--- /dev/null
+++ b/drivers/raw/dpaa2_qdma/rte_pmd_dpaa2_qdma_version.map
@@ -0,0 +1,4 @@
+DPDK_18.05 {
+
+ local: *;
+};
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index a6828c8..f2c778f 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -118,6 +118,7 @@ endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_PCI_BUS) += -lrte_bus_pci
_LDLIBS-$(CONFIG_RTE_LIBRTE_VDEV_BUS) += -lrte_bus_vdev
_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += -lrte_bus_dpaa
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA) += -lrte_pmd_dpaa2_qdma
ifeq ($(CONFIG_RTE_EAL_VFIO),y)
_LDLIBS-$(CONFIG_RTE_LIBRTE_FSLMC_BUS) += -lrte_bus_fslmc
endif
--
1.9.1