From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id BC67B5B1C for ; Wed, 25 Apr 2018 12:02:22 +0200 (CEST) Received: by mail-wm0-f68.google.com with SMTP id b21so5763432wme.4 for ; Wed, 25 Apr 2018 03:02:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=H5YOaAJmOLbDKh5Tndutw2yS6RWwLzWgSpGX4Fcm6es=; b=xXdq3v58N6+WI6MbkEEipcjXx8xax9owp/4ug9//UjCejNS6+w3IWnW33DMS6HoFf+ RkK+n8lUTrea8FgcFQswuJdU48/OnEZFC67PDsn/JOmmGWTmxWt2HXQXxPwLAslRcPBr HubvdjLtziuGyHHz+CwtgsKw6WIE+kDemODoa47E3+8e0xxHDjVDo2ReCQalmwxiEmmA Sp5Pjmoh80pUF9TMOJAmy2VeZ3UqkQXVgSZWz979FbEstILNOIuuRHs728T1LAB7Ii86 gSCj7LodF6QNx5hi8OGmijkqegp+5IOw6wI5p36N2Ye1sfsTpRDERwSo4Ual+NEIygje j5bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=H5YOaAJmOLbDKh5Tndutw2yS6RWwLzWgSpGX4Fcm6es=; b=M8JeWjybr9K0UaZyvSYD2Rg2neloUrOLnZcVQWF+kc5eou66mFf+6BsdFGNXyTwfDN gCxKcbclU0MN7fJFb3gXhiw+CFIcSc0iRwQt334r25NHmuFxvQ2ZSNWIJzOG85cS7MNu mdU7rbZH495SGHEHCKspMi04mFEWCQlslShZPyFDOhTRqAeGzsuyElPi/f+P6dlHtB4x 7Jn8gZQpBgCZYt59iN1DVMsp9+S5kSJOl+ICRjwBQZCphc2qq5niWJQXYuj46Tg4maqF HFd7R8lbF7lndP9CzXT3zmQYt/6Mktr/S72m34Y6MHZOM/79WSpWb5Gvel6JCSWh3+/L fyEg== X-Gm-Message-State: ALQs6tBkKBmweHFTLhNLtzozSrftlrS247gnGYxg6H//4e6e1fCU6UX/ jdUDJ0nM9NAu5hozVCPajl0IB9JXXtU= X-Google-Smtp-Source: AB8JxZpYHfyWG+LI6MRN9B1XB1cx/0tH+fmOAByQZYP/0i9Oq6VOovcOOtNsCeUDPkfR6F15n2b4nQ== X-Received: by 10.28.228.133 with SMTP id b127mr1904309wmh.83.1524650542258; Wed, 25 Apr 2018 03:02:22 -0700 (PDT) Received: from cougar.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id n143sm14100363wmd.29.2018.04.25.03.02.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Apr 2018 03:02:21 -0700 (PDT) From: Zijie Pan To: dev@dpdk.org Cc: remy.horton@intel.com, ferruh.yigit@intel.com, thomas@monjalon.net, wenzhuo.lu@intel.com Date: Wed, 25 Apr 2018 12:01:54 +0200 Message-Id: <1524650515-26659-5-git-send-email-zijie.pan@6wind.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1524650515-26659-1-git-send-email-zijie.pan@6wind.com> References: <1524647624-23005-1-git-send-email-zijie.pan@6wind.com> <1524650515-26659-1-git-send-email-zijie.pan@6wind.com> Subject: [dpdk-dev] [PATCH v6 4/5] net/e1000: add module EEPROM callbacks for e1000 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Apr 2018 10:02:22 -0000 Add new callbacks for eth_dev_ops of e1000 to get the information and data of plugin module EEPROM. Signed-off-by: Zijie Pan Acked-by: Remy Horton --- Cc: wenzhuo.lu@intel.com drivers/net/e1000/base/e1000_phy.h | 8 ++++ drivers/net/e1000/igb_ethdev.c | 86 ++++++++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h index 3e45a9e..2cd0e14 100644 --- a/drivers/net/e1000/base/e1000_phy.h +++ b/drivers/net/e1000/base/e1000_phy.h @@ -330,4 +330,12 @@ struct sfp_e1000_flags { #define E1000_SFF_VENDOR_OUI_AVAGO 0x00176A00 #define E1000_SFF_VENDOR_OUI_INTEL 0x001B2100 +/* EEPROM byte offsets */ +#define IGB_SFF_8472_SWAP 0x5C +#define IGB_SFF_8472_COMP 0x5E + +/* Bitmasks */ +#define IGB_SFF_ADDRESSING_MODE 0x4 +#define IGB_SFF_8472_UNSUP 0x00 + #endif diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 9b808a9..c35c935 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -223,6 +223,10 @@ static int eth_igb_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); static int eth_igb_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); +static int eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_eth_dev_module_info *modinfo); +static int eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info); static int eth_igb_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, uint32_t nb_mc_addr); @@ -402,6 +406,8 @@ static void eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector, .get_eeprom_length = eth_igb_get_eeprom_length, .get_eeprom = eth_igb_get_eeprom, .set_eeprom = eth_igb_set_eeprom, + .get_module_info = eth_igb_get_module_info, + .get_module_eeprom = eth_igb_get_module_eeprom, .timesync_adjust_time = igb_timesync_adjust_time, .timesync_read_time = igb_timesync_read_time, .timesync_write_time = igb_timesync_write_time, @@ -5329,6 +5335,86 @@ static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on) } static int +eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_eth_dev_module_info *modinfo) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t sff8472_rev, addr_mode; + bool page_swap = false; + + if (hw->phy.media_type == e1000_media_type_copper || + hw->phy.media_type == e1000_media_type_unknown) + return -EOPNOTSUPP; + + /* Check whether we support SFF-8472 or not */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev); + if (status) + return -EIO; + + /* addressing mode is not supported */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode); + if (status) + return -EIO; + + /* addressing mode is not supported */ + if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) { + PMD_DRV_LOG(ERR, + "Address change required to access page 0xA2, " + "but not supported. Please report the module " + "type to the driver maintainers.\n"); + page_swap = true; + } + + if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) { + /* We have an SFP, but it does not support SFF-8472 */ + modinfo->type = RTE_ETH_MODULE_SFF_8079; + modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8079_LEN; + } else { + /* We have an SFP which supports a revision of SFF-8472 */ + modinfo->type = RTE_ETH_MODULE_SFF_8472; + modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8472_LEN; + } + + return 0; +} + +static int +eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t dataword[RTE_ETH_MODULE_SFF_8472_LEN / 2 + 1]; + u16 first_word, last_word; + int i = 0; + + if (info->length == 0) + return -EINVAL; + + first_word = info->offset >> 1; + last_word = (info->offset + info->length - 1) >> 1; + + /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */ + for (i = 0; i < last_word - first_word + 1; i++) { + status = e1000_read_phy_reg_i2c(hw, (first_word + i) * 2, + &dataword[i]); + if (status) { + /* Error occurred while reading module */ + return -EIO; + } + + dataword[i] = rte_be_to_cpu_16(dataword[i]); + } + + memcpy(info->data, (u8 *)dataword + (info->offset & 1), info->length); + + return 0; +} + +static int eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) { struct e1000_hw *hw = -- 1.7.10.4