From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id 28F011B19 for ; Fri, 21 Sep 2018 13:48:16 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0DAFF1A02B6; Fri, 21 Sep 2018 13:48:16 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 2D8031A02B4; Fri, 21 Sep 2018 13:48:14 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.134.28]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 438AF402E5; Fri, 21 Sep 2018 19:48:11 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: jerin.jacob@caviumnetworks.com, Hemant Agrawal Date: Fri, 21 Sep 2018 17:16:04 +0530 Message-Id: <1537530366-4722-3-git-send-email-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537530366-4722-1-git-send-email-hemant.agrawal@nxp.com> References: <1535609039-10869-1-git-send-email-hemant.agrawal@nxp.com> <1537530366-4722-1-git-send-email-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH v2 3/5] event/dpaa2: enchance timeout handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Sep 2018 11:48:16 -0000 This patch enahances: 1. configure the dequeue time out value as per the given method or per dequeue, global or default. 2. The timeout values were being mixed as ns or ms timeouts. now the values are stored as ns and scale is in ms. Signed-off-by: Hemant Agrawal --- v2: added description drivers/event/dpaa2/dpaa2_eventdev.c | 19 ++++++++++++++++--- drivers/event/dpaa2/dpaa2_eventdev.h | 1 + 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index c4064a4..4b56e2e 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -284,7 +284,7 @@ dpaa2_eventdev_info_get(struct rte_eventdev *dev, dev_info->max_dequeue_timeout_ns = DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT; dev_info->dequeue_timeout_ns = - DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT; + DPAA2_EVENT_PORT_DEQUEUE_TIMEOUT_NS; dev_info->max_event_queues = priv->max_event_queues; dev_info->max_event_queue_flows = DPAA2_EVENT_MAX_QUEUE_FLOWS; @@ -314,7 +314,6 @@ dpaa2_eventdev_configure(const struct rte_eventdev *dev) EVENTDEV_INIT_FUNC_TRACE(); - priv->dequeue_timeout_ns = conf->dequeue_timeout_ns; priv->nb_event_queues = conf->nb_event_queues; priv->nb_event_ports = conf->nb_event_ports; priv->nb_event_queue_flows = conf->nb_event_queue_flows; @@ -322,6 +321,20 @@ dpaa2_eventdev_configure(const struct rte_eventdev *dev) priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth; priv->event_dev_cfg = conf->event_dev_cfg; + /* Check dequeue timeout method is per dequeue or global */ + if (priv->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) { + /* + * Use timeout value as given in dequeue operation. + * So invalidating this timeout value. + */ + priv->dequeue_timeout_ns = 0; + + } else if (conf->dequeue_timeout_ns == 0) { + priv->dequeue_timeout_ns = DPAA2_EVENT_PORT_DEQUEUE_TIMEOUT_NS; + } else { + priv->dequeue_timeout_ns = conf->dequeue_timeout_ns; + } + DPAA2_EVENTDEV_DEBUG("Configured eventdev devid=%d", dev->data->dev_id); return 0; @@ -516,7 +529,7 @@ static int dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *timeout_ticks) { - uint32_t scale = 1; + uint32_t scale = 1000*1000; EVENTDEV_INIT_FUNC_TRACE(); diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h b/drivers/event/dpaa2/dpaa2_eventdev.h index d2f98c6..8898024 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.h +++ b/drivers/event/dpaa2/dpaa2_eventdev.h @@ -21,6 +21,7 @@ #define DPAA2_EVENT_MAX_QUEUES 16 #define DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT 1 #define DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT (UINT32_MAX - 1) +#define DPAA2_EVENT_PORT_DEQUEUE_TIMEOUT_NS 100UL #define DPAA2_EVENT_MAX_QUEUE_FLOWS 2048 #define DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS 8 #define DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS 0 -- 2.7.4