From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 9D87444BE for ; Fri, 1 Mar 2019 18:23:45 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2019 09:23:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,428,1544515200"; d="scan'208";a="324556095" Received: from eleanorr-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.42.246]) by fmsmga005.fm.intel.com with ESMTP; 01 Mar 2019 09:23:42 -0800 From: "Smith, Eleanor" To: dev@dpdk.org Cc: ferruh.yigit@intel.com, pablo.de.lara.guarch@intel.com, akhil.goyal@nxp.com Date: Fri, 1 Mar 2019 17:23:29 +0000 Message-Id: <1551461010-881-4-git-send-email-eleanor.smith@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551461010-881-1-git-send-email-eleanor.smith@intel.com> References: <1551461010-881-1-git-send-email-eleanor.smith@intel.com> Subject: [dpdk-dev] [PATCH v1 3/4] test-bbdev: update bbdev test-app for FPGA driver testing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Mar 2019 17:23:47 -0000 This patch updates the bbdev test application to include an option to configure the PF before running FPGA tests. Signed-off-by: Smith, Eleanor --- app/test-bbdev/main.c | 15 +++++++++- app/test-bbdev/main.h | 2 ++ app/test-bbdev/test-bbdev.py | 7 +++++ app/test-bbdev/test_bbdev_perf.c | 64 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 87 insertions(+), 1 deletion(-) diff --git a/app/test-bbdev/main.c b/app/test-bbdev/main.c index 7af2522..4e8b38c 100644 --- a/app/test-bbdev/main.c +++ b/app/test-bbdev/main.c @@ -16,6 +16,7 @@ #include "main.h" + /* Defines how many testcases can be specified as cmdline args */ #define MAX_CMDLINE_TESTCASES 8 @@ -28,6 +29,7 @@ static struct test_params { unsigned int burst_sz; unsigned int num_lcores; char test_vector_filename[PATH_MAX]; + bool init_device; } test_params; static struct test_commands_list commands_list = @@ -140,6 +142,12 @@ get_num_lcores(void) return test_params.num_lcores; } +bool +get_init_device(void) +{ + return test_params.init_device; +} + static void print_usage(const char *prog_name) { @@ -174,11 +182,12 @@ parse_args(int argc, char **argv, struct test_params *tp) { "test-cases", 1, 0, 'c' }, { "test-vector", 1, 0, 'v' }, { "lcores", 1, 0, 'l' }, + { "init-device", 0, 0, 'i'}, { "help", 0, 0, 'h' }, { NULL, 0, 0, 0 } }; - while ((opt = getopt_long(argc, argv, "hn:b:c:v:l:", lgopts, + while ((opt = getopt_long(argc, argv, "hin:b:c:v:l:", lgopts, &option_index)) != EOF) switch (opt) { case 'n': @@ -238,6 +247,10 @@ parse_args(int argc, char **argv, struct test_params *tp) "Num of lcores mustn't be greater than %u", RTE_MAX_LCORE); break; + case 'i': + /* indicate fpga fec config required */ + tp->init_device = true; + break; case 'h': print_usage(argv[0]); return 0; diff --git a/app/test-bbdev/main.h b/app/test-bbdev/main.h index 20a55ef..e8e76b7 100644 --- a/app/test-bbdev/main.h +++ b/app/test-bbdev/main.h @@ -117,4 +117,6 @@ unsigned int get_burst_sz(void); unsigned int get_num_lcores(void); +bool get_init_device(void); + #endif diff --git a/app/test-bbdev/test-bbdev.py b/app/test-bbdev/test-bbdev.py index acab9eb..a94ba9a 100755 --- a/app/test-bbdev/test-bbdev.py +++ b/app/test-bbdev/test-bbdev.py @@ -59,6 +59,9 @@ def kill(process): type=int, help="Number of lcores to run.", default=16) +parser.add_argument("-i", "--init-device", + action='store_true', + help="Initialise PF device with default values.") args = parser.parse_args() @@ -82,6 +85,10 @@ def kill(process): params.extend(["-c"]) params.extend([",".join(args.test_cases)]) +if args.init_device: + params.extend(["-i"]) + + exit_status = 0 for vector in args.test_vector: for burst_size in args.burst_size: diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index d18ddae..4f01aec 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -17,6 +17,10 @@ #include #include +#ifdef RTE_LIBRTE_PMD_FPGA_LTE_FEC +#include +#endif + #include "main.h" #include "test_bbdev_vector.h" @@ -25,6 +29,18 @@ #define MAX_QUEUES RTE_MAX_LCORE #define TEST_REPETITIONS 1000 +#ifdef RTE_LIBRTE_PMD_FPGA_LTE_FEC +#define FPGA_PF_DRIVER_NAME ("intel_fpga_lte_fec_pf") +#define FPGA_VF_DRIVER_NAME ("intel_fpga_lte_fec_vf") +#define VF_UL_QUEUE_VALUE 4 +#define VF_DL_QUEUE_VALUE 4 +#define UL_BANDWIDTH 3 +#define DL_BANDWIDTH 3 +#define UL_LOAD_BALANCE 128 +#define DL_LOAD_BALANCE 128 +#define FLR_TIMEOUT 610 +#endif + #define OPS_CACHE_SIZE 256U #define OPS_POOL_SIZE_MIN 511U /* 0.5K per queue */ @@ -379,7 +395,55 @@ add_bbdev_dev(uint8_t dev_id, struct rte_bbdev_info *info, unsigned int nb_queues; enum rte_bbdev_op_type op_type = vector->op_type; +/* Configure fpga lte fec with PF & VF values + * if '-i' flag is set and using fpga device + */ +#ifdef RTE_LIBRTE_PMD_FPGA_LTE_FEC + if ((get_init_device() == true) && + (!strcmp(info->drv.driver_name, FPGA_PF_DRIVER_NAME))) { + struct fpga_lte_fec_conf conf; + unsigned int i; + + printf("Configure FPGA FEC Driver %s with default values\n", + info->drv.driver_name); + + /* clear default configuration before initialization */ + memset(&conf, 0, sizeof(struct fpga_lte_fec_conf)); + + /* Set pf mode, true if PF is used for dataplane, + * false for VFs + */ + conf.pf_mode_en = true; + + for (i = 0; i < FPGA_LTE_FEC_NUM_VFS; ++i) { + /* Number of UL queues per VF (fpga supports 8 VFs) */ + conf.vf_ul_queues_number[i] = VF_UL_QUEUE_VALUE; + /* Number of DL queues per VF (fpga supports 8 VFs) */ + conf.vf_dl_queues_number[i] = VF_DL_QUEUE_VALUE; + } + + /* UL bandwidth. Needed for schedule algorithm */ + conf.ul_bandwidth = UL_BANDWIDTH; + /* DL bandwidth */ + conf.dl_bandwidth = DL_BANDWIDTH; + + /* UL & DL load Balance Factor to 64 */ + conf.ul_load_balance = UL_LOAD_BALANCE; + conf.dl_load_balance = DL_LOAD_BALANCE; + + /**< FLR timeout value */ + conf.flr_time_out = FLR_TIMEOUT; + + /* setup FPGA PF with configuration information */ + ret = fpga_lte_fec_configure(info->dev_name, &conf); + TEST_ASSERT_SUCCESS(ret, + "Failed to configure 4G FPGA PF for bbdev %s", + info->dev_name); + } +#endif + nb_queues = RTE_MIN(rte_lcore_count(), info->drv.max_num_queues); + /* setup device */ ret = rte_bbdev_setup_queues(dev_id, nb_queues, info->socket_id); if (ret < 0) { -- 2.7.4 --------------------------------------------------------------------- Intel Corporation (UK) Limited Registered No. 1134945 (England) Registered Office: Pipers Way, Swindon SN3 1RJ VAT No: 860 2173 47 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). 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