From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id D6D25A0096 for ; Wed, 5 Jun 2019 17:59:57 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6EB4F1BBDE; Wed, 5 Jun 2019 17:59:46 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by dpdk.org (Postfix) with ESMTP id D7B6F1BBD6 for ; Wed, 5 Jun 2019 17:59:43 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 40EBC15BF; Wed, 5 Jun 2019 08:59:43 -0700 (PDT) Received: from phil-VirtualBox.shanghai.arm.com (unknown [10.171.20.59]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BBD1D3F246; Wed, 5 Jun 2019 08:59:41 -0700 (PDT) From: Phil Yang To: dev@dpdk.org Cc: thomas@monjalon.net, jerinj@marvell.com, hemant.agrawal@nxp.com, Honnappa.Nagarahalli@arm.com, gavin.hu@arm.com, phil.yang@arm.com, nd@arm.com Date: Wed, 5 Jun 2019 23:58:47 +0800 Message-Id: <1559750328-22377-3-git-send-email-phil.yang@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1559750328-22377-1-git-send-email-phil.yang@arm.com> References: <1559750328-22377-1-git-send-email-phil.yang@arm.com> Subject: [dpdk-dev] [PATCH v1 2/3] eal/mcslock: use generic msc queued lock on all arch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Let all architectures use generic MCS queued lock implementation. Signed-off-by: Phil Yang Reviewed-by: Gavin Hu Reviewed-by: Honnappa Nagarahalli --- .../common/include/arch/arm/rte_mcslock.h | 23 ++++++++++++++++++++++ .../common/include/arch/ppc_64/rte_mcslock.h | 19 ++++++++++++++++++ .../common/include/arch/x86/rte_mcslock.h | 19 ++++++++++++++++++ 3 files changed, 61 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/arm/rte_mcslock.h create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_mcslock.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_mcslock.h diff --git a/lib/librte_eal/common/include/arch/arm/rte_mcslock.h b/lib/librte_eal/common/include/arch/arm/rte_mcslock.h new file mode 100644 index 0000000..5e41e32 --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_mcslock.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019 Arm Limited + */ + +#ifndef _RTE_MCSLOCK_ARM_H_ +#define _RTE_MCSLOCK_ARM_H_ + +#ifndef RTE_FORCE_INTRINSICS +# error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#include "generic/rte_mcslock.h" + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_MCSLOCK_ARM_H_ */ + diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_mcslock.h b/lib/librte_eal/common/include/arch/ppc_64/rte_mcslock.h new file mode 100644 index 0000000..951b6dd --- /dev/null +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_mcslock.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019 Arm Limited + */ + +#ifndef _RTE_MCSLOCK_PPC_64_H_ +#define _RTE_MCSLOCK_PPC_64_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "generic/rte_mcslock.h" + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_MCSLOCK_PPC_64_H_ */ + diff --git a/lib/librte_eal/common/include/arch/x86/rte_mcslock.h b/lib/librte_eal/common/include/arch/x86/rte_mcslock.h new file mode 100644 index 0000000..573b700 --- /dev/null +++ b/lib/librte_eal/common/include/arch/x86/rte_mcslock.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019 Arm Limited + */ + +#ifndef _RTE_MCSLOCK_X86_64_H_ +#define _RTE_MCSLOCK_X86_64_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "generic/rte_mcslock.h" + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_MCSLOCK_X86_64_H_ */ + -- 2.7.4