From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 9D759A0471 for ; Wed, 19 Jun 2019 10:56:21 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 451091C2B6; Wed, 19 Jun 2019 10:56:15 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 5AAA81C2AF for ; Wed, 19 Jun 2019 10:56:10 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 01:56:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,392,1557212400"; d="scan'208";a="162151590" Received: from dipei-st-npg.sh.intel.com ([10.67.110.220]) by orsmga003.jf.intel.com with ESMTP; 19 Jun 2019 01:56:09 -0700 From: Andy Pei To: dev@dpdk.org Cc: andy.pei@intel.com, rosen.xu@intel.com Date: Wed, 19 Jun 2019 16:49:33 +0800 Message-Id: <1560934174-408632-3-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1560934174-408632-1-git-send-email-andy.pei@intel.com> References: <1560246526-264797-3-git-send-email-andy.pei@intel.com> <1560934174-408632-1-git-send-email-andy.pei@intel.com> Subject: [dpdk-dev] [PATCH v3 3/4] net/ipn3ke: clear statistics when init and start dev X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" clear line side and NIC side statistics registers when HW init and uinit, and when dev start. Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver") Cc: rosen.xu@intel.com Signed-off-by: Andy Pei --- drivers/net/ipn3ke/ipn3ke_ethdev.c | 59 ++++++++++++++++++++++++++++----- drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++--- 2 files changed, 74 insertions(+), 12 deletions(-) diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c index 8d3084d..27ebfb5 100644 --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c @@ -244,11 +244,33 @@ /* Enable the RX path */ ipn3ke_xmac_rx_enable(hw, i, 1); - /* Clear all TX statistics counters */ - ipn3ke_xmac_tx_clr_stcs(hw, i, 1); + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1); - /* Clear all RX statistics counters */ - ipn3ke_xmac_rx_clr_stcs(hw, i, 1); + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1); + + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0); + + /* Clear line RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0); + } + } else if (hw->retimer.mac_type == + IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { + /* Enable inter connect channel */ + for (i = 0; i < hw->port_num; i++) { + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1); + + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1); + + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0); + + /* Clear line side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0); } } @@ -291,11 +313,32 @@ /* Disable the RX path */ ipn3ke_xmac_rx_disable(hw, i, 1); - /* Clear all TX statistics counters */ - ipn3ke_xmac_tx_clr_stcs(hw, i, 1); + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1); + + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1); + + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0); + + /* Clear line side RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0); + } + } else if (hw->retimer.mac_type == + IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { + for (i = 0; i < hw->port_num; i++) { + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1); + + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1); + + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0); - /* Clear all RX statistics counters */ - ipn3ke_xmac_rx_clr_stcs(hw, i, 1); + /* Clear line side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0); } } } diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c index f4529f6..b166b8f 100644 --- a/drivers/net/ipn3ke/ipn3ke_representor.c +++ b/drivers/net/ipn3ke/ipn3ke_representor.c @@ -159,11 +159,30 @@ /* Enable the RX path */ ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0); - /* Clear all TX statistics counters */ - ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0); + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0); - /* Clear all RX statistics counters */ - ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0); + /* Clear line side RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0); + + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1); + + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1); + } else if (hw->retimer.mac_type == + IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { + /* Clear line side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0); + + /* Clear line side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0); + + /* Clear NIC side TX statistics counters */ + ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1); + + /* Clear NIC side RX statistics counters */ + ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1); } ipn3ke_rpst_link_update(dev, 0); -- 1.8.3.1