From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DE11BA2EEB for ; Mon, 9 Sep 2019 17:27:26 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3DDA51ED19; Mon, 9 Sep 2019 17:27:17 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 6629B1ED12 for ; Mon, 9 Sep 2019 17:27:15 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x89F9jCa014529; Mon, 9 Sep 2019 08:27:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=AgojJaU1vn7R8V4K8tPPR2D7L4ACq2hmSLGqdZk/1VQ=; b=AngBrZLEZ8XaIA8MtqJ8969wGx5H3xoqG4RIfWTT55ZNp1ocAlJur8ta5gBwZKK2ZF5t OamIVL5N+VOclQJp3gG3HqupJz9r037sin6Wi0d5Ti/PM6hAIRJdWvyxBYzVhnen5ySv gD8j8KbZO59Jmu3yTVrZLcCQALLoPFtU9hJjg1u0gZYwTfsh8gMhf+iZKcPu+4lO1W1x TTSoq0b5EbcsRlxMQ14XMhX0RLRSrBhIXt1zHoaWovyihzcWDfoMz/XEX4ytFKZ3LkkQ brHkxedkAmL6Cbja76/sC2fQpQ9TZTYdERG7b66t7+re6gsHGVOzcEg8vsysbIBIIJF8 Vg== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2uvc2jfepe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 09 Sep 2019 08:27:14 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 9 Sep 2019 08:27:12 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 9 Sep 2019 08:27:12 -0700 Received: from ajoseph83.caveonetworks.com.com (unknown [10.29.45.56]) by maili.marvell.com (Postfix) with ESMTP id 352D63F703F; Mon, 9 Sep 2019 08:27:08 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Pablo de Lara , Thomas Monjalon CC: Kanaka Durga Kotamarthy , Jerin Jacob , Narayana Prasad , Anoob Joseph , Fiona Trahe , Shally Verma , Sunila Sahu , Date: Mon, 9 Sep 2019 20:56:36 +0530 Message-ID: <1568042799-25982-4-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1568042799-25982-1-git-send-email-anoobj@marvell.com> References: <1568042799-25982-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-09_06:2019-09-09,2019-09-09 signatures=0 Subject: [dpdk-dev] [PATCH 3/6] crypto/octeontx2: add asymmetric session operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kanaka Durga Kotamarthy This patch adds asymmetric session setup and free routines. Signed-off-by: Anoob Joseph Signed-off-by: Kanaka Durga Kotamarthy Signed-off-by: Sunila Sahu --- drivers/crypto/octeontx2/otx2_cryptodev.c | 3 +- drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 67 +++++++++++++++++++++++++++ 2 files changed, 69 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c index 490e7a1..fbfaf55 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev.c @@ -103,7 +103,8 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, RTE_CRYPTODEV_FF_IN_PLACE_SGL | RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO; + RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT; return 0; diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c index 6050b18..9a1d0e7 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c @@ -11,6 +11,7 @@ #include "cpt_pmd_logs.h" #include "cpt_pmd_ops_helper.h" #include "cpt_ucode.h" +#include "cpt_ucode_asym.h" #include "otx2_cryptodev.h" #include "otx2_cryptodev_capabilities.h" @@ -833,6 +834,66 @@ otx2_cpt_sym_session_clear(struct rte_cryptodev *dev, return sym_session_clear(dev->driver_id, sess); } +static unsigned int +otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused) +{ + return sizeof(struct cpt_asym_sess_misc); +} + +static int +otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev, + struct rte_crypto_asym_xform *xform, + struct rte_cryptodev_asym_session *sess, + struct rte_mempool *pool) +{ + struct cpt_asym_sess_misc *priv; + int ret; + + CPT_PMD_INIT_FUNC_TRACE(); + + if (rte_mempool_get(pool, (void **)&priv)) { + CPT_LOG_ERR("Could not allocate session_private_data"); + return -ENOMEM; + } + + memset(priv, 0, sizeof(struct cpt_asym_sess_misc)); + + ret = cpt_fill_asym_session_parameters(priv, xform); + if (ret) { + CPT_LOG_ERR("Could not configure session parameters"); + + /* Return session to mempool */ + rte_mempool_put(pool, priv); + return ret; + } + + set_asym_session_private_data(sess, dev->driver_id, priv); + return 0; +} + +static void +otx2_cpt_asym_session_clear(struct rte_cryptodev *dev, + struct rte_cryptodev_asym_session *sess) +{ + struct cpt_asym_sess_misc *priv; + struct rte_mempool *sess_mp; + + CPT_PMD_INIT_FUNC_TRACE(); + + priv = get_asym_session_private_data(sess, dev->driver_id); + if (priv == NULL) + return; + + /* Free resources allocated in session_cfg */ + cpt_free_asym_session_parameters(priv); + + /* Reset and free object back to pool */ + memset(priv, 0, otx2_cpt_asym_session_size_get(dev)); + sess_mp = rte_mempool_from_obj(priv); + set_asym_session_private_data(sess, dev->driver_id, NULL); + rte_mempool_put(sess_mp, priv); +} + struct rte_cryptodev_ops otx2_cpt_ops = { /* Device control ops */ .dev_configure = otx2_cpt_dev_config, @@ -851,4 +912,10 @@ struct rte_cryptodev_ops otx2_cpt_ops = { .sym_session_get_size = otx2_cpt_sym_session_get_size, .sym_session_configure = otx2_cpt_sym_session_configure, .sym_session_clear = otx2_cpt_sym_session_clear, + + /* Asymmetric crypto ops */ + .asym_session_get_size = otx2_cpt_asym_session_size_get, + .asym_session_configure = otx2_cpt_asym_session_cfg, + .asym_session_clear = otx2_cpt_asym_session_clear, + }; -- 2.7.4