From: Anoob Joseph <anoobj@marvell.com>
To: Akhil Goyal <akhil.goyal@nxp.com>,
Pablo de Lara <pablo.de.lara.guarch@intel.com>
Cc: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>,
Jerin Jacob <jerinj@marvell.com>,
Narayana Prasad <pathreya@marvell.com>,
Sunila Sahu <ssahu@marvell.com>,
Shally Verma <shallyv@marvell.com>,
Fiona Trahe <fiona.trahe@intel.com>, <dev@dpdk.org>,
Anoob Joseph <anoobj@marvell.com>
Subject: [dpdk-dev] [PATCH v2 1/5] crypto/octeontx: add device type mailbox routine
Date: Fri, 11 Oct 2019 18:31:32 +0530 [thread overview]
Message-ID: <1570798896-18974-2-git-send-email-anoobj@marvell.com> (raw)
In-Reply-To: <1570798896-18974-1-git-send-email-anoobj@marvell.com>
From: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Add mailbox communication to query symmetric or asymmetric device type
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
---
drivers/common/cpt/cpt_common.h | 3 ---
drivers/crypto/octeontx/otx_cryptodev_hw_access.c | 12 ++++-----
drivers/crypto/octeontx/otx_cryptodev_mbox.c | 26 ++++++++++++++++--
drivers/crypto/octeontx/otx_cryptodev_mbox.h | 20 ++++++++++++++
drivers/crypto/octeontx/otx_cryptodev_ops.c | 33 ++++++++++++++++++-----
drivers/crypto/octeontx/otx_cryptodev_ops.h | 2 ++
6 files changed, 78 insertions(+), 18 deletions(-)
diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index 32f23ac..7ef6b29 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -19,9 +19,6 @@
#define CPT_COUNT_THOLD 32
#define CPT_TIMER_THOLD 0x3F
-#define AE_TYPE 1
-#define SE_TYPE 2
-
#ifndef ROUNDUP4
#define ROUNDUP4(val) (((val) + 3) & 0xfffffffc)
#endif
diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
index eba6293..ad64bf4 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
@@ -386,6 +386,12 @@ otx_cpt_hw_init(struct cpt_vf *cptvf, void *pdev, void *reg_base, char *name)
return -1;
}
+ /* Gets device type */
+ if (otx_cpt_get_dev_type(cptvf)) {
+ CPT_LOG_ERR("Failed to get device type");
+ return -1;
+ }
+
return 0;
}
@@ -653,12 +659,6 @@ otx_cpt_start_device(void *dev)
return -EFAULT;
}
- if ((cptvf->vftype != SE_TYPE) && (cptvf->vftype != AE_TYPE)) {
- CPT_LOG_ERR("Fatal error, unexpected vf type %u, for CPT VF "
- "device %s", cptvf->vftype, cptvf->dev_name);
- return -ENOENT;
- }
-
return 0;
}
diff --git a/drivers/crypto/octeontx/otx_cryptodev_mbox.c b/drivers/crypto/octeontx/otx_cryptodev_mbox.c
index daba776..a884ad6 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_mbox.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_mbox.c
@@ -42,11 +42,19 @@ otx_cpt_handle_mbox_intr(struct cpt_vf *cptvf)
case OTX_CPT_MSG_QBIND_GRP:
cptvf->pf_acked = true;
cptvf->vftype = mbx.data;
- CPT_LOG_DP_DEBUG("%s: VF %d type %s group %d",
+ CPT_LOG_DP_DEBUG("%s: VF %d group %d",
cptvf->dev_name, cptvf->vfid,
- ((mbx.data == SE_TYPE) ? "SE" : "AE"),
cptvf->vfgrp);
break;
+ case OTX_CPT_MSG_PF_TYPE:
+ cptvf->pf_acked = true;
+ if (mbx.data == OTX_CPT_PF_TYPE_AE)
+ cptvf->vftype = OTX_CPT_VF_TYPE_AE;
+ else if (mbx.data == OTX_CPT_PF_TYPE_SE)
+ cptvf->vftype = OTX_CPT_VF_TYPE_SE;
+ else
+ cptvf->vftype = OTX_CPT_VF_TYPE_INVALID;
+ break;
case OTX_CPT_MBOX_MSG_TYPE_ACK:
cptvf->pf_acked = true;
break;
@@ -120,6 +128,20 @@ otx_cpt_check_pf_ready(struct cpt_vf *cptvf)
}
int
+otx_cpt_get_dev_type(struct cpt_vf *cptvf)
+{
+ struct cpt_mbox mbx = {0, 0};
+
+ mbx.msg = OTX_CPT_MSG_PF_TYPE;
+ if (otx_cpt_send_msg_to_pf_timeout(cptvf, &mbx)) {
+ CPT_LOG_ERR("%s: PF didn't respond to query msg",
+ cptvf->dev_name);
+ return 1;
+ }
+ return 0;
+}
+
+int
otx_cpt_send_vq_size_msg(struct cpt_vf *cptvf)
{
struct cpt_mbox mbx = {0, 0};
diff --git a/drivers/crypto/octeontx/otx_cryptodev_mbox.h b/drivers/crypto/octeontx/otx_cryptodev_mbox.h
index 2d2e0e6..508f3af 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_mbox.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_mbox.h
@@ -23,6 +23,20 @@ struct cpt_mbox {
uint64_t data;
};
+/* CPT PF types */
+enum otx_cpt_pf_type {
+ OTX_CPT_PF_TYPE_INVALID = 0,
+ OTX_CPT_PF_TYPE_AE = 2,
+ OTX_CPT_PF_TYPE_SE,
+};
+
+/* CPT VF types */
+enum otx_cpt_vf_type {
+ OTX_CPT_VF_TYPE_AE = 1,
+ OTX_CPT_VF_TYPE_SE,
+ OTX_CPT_VF_TYPE_INVALID,
+};
+
/* PF-VF message opcodes */
enum otx_cpt_mbox_opcode {
OTX_CPT_MSG_VF_UP = 1,
@@ -63,6 +77,12 @@ int
otx_cpt_check_pf_ready(struct cpt_vf *cptvf);
/*
+ * Communicate to PF to get VF type
+ */
+int
+otx_cpt_get_dev_type(struct cpt_vf *cptvf);
+
+/*
* Communicate VQs size to PF to program CPT(0)_PF_Q(0-15)_CTL of the VF.
* Must be ACKed.
*/
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c
index 118168a..4c6e266 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_ops.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c
@@ -13,6 +13,7 @@
#include "otx_cryptodev.h"
#include "otx_cryptodev_capabilities.h"
#include "otx_cryptodev_hw_access.h"
+#include "otx_cryptodev_mbox.h"
#include "otx_cryptodev_ops.h"
#include "cpt_pmd_logs.h"
@@ -630,6 +631,28 @@ otx_cpt_dev_create(struct rte_cryptodev *c_dev)
goto fail;
}
+ switch (cptvf->vftype) {
+ case OTX_CPT_VF_TYPE_AE:
+ /* Set asymmetric cpt feature flags */
+ c_dev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
+ RTE_CRYPTODEV_FF_HW_ACCELERATED;
+ break;
+ case OTX_CPT_VF_TYPE_SE:
+ /* Set symmetric cpt feature flags */
+ c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+ RTE_CRYPTODEV_FF_HW_ACCELERATED |
+ RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+ RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+ RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+ RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
+ break;
+ default:
+ /* Feature not supported. Abort */
+ CPT_LOG_ERR("VF type not supported by %s", dev_name);
+ ret = -EIO;
+ goto deinit_dev;
+ }
+
/* Start off timer for mailbox interrupts */
otx_cpt_periodic_alarm_start(cptvf);
@@ -638,18 +661,14 @@ otx_cpt_dev_create(struct rte_cryptodev *c_dev)
c_dev->enqueue_burst = otx_cpt_pkt_enqueue;
c_dev->dequeue_burst = otx_cpt_pkt_dequeue;
- c_dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_HW_ACCELERATED |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
- RTE_CRYPTODEV_FF_IN_PLACE_SGL |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT;
-
/* Save dev private data */
c_dev->data->dev_private = cptvf;
return 0;
+deinit_dev:
+ otx_cpt_deinit_device(cptvf);
+
fail:
if (cptvf) {
/* Free private data allocated */
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.h b/drivers/crypto/octeontx/otx_cryptodev_ops.h
index 768ec4f..fac8a3c 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_ops.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.h
@@ -5,6 +5,8 @@
#ifndef _OTX_CRYPTODEV_OPS_H_
#define _OTX_CRYPTODEV_OPS_H_
+#include <rte_cryptodev.h>
+
#define OTX_CPT_MIN_HEADROOM_REQ (24)
#define OTX_CPT_MIN_TAILROOM_REQ (8)
#define CPT_NUM_QS_PER_VF (1)
--
2.7.4
next prev parent reply other threads:[~2019-10-11 13:02 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-09 13:27 [dpdk-dev] [PATCH 0/8] add asym support in crypto_octeontx PMD Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 1/8] crypto/octeontx: add device type mailbox routine Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 2/8] crypto/octeontx: add RSA and modexp asym capabilities Anoob Joseph
2019-10-01 12:38 ` Akhil Goyal
2019-10-02 10:48 ` Anoob Joseph
2019-10-03 8:03 ` Akhil Goyal
2019-09-09 13:28 ` [dpdk-dev] [PATCH 3/8] crypto/octeontx: add asymmetric session operations Anoob Joseph
2019-10-01 12:57 ` Akhil Goyal
2019-10-02 11:18 ` Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 4/8] common/cpt: add helper functions for asymmetric crypto Anoob Joseph
2019-10-01 13:04 ` Akhil Goyal
2019-10-02 11:13 ` Anoob Joseph
2019-10-04 7:32 ` Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 5/8] crypto/octeontx: add asymmetric op enqueue function Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 6/8] crypto/octeontx: add asymmetric op dequeue function Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 7/8] app/test: register octeontx PMD to asym testsuite Anoob Joseph
2019-09-09 13:28 ` [dpdk-dev] [PATCH 8/8] doc: update octeontx asymmetric features Anoob Joseph
2019-10-01 13:27 ` Akhil Goyal
2019-10-02 11:04 ` Anoob Joseph
2019-10-03 8:01 ` Akhil Goyal
2019-09-09 15:51 ` [dpdk-dev] [PATCH 0/8] add asym support in crypto_octeontx PMD Shally Verma
2019-10-11 13:01 ` [dpdk-dev] [PATCH v2 0/5] " Anoob Joseph
2019-10-11 13:01 ` Anoob Joseph [this message]
2019-10-11 13:01 ` [dpdk-dev] [PATCH v2 2/5] crypto/octeontx: add asymmetric session operations Anoob Joseph
2019-10-11 13:01 ` [dpdk-dev] [PATCH v2 3/5] common/cpt: add helper functions for asymmetric crypto Anoob Joseph
2019-10-11 13:01 ` [dpdk-dev] [PATCH v2 4/5] crypto/octeontx: add asymmetric enqueue/dequeue ops Anoob Joseph
2019-10-11 13:01 ` [dpdk-dev] [PATCH v2 5/5] app/test: register octeontx PMD to asym testsuite Anoob Joseph
2019-10-15 12:46 ` [dpdk-dev] [PATCH v2 0/5] add asym support in crypto_octeontx PMD Akhil Goyal
2019-10-15 13:31 ` Akhil Goyal
2019-10-16 4:57 ` Anoob Joseph
2019-10-16 5:57 ` Akhil Goyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1570798896-18974-2-git-send-email-anoobj@marvell.com \
--to=anoobj@marvell.com \
--cc=akhil.goyal@nxp.com \
--cc=dev@dpdk.org \
--cc=fiona.trahe@intel.com \
--cc=jerinj@marvell.com \
--cc=kkotamarthy@marvell.com \
--cc=pablo.de.lara.guarch@intel.com \
--cc=pathreya@marvell.com \
--cc=shallyv@marvell.com \
--cc=ssahu@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).