From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C9142A00BE; Wed, 30 Oct 2019 09:20:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1457F1BEB8; Wed, 30 Oct 2019 09:20:40 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 110941BEB6; Wed, 30 Oct 2019 09:20:37 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Oct 2019 01:20:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,246,1569308400"; d="scan'208";a="230366741" Received: from dpdk6.bj.intel.com ([172.16.182.200]) by fmsmga002.fm.intel.com with ESMTP; 30 Oct 2019 01:20:35 -0700 From: Wei Zhao To: dev@dpdk.org Cc: stable@dpdk.org, qi.z.zhang@intel.com, xiaolong.ye@intel.com, Wei Zhao Date: Wed, 30 Oct 2019 15:46:44 +0800 Message-Id: <1572421604-14087-1-git-send-email-wei.zhao1@intel.com> X-Mailer: git-send-email 2.7.5 Subject: [dpdk-dev] [PATCH] net/ice: disable useless interrupt X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This is a useless interrupt which will cause intr every time when download FDIR rte_flow rule. Fixes: cf911d90e366 ("net/ice: support link update") Cc: stable@dpdk.org Signed-off-by: Wei Zhao --- drivers/net/ice/ice_ethdev.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index d746758..404d734 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -1225,6 +1225,8 @@ ice_pf_enable_irq0(struct ice_hw *hw) GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | GLINT_DYN_CTL_ITR_INDX_M); + /* disable useless intr */ + ICE_WRITE_REG(hw, GL_MDCK_TX_TDPU, 0x2); ice_flush(hw); } -- 2.7.5