From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0CE9DA0352; Tue, 5 Nov 2019 09:04:35 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D18841BEC9; Tue, 5 Nov 2019 09:02:26 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id ACD845B3E for ; Tue, 5 Nov 2019 09:02:13 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with ESMTPS (AES256-SHA encrypted); 5 Nov 2019 10:02:12 +0200 Received: from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx [10.210.16.104]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xA582Bwr026506; Tue, 5 Nov 2019 10:02:11 +0200 Received: from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id xA582BSm030779; Tue, 5 Nov 2019 08:02:11 GMT Received: (from viacheslavo@localhost) by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id xA582B0r030778; Tue, 5 Nov 2019 08:02:11 GMT X-Authentication-Warning: pegasus11.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, thomas@monjalon.net, orika@mellanox.com Date: Tue, 5 Nov 2019 08:01:47 +0000 Message-Id: <1572940915-29416-13-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1572940915-29416-1-git-send-email-viacheslavo@mellanox.com> References: <1572940915-29416-1-git-send-email-viacheslavo@mellanox.com> Subject: [dpdk-dev] [PATCH 12/20] net/mlx5: update metadata register id query X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The NIC might support up to 8 extensive metadata registers. These registers are supposed to be used by multiple features. There is register id query routine to allow determine which register is actually used by specified feature. Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.c | 76 +++++++++++++++++++++++++++++--------------- drivers/net/mlx5/mlx5_flow.h | 17 ++++++++++ 2 files changed, 67 insertions(+), 26 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index f32ea8d..c38208c 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -316,12 +316,6 @@ struct mlx5_flow_tunnel_info { }, }; -enum mlx5_feature_name { - MLX5_HAIRPIN_RX, - MLX5_HAIRPIN_TX, - MLX5_APPLICATION, -}; - /** * Translate tag ID to register. * @@ -338,37 +332,66 @@ enum mlx5_feature_name { * The request register on success, a negative errno * value otherwise and rte_errno is set. */ -__rte_unused -static enum modify_reg flow_get_reg_id(struct rte_eth_dev *dev, - enum mlx5_feature_name feature, - uint32_t id, - struct rte_flow_error *error) +enum modify_reg +mlx5_flow_get_reg_id(struct rte_eth_dev *dev, + enum mlx5_feature_name feature, + uint32_t id, + struct rte_flow_error *error) { - static enum modify_reg id2reg[] = { - [0] = REG_A, - [1] = REG_C_2, - [2] = REG_C_3, - [3] = REG_C_4, - [4] = REG_B,}; - - dev = (void *)dev; + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_dev_config *config = &priv->config; + switch (feature) { case MLX5_HAIRPIN_RX: return REG_B; case MLX5_HAIRPIN_TX: return REG_A; - case MLX5_APPLICATION: - if (id > 4) + case MLX5_METADATA_RX: + switch (config->dv_xmeta_en) { + case MLX5_XMETA_MODE_LEGACY: + return REG_B; + case MLX5_XMETA_MODE_META16: + return REG_C_0; + case MLX5_XMETA_MODE_META32: + return REG_C_1; + } + break; + case MLX5_METADATA_TX: + return REG_A; + case MLX5_METADATA_FDB: + return REG_C_0; + case MLX5_FLOW_MARK: + switch (config->dv_xmeta_en) { + case MLX5_XMETA_MODE_LEGACY: + return REG_NONE; + case MLX5_XMETA_MODE_META16: + return REG_C_1; + case MLX5_XMETA_MODE_META32: + return REG_C_0; + } + break; + case MLX5_COPY_MARK: + return REG_C_2; + case MLX5_APP_TAG: + /* + * Suppose engaging reg_c_2 .. reg_c_7 registers. + * reg_c_2 is reserved for coloring by meters. + */ + if (id > (REG_C_7 - REG_C_3)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, NULL, "invalid tag id"); - return id2reg[id]; + if (config->flow_mreg_c[id + REG_C_3 - REG_C_0] == REG_NONE) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ITEM, + NULL, "unsupported tag id"); + return config->flow_mreg_c[id + REG_C_3 - REG_C_0]; } + assert(false); return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, NULL, "invalid feature name"); } - /** * Check extensive flow metadata register support. * @@ -2667,7 +2690,6 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, struct mlx5_rte_flow_item_tag *tag_item; struct rte_flow_item *item; char *addr; - struct rte_flow_error error; int encap = 0; mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id); @@ -2733,7 +2755,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); actions_rx++; set_tag = (void *)actions_rx; - set_tag->id = flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, &error); + set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); + assert(set_tag->id > REG_NONE); set_tag->data = *flow_id; tag_action->conf = set_tag; /* Create Tx item list. */ @@ -2743,7 +2766,8 @@ uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG; tag_item = (void *)addr; tag_item->data = *flow_id; - tag_item->id = flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); + tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); + assert(set_tag->id > REG_NONE); item->spec = tag_item; addr += sizeof(struct mlx5_rte_flow_item_tag); tag_item = (void *)addr; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index c1d0a65..9371e11 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -63,6 +63,18 @@ struct mlx5_rte_flow_item_tx_queue { uint32_t queue; }; +/* Feature name to allocate metadata register. */ +enum mlx5_feature_name { + MLX5_HAIRPIN_RX, + MLX5_HAIRPIN_TX, + MLX5_METADATA_RX, + MLX5_METADATA_TX, + MLX5_METADATA_FDB, + MLX5_FLOW_MARK, + MLX5_APP_TAG, + MLX5_COPY_MARK, +}; + /* Pattern outer Layer bits. */ #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0) #define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1) @@ -534,6 +546,7 @@ struct mlx5_flow_driver_ops { mlx5_flow_query_t query; }; + #define MLX5_CNT_CONTAINER(sh, batch, thread) (&(sh)->cmng.ccont \ [(((sh)->cmng.mhi[batch] >> (thread)) & 0x1) * 2 + (batch)]) #define MLX5_CNT_CONTAINER_UNUSED(sh, batch, thread) (&(sh)->cmng.ccont \ @@ -554,6 +567,10 @@ uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel, uint64_t hash_fields); uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, uint32_t subpriority); +enum modify_reg mlx5_flow_get_reg_id(struct rte_eth_dev *dev, + enum mlx5_feature_name feature, + uint32_t id, + struct rte_flow_error *error); const struct rte_flow_action *mlx5_flow_find_action (const struct rte_flow_action *actions, enum rte_flow_action_type action); -- 1.8.3.1