From: Harman Kalra <hkalra@marvell.com>
To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>,
Vamsi Krishna Attunuru <vattunuru@marvell.com>,
Kiran Kumar Kokkilagadda <kirankumark@marvell.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>
Subject: [dpdk-dev] [PATCH] net/octeontx2: fix ptp configurations for VF
Date: Mon, 11 Nov 2019 05:48:54 +0000 [thread overview]
Message-ID: <1573451282-27307-1-git-send-email-hkalra@marvell.com> (raw)
Issue has been observed if PTP is already enabled on PF and
later VFs are configured. Since PTP requires mbuf data off
to be shifted by 8 bytes, due to this l3fwd/l2fwd was not
working with VFs.
Also some extra garbage bytes were observed in packet data
when ptp was enabled.
Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
drivers/common/octeontx2/otx2_mbox.h | 1 +
drivers/net/octeontx2/otx2_ethdev.c | 13 ++++-
drivers/net/octeontx2/otx2_ethdev.h | 1 +
drivers/net/octeontx2/otx2_ethdev_ops.c | 2 +
drivers/net/octeontx2/otx2_ptp.c | 68 ++++++++++++++++++++++---
drivers/net/octeontx2/otx2_rx.h | 2 +
6 files changed, 79 insertions(+), 8 deletions(-)
diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h
index c2a9e9fe6..e0e4e2f63 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -723,6 +723,7 @@ struct nix_lf_alloc_rsp {
uint8_t __otx2_io lf_tx_stats; /* NIX_AF_CONST1::LF_TX_STATS */
uint16_t __otx2_io cints; /* NIX_AF_CONST2::CINTS */
uint16_t __otx2_io qints; /* NIX_AF_CONST2::QINTS */
+ uint8_t __otx2_io hw_rx_tstamp_en; /*set if rx timestamping enabled */
};
struct nix_lf_free_req {
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index aab34dbcf..9274dbb96 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -86,6 +86,7 @@ nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, uint32_t nb_txq)
dev->cints = rsp->cints;
dev->qints = rsp->qints;
dev->npc_flow.channel = dev->rx_chan_base;
+ dev->ptp_en = rsp->hw_rx_tstamp_en;
return 0;
}
@@ -1899,7 +1900,11 @@ otx2_nix_dev_start(struct rte_eth_dev *eth_dev)
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int rc, i;
- if (eth_dev->data->nb_rx_queues != 0) {
+ /* MTU recalculate should be avoided here if PTP is enabled by PF, as
+ * otx2_nix_recalc_mtu would be invoked during otx2_nix_ptp_enable_vf
+ * call below.
+ */
+ if (eth_dev->data->nb_rx_queues != 0 && !otx2_ethdev_is_ptp_en(dev)) {
rc = otx2_nix_recalc_mtu(eth_dev);
if (rc)
return rc;
@@ -1935,6 +1940,12 @@ otx2_nix_dev_start(struct rte_eth_dev *eth_dev)
else
otx2_nix_timesync_disable(eth_dev);
+ /* Update VF about data off shifted by 8 bytes if PTP already
+ * enabled in PF owning this VF
+ */
+ if (otx2_ethdev_is_ptp_en(dev) && otx2_dev_is_vf(dev))
+ otx2_nix_ptp_enable_vf(eth_dev);
+
rc = npc_rx_enable(dev);
if (rc) {
otx2_err("Failed to enable NPC rx %d", rc);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index b49e309fd..d369d4dc5 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -562,5 +562,6 @@ int otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev,
int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en);
int otx2_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *time);
int otx2_nix_raw_clock_tsc_conv(struct otx2_eth_dev *dev);
+void otx2_nix_ptp_enable_vf(struct rte_eth_dev *eth_dev);
#endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index d1e77c324..45b5c5185 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -16,6 +16,8 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
struct nix_frs_cfg *req;
int rc;
+ frame_size += NIX_TIMESYNC_RX_OFFSET * otx2_ethdev_is_ptp_en(dev);
+
/* Check if MTU is within the allowed range */
if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS)
return -EINVAL;
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f13f0408a..f34b9339c 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -8,6 +8,38 @@
#define PTP_FREQ_ADJUST (1 << 9)
+/* Function to enable ptp config for VFs */
+void
+otx2_nix_ptp_enable_vf(struct rte_eth_dev *eth_dev)
+{
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+
+ if (otx2_nix_recalc_mtu(eth_dev))
+ otx2_err("Failed to set MTU size for ptp");
+
+ dev->scalar_ena = true;
+ dev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;
+
+ /* Setting up the function pointers as per new offload flags */
+ otx2_eth_set_rx_function(eth_dev);
+ otx2_eth_set_tx_function(eth_dev);
+}
+
+static uint16_t
+nix_eth_ptp_vf_burst(void *queue, struct rte_mbuf **mbufs, uint16_t pkts)
+{
+ struct otx2_eth_rxq *rxq = queue;
+ struct rte_eth_dev *eth_dev;
+
+ RTE_SET_USED(mbufs);
+ RTE_SET_USED(pkts);
+
+ eth_dev = rxq->eth_dev;
+ otx2_nix_ptp_enable_vf(eth_dev);
+
+ return 0;
+}
+
static int
nix_read_raw_clock(struct otx2_eth_dev *dev, uint64_t *clock, uint64_t *tsc,
uint8_t is_pmu)
@@ -104,7 +136,7 @@ nix_ptp_config(struct rte_eth_dev *eth_dev, int en)
struct otx2_mbox *mbox = dev->mbox;
uint8_t rc = -EINVAL;
- if (otx2_dev_is_vf_or_sdp(dev))
+ if (otx2_dev_is_vf_or_sdp(dev) || otx2_dev_is_lbk(dev))
return rc;
if (en) {
@@ -153,6 +185,17 @@ otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en)
otx2_nix_rxq_mbuf_setup(otx2_dev,
eth_dev->data->port_id);
}
+ if (otx2_dev_is_vf(otx2_dev) && !(otx2_dev_is_sdp(otx2_dev)) &&
+ !(otx2_dev_is_lbk(otx2_dev))) {
+ /* In case of VF, setting of MTU cant be done directly in this
+ * function as this is running as part of MBOX request(PF->VF)
+ * and MTU setting also requires MBOX message to be
+ * sent(VF->PF)
+ */
+ eth_dev->rx_pkt_burst = nix_eth_ptp_vf_burst;
+ rte_mb();
+ }
+
return 0;
}
@@ -162,14 +205,16 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int i, rc = 0;
- if (otx2_ethdev_is_ptp_en(dev)) {
- otx2_info("PTP mode is already enabled ");
+ /* If we are VF/SDP/LBK, ptp cannot not be enabled */
+ if (otx2_dev_is_vf_or_sdp(dev) || otx2_dev_is_lbk(dev)) {
+ otx2_info("PTP cannot be enabled in case of VF/SDP/LBK");
return -EINVAL;
}
- /* If we are VF, no further action can be taken */
- if (otx2_dev_is_vf_or_sdp(dev))
+ if (otx2_ethdev_is_ptp_en(dev)) {
+ otx2_info("PTP mode is already enabled");
return -EINVAL;
+ }
if (!(dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)) {
otx2_err("Ptype offload is disabled, it should be enabled");
@@ -207,6 +252,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
otx2_eth_set_rx_function(eth_dev);
otx2_eth_set_tx_function(eth_dev);
}
+
+ rc = otx2_nix_recalc_mtu(eth_dev);
+ if (rc)
+ otx2_err("Failed to set MTU size for ptp");
+
return rc;
}
@@ -221,8 +271,7 @@ otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
- /* If we are VF, nothing else can be done */
- if (otx2_dev_is_vf_or_sdp(dev))
+ if (otx2_dev_is_vf_or_sdp(dev) || otx2_dev_is_lbk(dev))
return -EINVAL;
dev->rx_offloads &= ~DEV_RX_OFFLOAD_TIMESTAMP;
@@ -240,6 +289,11 @@ otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)
otx2_eth_set_rx_function(eth_dev);
otx2_eth_set_tx_function(eth_dev);
}
+
+ rc = otx2_nix_recalc_mtu(eth_dev);
+ if (rc)
+ otx2_err("Failed to set MTU size for ptp");
+
return rc;
}
diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h
index 1a1ac40bd..351ad0fcb 100644
--- a/drivers/net/octeontx2/otx2_rx.h
+++ b/drivers/net/octeontx2/otx2_rx.h
@@ -58,6 +58,8 @@ otx2_nix_mbuf_to_tstamp(struct rte_mbuf *mbuf,
(mbuf->data_off == RTE_PKTMBUF_HEADROOM +
NIX_TIMESYNC_RX_OFFSET)) {
+ mbuf->pkt_len -= NIX_TIMESYNC_RX_OFFSET;
+
/* Reading the rx timestamp inserted by CGX, viz at
* starting of the packet data.
*/
--
2.18.0
next reply other threads:[~2019-11-11 5:49 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-11 5:48 Harman Kalra [this message]
2019-11-15 8:38 ` Jerin Jacob
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1573451282-27307-1-git-send-email-hkalra@marvell.com \
--to=hkalra@marvell.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ndabilpuram@marvell.com \
--cc=vattunuru@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).