From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C1BE4A04F7; Fri, 20 Dec 2019 08:53:24 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 011BD1F1C; Fri, 20 Dec 2019 08:53:23 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A06DE1252 for ; Fri, 20 Dec 2019 08:53:22 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with ESMTPS (AES256-SHA encrypted); 20 Dec 2019 09:53:21 +0200 Received: from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx [10.210.16.104]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id xBK7rKPY029374; Fri, 20 Dec 2019 09:53:20 +0200 Received: from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1]) by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id xBK7rKuN013568; Fri, 20 Dec 2019 07:53:20 GMT Received: (from viacheslavo@localhost) by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id xBK7rK4f013567; Fri, 20 Dec 2019 07:53:20 GMT X-Authentication-Warning: pegasus11.mtr.labs.mlnx: viacheslavo set sender to viacheslavo@mellanox.com using -f From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: matan@mellanox.com, rasland@mellanox.com, orika@mellanox.com, stable@dpdk.org Date: Fri, 20 Dec 2019 07:53:19 +0000 Message-Id: <1576828399-13525-1-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/mlx5: fix register c0 usage for metadata entities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The register c0 might be engaged to support META and MARK related items and actions. Also, this register might be used by kernel to specify the source vport index. The register c0 is split into two 16-bit fields. Depending on the mask returned by kernel the PMD can use upper or lower half of register c0. This patch adds the missing support for upper half. Fixes: e554b672aa05 ("net/mlx5: support flow tag") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow_dv.c | 39 +++++++++++++++++++++++++++++++++++---- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 893db3e..f8e153c 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1088,6 +1088,14 @@ struct field_modify_info modify_tcp[] = { if (reg < 0) return reg; assert(reg > 0); + if (reg == REG_C_0) { + uint32_t msk_c0 = priv->sh->dv_regc0_mask; + uint32_t shl_c0 = rte_bsf32(msk_c0); + + data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0); + mask = rte_cpu_to_be_32(mask) & msk_c0; + mask = rte_cpu_to_be_32(mask << shl_c0); + } reg_c_x[0].id = reg_to_field[reg]; return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource, MLX5_MODIFICATION_TYPE_SET, error); @@ -5836,6 +5844,15 @@ struct field_modify_info modify_tcp[] = { /* Get the metadata register index for the mark. */ reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL); assert(reg > 0); + if (reg == REG_C_0) { + struct mlx5_priv *priv = dev->data->dev_private; + uint32_t msk_c0 = priv->sh->dv_regc0_mask; + uint32_t shl_c0 = rte_bsf32(msk_c0); + + mask &= msk_c0; + mask <<= shl_c0; + value <<= shl_c0; + } flow_dv_match_meta_reg(matcher, key, reg, value, mask); } } @@ -5917,6 +5934,8 @@ struct field_modify_info modify_tcp[] = { /** * Add tag item to matcher * + * @param[in] dev + * The devich to configure through. * @param[in, out] matcher * Flow matcher. * @param[in, out] key @@ -5925,15 +5944,27 @@ struct field_modify_info modify_tcp[] = { * Flow pattern to translate. */ static void -flow_dv_translate_mlx5_item_tag(void *matcher, void *key, +flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev, + void *matcher, void *key, const struct rte_flow_item *item) { const struct mlx5_rte_flow_item_tag *tag_v = item->spec; const struct mlx5_rte_flow_item_tag *tag_m = item->mask; + uint32_t mask, value; assert(tag_v); - flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data, - tag_m ? tag_m->data : UINT32_MAX); + value = tag_v->data; + mask = tag_m ? tag_m->data : UINT32_MAX; + if (tag_v->id == REG_C_0) { + struct mlx5_priv *priv = dev->data->dev_private; + uint32_t msk_c0 = priv->sh->dv_regc0_mask; + uint32_t shl_c0 = rte_bsf32(msk_c0); + + mask &= msk_c0; + mask <<= shl_c0; + value <<= shl_c0; + } + flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask); } /** @@ -7280,7 +7311,7 @@ struct field_modify_info modify_tcp[] = { last_item = MLX5_FLOW_ITEM_TAG; break; case MLX5_RTE_FLOW_ITEM_TYPE_TAG: - flow_dv_translate_mlx5_item_tag(match_mask, + flow_dv_translate_mlx5_item_tag(dev, match_mask, match_value, items); last_item = MLX5_FLOW_ITEM_TAG; break; -- 1.8.3.1