From: Mahipal Challa <mchalla@marvell.com>
To: <dev@dpdk.org>, <thomas@monjalon.net>
Cc: <Gavin.Hu@arm.com>, <jerinj@marvell.com>, <pathreya@marvell.com>,
<snilla@marvell.com>, <venkatn@marvell.com>
Subject: [dpdk-dev] [PATCH v5 1/6] raw/octeontx2_ep: add build infra and device probe
Date: Mon, 13 Jan 2020 11:30:36 +0530 [thread overview]
Message-ID: <1578895241-22229-2-git-send-email-mchalla@marvell.com> (raw)
In-Reply-To: <1578895241-22229-1-git-send-email-mchalla@marvell.com>
Add the OCTEON TX2 SDP EP device probe along with the
build infrastructure for Make and meson builds.
Signed-off-by: Mahipal Challa <mchalla@marvell.com>
---
MAINTAINERS | 5 +
config/common_base | 5 +
doc/guides/rawdevs/index.rst | 1 +
doc/guides/rawdevs/octeontx2_ep.rst | 41 +++++++
doc/guides/rel_notes/release_20_02.rst | 4 +
drivers/raw/Makefile | 1 +
drivers/raw/meson.build | 1 +
drivers/raw/octeontx2_ep/Makefile | 40 +++++++
drivers/raw/octeontx2_ep/meson.build | 6 +
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 132 +++++++++++++++++++++
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 21 ++++
.../rte_rawdev_octeontx2_ep_version.map | 4 +
mk/rte.app.mk | 2 +
13 files changed, 263 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4395d8d..24f1240 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1173,6 +1173,11 @@ M: Vamsi Attunuru <vattunuru@marvell.com>
F: drivers/raw/octeontx2_dma/
F: doc/guides/rawdevs/octeontx2_dma.rst
+Marvell OCTEON TX2 EP
+M: Mahipal Challa <mchalla@marvell.com>
+F: drivers/raw/octeontx2_ep/
+F: doc/guides/rawdevs/octeontx2_ep.rst
+
NTB
M: Xiaoyun Li <xiaoyun.li@intel.com>
M: Jingjing Wu <jingjing.wu@intel.com>
diff --git a/config/common_base b/config/common_base
index 7dec7ed..8e7dad2 100644
--- a/config/common_base
+++ b/config/common_base
@@ -796,6 +796,11 @@ CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=y
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y
#
+# Compile PMD for octeontx2 EP raw device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV=y
+
+#
# Compile PMD for NTB raw device
#
CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=y
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 22bc013..f64ec44 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,3 +17,4 @@ application through rawdev API.
ioat
ntb
octeontx2_dma
+ octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst b/doc/guides/rawdevs/octeontx2_ep.rst
new file mode 100644
index 0000000..5f5ed01
--- /dev/null
+++ b/doc/guides/rawdevs/octeontx2_ep.rst
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+ Copyright(c) 2019 Marvell International Ltd.
+
+Marvell OCTEON TX2 End Point Rawdev Driver
+==========================================
+
+OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
+by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
+OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
+associated with a set of IOQ pairs.
+
+Features
+--------
+
+This OCTEON TX2 End Point mode PMD supports
+
+#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
+
+#. Packet Output - OCTEON TX2 to Host with info pointer mode.
+
+Config File Options
+~~~~~~~~~~~~~~~~~~~
+
+The following options can be modified in the ``config`` file.
+
+- ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV`` (default ``y``)
+
+ Toggle compilation of the ``lrte_pmd_octeontx2_ep`` driver.
+
+Initialization
+--------------
+
+The number of SDP VFs enabled, can be controlled by setting sysfs
+entry `sriov_numvfs` for the corresponding PF driver.
+
+.. code-block:: console
+
+ echo <num_vfs> > /sys/bus/pci/drivers/octeontx2-ep/0000\:04\:00.0/sriov_numvfs
+
+Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
+bound to vfio-pci driver.
diff --git a/doc/guides/rel_notes/release_20_02.rst b/doc/guides/rel_notes/release_20_02.rst
index 0eaa45a..ec9be83 100644
--- a/doc/guides/rel_notes/release_20_02.rst
+++ b/doc/guides/rel_notes/release_20_02.rst
@@ -56,6 +56,10 @@ New Features
Also, make sure to start the actual text at the margin.
=========================================================
+* **Added Marvell OCTEON TX2 End Point rawdev PMD.**
+
+ Added a new OCTEON TX2 rawdev PMD for End Point mode of operation.
+ See the :doc:`../rawdevs/octeontx2_ep` for more details on this new PMD.
Removed Items
-------------
diff --git a/drivers/raw/Makefile b/drivers/raw/Makefile
index 0b6d13d..80b043e 100644
--- a/drivers/raw/Makefile
+++ b/drivers/raw/Makefile
@@ -13,5 +13,6 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV) += ifpga
DIRS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += ioat
DIRS-$(CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV) += ntb
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += octeontx2_dma
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV) += octeontx2_ep
include $(RTE_SDK)/mk/rte.subdir.mk
diff --git a/drivers/raw/meson.build b/drivers/raw/meson.build
index d7037cd..bb57977 100644
--- a/drivers/raw/meson.build
+++ b/drivers/raw/meson.build
@@ -4,6 +4,7 @@
drivers = ['dpaa2_cmdif', 'dpaa2_qdma',
'ifpga', 'ioat', 'ntb',
'octeontx2_dma',
+ 'octeontx2_ep',
'skeleton']
std_deps = ['rawdev']
config_flag_fmt = 'RTE_LIBRTE_PMD_@0@_RAWDEV'
diff --git a/drivers/raw/octeontx2_ep/Makefile b/drivers/raw/octeontx2_ep/Makefile
new file mode 100644
index 0000000..8cec6bd
--- /dev/null
+++ b/drivers/raw/octeontx2_ep/Makefile
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# Library name
+LIB = librte_rawdev_octeontx2_ep.a
+
+# Build flags
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2/
+CFLAGS += -I$(RTE_SDK)/drivers/raw/octeontx2_ep/
+
+LDLIBS += -lrte_eal
+LDLIBS += -lrte_rawdev
+LDLIBS += -lrte_bus_pci
+LDLIBS += -lrte_mempool
+LDLIBS += -lrte_common_octeontx2
+
+ifneq ($(CONFIG_RTE_ARCH_64),y)
+CFLAGS += -Wno-int-to-pointer-cast
+CFLAGS += -Wno-pointer-to-int-cast
+ifeq ($(CONFIG_RTE_TOOLCHAIN_ICC),y)
+CFLAGS += -diag-disable 2259
+endif
+endif
+
+EXPORT_MAP := rte_rawdev_octeontx2_ep_version.map
+
+LIBABIVER := 1
+
+#
+# All source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV) += otx2_ep_rawdev.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/raw/octeontx2_ep/meson.build b/drivers/raw/octeontx2_ep/meson.build
new file mode 100644
index 0000000..e513131
--- /dev/null
+++ b/drivers/raw/octeontx2_ep/meson.build
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+deps += ['bus_pci', 'common_octeontx2', 'rawdev']
+sources = files('otx2_ep_rawdev.c')
diff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
new file mode 100644
index 0000000..04b4fac
--- /dev/null
+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
@@ -0,0 +1,132 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+#include <string.h>
+#include <unistd.h>
+
+#include <rte_bus.h>
+#include <rte_bus_pci.h>
+#include <rte_eal.h>
+#include <rte_lcore.h>
+#include <rte_mempool.h>
+#include <rte_pci.h>
+
+#include <rte_common.h>
+#include <rte_rawdev.h>
+#include <rte_rawdev_pmd.h>
+
+#include "otx2_common.h"
+#include "otx2_ep_rawdev.h"
+
+static const struct rte_pci_id pci_sdp_vf_map[] = {
+ {
+ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+ PCI_DEVID_OCTEONTX2_EP_VF)
+ },
+ {
+ .vendor_id = 0,
+ },
+};
+
+static int
+otx2_sdp_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,
+ struct rte_pci_device *pci_dev)
+{
+ char name[RTE_RAWDEV_NAME_MAX_LEN];
+ struct sdp_device *sdpvf = NULL;
+ struct rte_rawdev *sdp_rawdev;
+ uint16_t vf_id;
+
+ /* Single process support */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ if (pci_dev->mem_resource[0].addr)
+ otx2_info("SDP_EP BAR0 is mapped:");
+ else {
+ otx2_err("SDP_EP: Failed to map device BARs");
+ otx2_err("BAR0 %p\n BAR2 %p",
+ pci_dev->mem_resource[0].addr,
+ pci_dev->mem_resource[2].addr);
+ return -ENODEV;
+ }
+
+ memset(name, 0, sizeof(name));
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "SDPEP:%x:%02x.%x",
+ pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+
+ /* Allocate rawdev pmd */
+ sdp_rawdev = rte_rawdev_pmd_allocate(name,
+ sizeof(struct sdp_device),
+ rte_socket_id());
+
+ if (sdp_rawdev == NULL) {
+ otx2_err("SDP_EP VF rawdev allocation failed");
+ return -ENOMEM;
+ }
+
+ sdp_rawdev->device = &pci_dev->device;
+ sdp_rawdev->driver_name = pci_dev->driver->driver.name;
+
+ sdpvf = (struct sdp_device *)sdp_rawdev->dev_private;
+ sdpvf->hw_addr = pci_dev->mem_resource[0].addr;
+ sdpvf->pci_dev = pci_dev;
+
+ /* Discover the VF number being probed */
+ vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
+ (pci_dev->addr.function & 0x7);
+
+ vf_id -= 1;
+ sdpvf->vf_num = vf_id;
+
+ otx2_info("SDP_EP VF[%d] probe done", vf_id);
+
+ return 0;
+}
+
+static int
+otx2_sdp_rawdev_remove(struct rte_pci_device *pci_dev)
+{
+ char name[RTE_RAWDEV_NAME_MAX_LEN];
+ struct rte_rawdev *rawdev;
+ struct sdp_device *sdpvf;
+
+ /* Single process support */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ if (pci_dev == NULL) {
+ otx2_err("SDP_EP:invalid pci_dev!");
+ return -EINVAL;
+ }
+
+
+ memset(name, 0, sizeof(name));
+ snprintf(name, RTE_RAWDEV_NAME_MAX_LEN, "SDPEP:%x:%02x.%x",
+ pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+
+ rawdev = rte_rawdev_pmd_get_named_dev(name);
+ if (rawdev == NULL) {
+ otx2_err("SDP_EP: invalid device name (%s)", name);
+ return -EINVAL;
+ }
+
+ sdpvf = (struct sdp_device *)rawdev->dev_private;
+ otx2_info("Removing SDP_EP VF[%d] ", sdpvf->vf_num);
+
+ /* rte_rawdev_close is called by pmd_release */
+ return rte_rawdev_pmd_release(rawdev);
+}
+
+static struct rte_pci_driver rte_sdp_rawdev_pmd = {
+ .id_table = pci_sdp_vf_map,
+ .drv_flags = (RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA),
+ .probe = otx2_sdp_rawdev_probe,
+ .remove = otx2_sdp_rawdev_remove,
+};
+
+RTE_PMD_REGISTER_PCI(sdp_rawdev_pci_driver, rte_sdp_rawdev_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(sdp_rawdev_pci_driver, pci_sdp_vf_map);
+RTE_PMD_REGISTER_KMOD_DEP(sdp_rawdev_pci_driver, "vfio-pci");
diff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
new file mode 100644
index 0000000..7ae7a08
--- /dev/null
+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_EP_RAWDEV_H_
+#define _OTX2_EP_RAWDEV_H_
+
+#define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode */
+
+/* SDP EP VF device */
+struct sdp_device {
+ /* PCI device pointer */
+ struct rte_pci_device *pci_dev;
+ uint16_t vf_num;
+
+ /* Memory mapped h/w address */
+ uint8_t *hw_addr;
+
+};
+
+#endif /* _OTX2_EP_RAWDEV_H_ */
diff --git a/drivers/raw/octeontx2_ep/rte_rawdev_octeontx2_ep_version.map b/drivers/raw/octeontx2_ep/rte_rawdev_octeontx2_ep_version.map
new file mode 100644
index 0000000..ff357af
--- /dev/null
+++ b/drivers/raw/octeontx2_ep/rte_rawdev_octeontx2_ep_version.map
@@ -0,0 +1,4 @@
+DPDK_20.02 {
+
+ local: *;
+};
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 05ea034..24353e9 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -116,6 +116,7 @@ OCTEONTX2-y := $(CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL)
OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO)
OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV)
OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV)
+OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV)
OCTEONTX2-y += $(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD)
ifeq ($(findstring y,$(OCTEONTX2-y)),y)
_LDLIBS-y += -lrte_common_octeontx2
@@ -336,6 +337,7 @@ endif # CONFIG_RTE_LIBRTE_IFPGA_BUS
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV) += -lrte_rawdev_ioat
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV) += -lrte_rawdev_ntb
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += -lrte_rawdev_octeontx2_dma
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV) += -lrte_rawdev_octeontx2_ep
endif # CONFIG_RTE_LIBRTE_RAWDEV
endif # !CONFIG_RTE_BUILD_SHARED_LIBS
--
1.8.3.1
next prev parent reply other threads:[~2020-01-13 6:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-13 6:00 [dpdk-dev] [PATCH v5 0/6] OCTEON TX2 End Point Driver Mahipal Challa
2020-01-13 6:00 ` Mahipal Challa [this message]
2020-01-13 6:00 ` [dpdk-dev] [PATCH v5 2/6] raw/octeontx2_ep: add device configuration Mahipal Challa
2020-01-13 6:00 ` [dpdk-dev] [PATCH v5 3/6] raw/octeontx2_ep: add device uninitialization Mahipal Challa
2020-01-13 6:00 ` [dpdk-dev] [PATCH v5 4/6] raw/octeontx2_ep: add enqueue operation Mahipal Challa
2020-01-13 6:00 ` [dpdk-dev] [PATCH v5 5/6] raw/octeontx2_ep: add dequeue operation Mahipal Challa
2020-01-13 6:00 ` [dpdk-dev] [PATCH v5 6/6] raw/octeontx2_ep: add driver self test Mahipal Challa
2020-01-14 3:39 ` [dpdk-dev] [PATCH v5 0/6] OCTEON TX2 End Point Driver Mahipal Challa
2020-01-20 8:44 ` Thomas Monjalon
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