From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EFC31A0514; Wed, 15 Jan 2020 13:45:01 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 549201C0D5; Wed, 15 Jan 2020 13:44:46 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id E47661C0D0 for ; Wed, 15 Jan 2020 13:44:44 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00FChTCC011685; Wed, 15 Jan 2020 04:44:44 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=tTCL+w6o8oxZFyMeam9EZBBaccw2UDNIMl2yXoGTOgE=; b=iqQVpB4y6lAQuoA9uArB6Z3RxxXy6Nk/gcWvtl/O6I0kte01q6V2o9LNoOZThE1RNX2H WDB1WohY1xC1DOIEckkAYbM3nZAlfzu0S9qzluKKQKbkHdACIxQjCbxAYxliZDIaEcub ET66IjwDBCmC81UN57FpBe5MxEDxBbblbOuPn7ur2dpZfX4M8Zy7+6xkzDwg7JfoKVmv Vyl9Scx/T220xlpMl/wJjqpxrhmzxVYUXQ5Es/l91rGCv0lWzOCZVqUruuN9TaolHncZ cSQTxlc5U9uort5hHZgTeBu+7KlA3pzK5dsJTv9pJYaS0tTTHMORjde7Ek93bX0p6mMf og== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0b-0016f401.pphosted.com with ESMTP id 2xhrhe25rb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 15 Jan 2020 04:44:44 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 15 Jan 2020 04:44:41 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 15 Jan 2020 04:44:41 -0800 Received: from ajoseph83.caveonetworks.com (unknown [10.29.45.60]) by maili.marvell.com (Postfix) with ESMTP id 25BED3F703F; Wed, 15 Jan 2020 04:44:37 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Declan Doherty , Pablo de Lara CC: Sunila Sahu , Fiona Trahe , "Arek Kusztal" , Jerin Jacob , Narayana Prasad , Shally Verma , Ankur Dwivedi , , Anoob Joseph , Balakrishna Bhamidipati Date: Wed, 15 Jan 2020 18:13:38 +0530 Message-ID: <1579092219-15696-4-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1579092219-15696-1-git-send-email-anoobj@marvell.com> References: <1575546206-2478-1-git-send-email-anoobj@marvell.com> <1579092219-15696-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-15_02:2020-01-15, 2020-01-14 signatures=0 Subject: [dpdk-dev] [PATCH v2 3/4] crypto/octeontx2: add ECDSA support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunila Sahu Adding support for ECDSA operations in crypto_octeontx2 PMD. Signed-off-by: Anoob Joseph Signed-off-by: Balakrishna Bhamidipati Signed-off-by: Sunila Sahu --- doc/guides/cryptodevs/features/octeontx2.ini | 8 +++-- .../crypto/octeontx2/otx2_cryptodev_capabilities.c | 11 ++++++ drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 39 ++++++++++++++++++++-- 3 files changed, 54 insertions(+), 4 deletions(-) diff --git a/doc/guides/cryptodevs/features/octeontx2.ini b/doc/guides/cryptodevs/features/octeontx2.ini index 7d07053..dd6369b 100644 --- a/doc/guides/cryptodevs/features/octeontx2.ini +++ b/doc/guides/cryptodevs/features/octeontx2.ini @@ -67,5 +67,9 @@ AES GCM (256) = Y ; Supported Asymmetric algorithms of the 'octeontx2' crypto driver. ; [Asymmetric] -RSA = Y -Modular Exponentiation = Y +RSA = Y +DSA = +Modular Exponentiation = Y +Modular Inversion = +Diffie-hellman = +ECDSA = Y diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c index b9e3fe3..f2079e2 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_capabilities.c @@ -628,6 +628,17 @@ rte_cryptodev_capabilities otx2_cpt_capabilities[] = { } }, } }, + { /* ECDSA */ + .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, + {.asym = { + .xform_capa = { + .xform_type = RTE_CRYPTO_ASYM_XFORM_ECDSA, + .op_types = ((1 << RTE_CRYPTO_ASYM_OP_SIGN) | + (1 << RTE_CRYPTO_ASYM_OP_VERIFY)), + } + }, + } + }, /* End of asymmetric capabilities */ RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() }; diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c index 65101b0..17c755d 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c @@ -22,6 +22,8 @@ #define METABUF_POOL_CACHE_SIZE 512 +static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX]; + /* Forward declarations */ static int @@ -440,6 +442,11 @@ otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp, if (unlikely(ret)) goto req_fail; break; + case RTE_CRYPTO_ASYM_XFORM_ECDSA: + ret = cpt_enqueue_ecdsa_op(op, ¶ms, sess, otx2_fpm_iova); + if (unlikely(ret)) + goto req_fail; + break; default: op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; ret = -EINVAL; @@ -641,6 +648,23 @@ otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req, } } +static __rte_always_inline void +otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa, + struct cpt_request_info *req, + struct cpt_asym_ec_ctx *ec) +{ + int prime_len = ec_grp[ec->curveid].prime.length; + + if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY) + return; + + /* Separate out sign r and s components */ + memcpy(ecdsa->r.data, req->rptr, prime_len); + memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len); + ecdsa->r.length = prime_len; + ecdsa->s.length = prime_len; +} + static void otx2_cpt_asym_post_process(struct rte_crypto_op *cop, struct cpt_request_info *req) @@ -660,6 +684,9 @@ otx2_cpt_asym_post_process(struct rte_crypto_op *cop, memcpy(op->modex.result.data, req->rptr, op->modex.result.length); break; + case RTE_CRYPTO_ASYM_XFORM_ECDSA: + otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx); + break; default: CPT_LOG_DP_DEBUG("Invalid crypto xform type"); cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS; @@ -824,6 +851,13 @@ otx2_cpt_dev_config(struct rte_cryptodev *dev, dev->feature_flags &= ~conf->ff_disable; + if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) { + /* Initialize shared FPM table */ + ret = cpt_fpm_init(otx2_fpm_iova); + if (ret) + return ret; + } + /* Unregister error interrupts */ if (vf->err_intr_registered) otx2_cpt_err_intr_unregister(dev); @@ -881,9 +915,10 @@ otx2_cpt_dev_start(struct rte_cryptodev *dev) static void otx2_cpt_dev_stop(struct rte_cryptodev *dev) { - RTE_SET_USED(dev); - CPT_PMD_INIT_FUNC_TRACE(); + + if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) + cpt_fpm_clear(); } static int -- 2.7.4