From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 77899A051C; Sat, 18 Jan 2020 11:51:53 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5920B1BF9D; Sat, 18 Jan 2020 11:51:23 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 8C7031BF7B for ; Sat, 18 Jan 2020 11:51:16 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00IAjQOg009563; Sat, 18 Jan 2020 02:51:15 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=Hkz+f31n5KZ/VJ+96Nlmk+QiTj7Hloaot4UZPv4j2mw=; b=Mw1gCazxoy4JOgJmh3dPUmLKimskyexSXQsihdxB8BEynYRnrvscBB0hlu5qze8eX4X9 Px2z4oELksWIPrSszRaY5idzZVNLTs1f7IMpMMKJcZzUjfDQt59TaF8tyzFSVxruVqqG EFolG39Ym6Ex1y4B4IZfllA7NDQMqeLAjdV346+7ufLutoRYgIxr18fnLr8DPa2xKP08 zW9Pt9f3xYNXilp1QBx/0kg0KpVRdGlY+D3FsPcPiem0lsmruNHo/p6D5VQxoEdHI+Pw 5SlDYNbKaOWE0ldBDnw30K/WBm4nMj2Ov7SrCRqsN9CKUH2sBpU2BX6Wrxeqj5mCpAIu Ug== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2xm08v01rf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 18 Jan 2020 02:51:15 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 18 Jan 2020 02:51:14 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 18 Jan 2020 02:51:14 -0800 Received: from ajoseph83.caveonetworks.com (unknown [10.29.45.60]) by maili.marvell.com (Postfix) with ESMTP id 1A4143F703F; Sat, 18 Jan 2020 02:51:09 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Declan Doherty , Thomas Monjalon CC: Vamsi Attunuru , Jerin Jacob , Narayana Prasad , Kiran Kumar K , Nithin Dabilpuram , "Pavan Nikhilesh" , Ankur Dwivedi , Anoob Joseph , Archana Muniganti , Tejasree Kondoj , Lukasz Bartosik , Date: Sat, 18 Jan 2020 16:19:13 +0530 Message-ID: <1579344553-11428-16-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1579344553-11428-1-git-send-email-anoobj@marvell.com> References: <1575806094-28391-1-git-send-email-anoobj@marvell.com> <1579344553-11428-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-18_02:2020-01-16, 2020-01-18 signatures=0 Subject: [dpdk-dev] [PATCH v2 15/15] crypto/octeontx2: sync inline tag type cfg with Rx adapter configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vamsi Attunuru Tag type configuration for the inline processed packets is set during ethdev configuration, it might conflict with tag type configuration done during Rx adapter configuration which would be setup later. This conflict is fixed as part of flow rule creation by updating tag type config of inline same as Rx adapter configured tag type. Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj Signed-off-by: Vamsi Attunuru --- drivers/common/octeontx2/otx2_common.h | 2 ++ drivers/crypto/octeontx2/otx2_cryptodev.c | 2 ++ drivers/crypto/octeontx2/otx2_security.c | 28 ++++++++++++++++++++++++++++ drivers/crypto/octeontx2/otx2_security.h | 2 ++ drivers/net/octeontx2/otx2_flow.c | 26 ++++++++++++++++++++++++++ 5 files changed, 60 insertions(+) diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h index 88b4b63..01d3a35 100644 --- a/drivers/common/octeontx2/otx2_common.h +++ b/drivers/common/octeontx2/otx2_common.h @@ -81,12 +81,14 @@ typedef int (*otx2_sec_eth_ctx_create_t)(struct rte_eth_dev *eth_dev); typedef void (*otx2_sec_eth_ctx_destroy_t)(struct rte_eth_dev *eth_dev); typedef int (*otx2_sec_eth_init_t)(struct rte_eth_dev *eth_dev); typedef void (*otx2_sec_eth_fini_t)(struct rte_eth_dev *eth_dev); +typedef int (*otx2_sec_eth_update_tag_type_t)(struct rte_eth_dev *eth_dev); struct otx2_sec_eth_crypto_idev_ops { otx2_sec_eth_ctx_create_t ctx_create; otx2_sec_eth_ctx_destroy_t ctx_destroy; otx2_sec_eth_init_t init; otx2_sec_eth_fini_t fini; + otx2_sec_eth_update_tag_type_t update_tag_type; }; extern struct otx2_sec_eth_crypto_idev_ops otx2_sec_idev_ops; diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c index 34feb82..b944a51 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev.c @@ -160,4 +160,6 @@ RTE_INIT(otx2_cpt_init_log) otx2_sec_idev_ops.ctx_destroy = otx2_sec_eth_ctx_destroy; otx2_sec_idev_ops.init = otx2_sec_eth_init; otx2_sec_idev_ops.fini = otx2_sec_eth_fini; + otx2_sec_idev_ops.update_tag_type = otx2_sec_eth_update_tag_type; + } diff --git a/drivers/crypto/octeontx2/otx2_security.c b/drivers/crypto/octeontx2/otx2_security.c index 9a08849..37b9e54 100644 --- a/drivers/crypto/octeontx2/otx2_security.c +++ b/drivers/crypto/octeontx2/otx2_security.c @@ -710,6 +710,34 @@ sec_eth_ipsec_cfg(struct rte_eth_dev *eth_dev, uint8_t tt) } int +otx2_sec_eth_update_tag_type(struct rte_eth_dev *eth_dev) +{ + struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + struct otx2_mbox *mbox = dev->mbox; + struct nix_aq_enq_rsp *rsp; + struct nix_aq_enq_req *aq; + int ret; + + aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox); + aq->qidx = 0; /* Read RQ:0 context */ + aq->ctype = NIX_AQ_CTYPE_RQ; + aq->op = NIX_AQ_INSTOP_READ; + + ret = otx2_mbox_process_msg(mbox, (void *)&rsp); + if (ret < 0) { + otx2_err("Could not read RQ context"); + return ret; + } + + /* Update tag type */ + ret = sec_eth_ipsec_cfg(eth_dev, rsp->rq.sso_tt); + if (ret < 0) + otx2_err("Could not update sec eth tag type"); + + return ret; +} + +int otx2_sec_eth_init(struct rte_eth_dev *eth_dev) { const size_t sa_width = sizeof(struct otx2_ipsec_fp_in_sa); diff --git a/drivers/crypto/octeontx2/otx2_security.h b/drivers/crypto/octeontx2/otx2_security.h index fe7c883..3615273 100644 --- a/drivers/crypto/octeontx2/otx2_security.h +++ b/drivers/crypto/octeontx2/otx2_security.h @@ -146,6 +146,8 @@ int otx2_sec_eth_ctx_create(struct rte_eth_dev *eth_dev); void otx2_sec_eth_ctx_destroy(struct rte_eth_dev *eth_dev); +int otx2_sec_eth_update_tag_type(struct rte_eth_dev *eth_dev); + int otx2_sec_eth_init(struct rte_eth_dev *eth_dev); void otx2_sec_eth_fini(struct rte_eth_dev *eth_dev); diff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c index f1fb9f9..dea5337 100644 --- a/drivers/net/octeontx2/otx2_flow.c +++ b/drivers/net/octeontx2/otx2_flow.c @@ -299,6 +299,22 @@ flow_free_rss_action(struct rte_eth_dev *eth_dev, return 0; } +static int +flow_update_sec_tt(struct rte_eth_dev *eth_dev, + const struct rte_flow_action actions[]) +{ + int rc = 0; + + for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { + if (actions->type == RTE_FLOW_ACTION_TYPE_SECURITY) { + if (otx2_sec_idev_ops.update_tag_type != NULL) + rc = otx2_sec_idev_ops.update_tag_type(eth_dev); + break; + } + } + + return rc; +} static int flow_parse_meta_items(__rte_unused struct otx2_parse_state *pst) @@ -491,6 +507,16 @@ otx2_flow_create(struct rte_eth_dev *dev, goto err_exit; } + if (hw->rx_offloads & DEV_RX_OFFLOAD_SECURITY) { + rc = flow_update_sec_tt(dev, actions); + if (rc != 0) { + rte_flow_error_set(error, EIO, + RTE_FLOW_ERROR_TYPE_UNSPECIFIED, + NULL, + "Failed to update tt with sec act"); + goto err_exit; + } + } list = &hw->npc_flow.flow_list[flow->priority]; /* List in ascending order of mcam entries */ -- 2.7.4