From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4C5ACA051C; Sat, 18 Jan 2020 11:50:09 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 56D9044C7; Sat, 18 Jan 2020 11:50:07 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id CC3F144C7 for ; Sat, 18 Jan 2020 11:50:05 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00IAm3Qe018843; Sat, 18 Jan 2020 02:50:05 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=kfYiIi9gYk8rQz3ZiavAnaoYM76MKnZmHfW32oyQLHg=; b=DviqiN1Tsqf8rP5e7znhF4F0AonsaBGkoEiLI02rJqn5jcX65BzhLZje9Vou05TIXBRW G2zR5DI/WMJ3BhXPu/6zMG72bEnDH/V08Mf5u3NVbuR7EEaOFy/veN6dgLqBqZ4GUdGa WpYIkk8gqw6Vgy1lf6JGPMTQJ8iLNtk1K2SE0rz5wZJ0iATWXqQ/3nkrT9RgHTlL5Qle C6/2q2G9kLQ9HvybCuSGdtz5I+enT0yzz/vR8qDIKKfxfkBZwsLYHbqa+FQcbYY9Nwvn 9lGtlnCvEQnVwrZKrJeczkQqcCC0OkbKxe3ab0aspkx2yhkbeKZ4kZIh52EBX1mcVqA6 +Q== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2xk0sn6eff-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 18 Jan 2020 02:50:05 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 18 Jan 2020 02:50:02 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 18 Jan 2020 02:50:02 -0800 Received: from ajoseph83.caveonetworks.com (unknown [10.29.45.60]) by maili.marvell.com (Postfix) with ESMTP id 8024C3F703F; Sat, 18 Jan 2020 02:49:58 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Declan Doherty , Thomas Monjalon CC: Anoob Joseph , Jerin Jacob , Narayana Prasad , Kiran Kumar K , Nithin Dabilpuram , "Pavan Nikhilesh" , Ankur Dwivedi , Archana Muniganti , Tejasree Kondoj , Vamsi Attunuru , "Lukasz Bartosik" , Date: Sat, 18 Jan 2020 16:19:02 +0530 Message-ID: <1579344553-11428-5-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1579344553-11428-1-git-send-email-anoobj@marvell.com> References: <1575806094-28391-1-git-send-email-anoobj@marvell.com> <1579344553-11428-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-18_02:2020-01-16, 2020-01-18 signatures=0 Subject: [dpdk-dev] [PATCH v2 04/15] crypto/octeontx2: create eth security ctx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adding security ctx to the eth device. Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj Signed-off-by: Vamsi Attunuru --- drivers/common/octeontx2/otx2_common.c | 2 ++ drivers/common/octeontx2/otx2_common.h | 10 +++++++ .../octeontx2/rte_common_octeontx2_version.map | 2 ++ drivers/crypto/octeontx2/Makefile | 3 +- drivers/crypto/octeontx2/meson.build | 4 ++- drivers/crypto/octeontx2/otx2_cryptodev.c | 4 +++ drivers/crypto/octeontx2/otx2_security.c | 35 ++++++++++++++++++++++ drivers/crypto/octeontx2/otx2_security.h | 14 +++++++++ drivers/net/octeontx2/otx2_ethdev.c | 18 ++++++++++- 9 files changed, 89 insertions(+), 3 deletions(-) create mode 100644 drivers/crypto/octeontx2/otx2_security.c create mode 100644 drivers/crypto/octeontx2/otx2_security.h diff --git a/drivers/common/octeontx2/otx2_common.c b/drivers/common/octeontx2/otx2_common.c index 2f9b167..5c41822 100644 --- a/drivers/common/octeontx2/otx2_common.c +++ b/drivers/common/octeontx2/otx2_common.c @@ -11,6 +11,8 @@ #include "otx2_dev.h" #include "otx2_mbox.h" +struct otx2_sec_eth_crypto_idev_ops otx2_sec_idev_ops; + /** * @internal * Set default NPA configuration. diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h index db0cde1..4e8d0af 100644 --- a/drivers/common/octeontx2/otx2_common.h +++ b/drivers/common/octeontx2/otx2_common.h @@ -77,6 +77,16 @@ void otx2_npa_set_defaults(struct otx2_idev_cfg *idev); int otx2_npa_lf_active(void *dev); int otx2_npa_lf_obj_ref(void); +typedef int (*otx2_sec_eth_ctx_create_t)(struct rte_eth_dev *eth_dev); +typedef void (*otx2_sec_eth_ctx_destroy_t)(struct rte_eth_dev *eth_dev); + +struct otx2_sec_eth_crypto_idev_ops { + otx2_sec_eth_ctx_create_t ctx_create; + otx2_sec_eth_ctx_destroy_t ctx_destroy; +}; + +extern struct otx2_sec_eth_crypto_idev_ops otx2_sec_idev_ops; + /* Log */ extern int otx2_logtype_base; extern int otx2_logtype_mbox; diff --git a/drivers/common/octeontx2/rte_common_octeontx2_version.map b/drivers/common/octeontx2/rte_common_octeontx2_version.map index bd9fc41..1a43bb6 100644 --- a/drivers/common/octeontx2/rte_common_octeontx2_version.map +++ b/drivers/common/octeontx2/rte_common_octeontx2_version.map @@ -32,5 +32,7 @@ DPDK_20.0 { otx2_sso_pf_func_set; otx2_unregister_irq; + otx2_sec_idev_ops; + local: *; }; diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile index 3ba67ed..d2e9b9f 100644 --- a/drivers/crypto/octeontx2/Makefile +++ b/drivers/crypto/octeontx2/Makefile @@ -11,7 +11,7 @@ LIB = librte_pmd_octeontx2_crypto.a CFLAGS += $(WERROR_FLAGS) LDLIBS += -lrte_eal -lrte_ethdev -lrte_mbuf -lrte_mempool -lrte_ring -LDLIBS += -lrte_cryptodev +LDLIBS += -lrte_cryptodev -lrte_security LDLIBS += -lrte_pci -lrte_bus_pci LDLIBS += -lrte_common_cpt -lrte_common_octeontx2 @@ -38,6 +38,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_capabilities.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_hw_access.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_mbox.c SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_cryptodev_ops.c +SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO) += otx2_security.c # export include files SYMLINK-y-include += diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build index 67deca3..f7b2937 100644 --- a/drivers/crypto/octeontx2/meson.build +++ b/drivers/crypto/octeontx2/meson.build @@ -9,6 +9,7 @@ deps += ['bus_pci'] deps += ['common_cpt'] deps += ['common_octeontx2'] deps += ['ethdev'] +deps += ['security'] name = 'octeontx2_crypto' allow_experimental_apis = true @@ -16,7 +17,8 @@ sources = files('otx2_cryptodev.c', 'otx2_cryptodev_capabilities.c', 'otx2_cryptodev_hw_access.c', 'otx2_cryptodev_mbox.c', - 'otx2_cryptodev_ops.c') + 'otx2_cryptodev_ops.c', + 'otx2_security.c') extra_flags = [] # This integrated controller runs only on a arm64 machine, remove 32bit warnings diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c index 7fd216b..86c1188 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev.c @@ -17,6 +17,7 @@ #include "otx2_cryptodev_mbox.h" #include "otx2_cryptodev_ops.h" #include "otx2_dev.h" +#include "otx2_security.h" /* CPT common headers */ #include "cpt_common.h" @@ -154,4 +155,7 @@ RTE_INIT(otx2_cpt_init_log) otx2_cpt_logtype = rte_log_register("pmd.crypto.octeontx2"); if (otx2_cpt_logtype >= 0) rte_log_set_level(otx2_cpt_logtype, RTE_LOG_NOTICE); + + otx2_sec_idev_ops.ctx_create = otx2_sec_eth_ctx_create; + otx2_sec_idev_ops.ctx_destroy = otx2_sec_eth_ctx_destroy; } diff --git a/drivers/crypto/octeontx2/otx2_security.c b/drivers/crypto/octeontx2/otx2_security.c new file mode 100644 index 0000000..531c78b --- /dev/null +++ b/drivers/crypto/octeontx2/otx2_security.c @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2020 Marvell International Ltd. + */ + +#include +#include +#include + +#include "otx2_security.h" + +int +otx2_sec_eth_ctx_create(struct rte_eth_dev *eth_dev) +{ + struct rte_security_ctx *ctx; + + ctx = rte_malloc("otx2_sec_eth_ctx", + sizeof(struct rte_security_ctx), 0); + if (ctx == NULL) + return -ENOMEM; + + /* Populate ctx */ + + ctx->device = eth_dev; + ctx->sess_cnt = 0; + + eth_dev->security_ctx = ctx; + + return 0; +} + +void +otx2_sec_eth_ctx_destroy(struct rte_eth_dev *eth_dev) +{ + rte_free(eth_dev->security_ctx); +} diff --git a/drivers/crypto/octeontx2/otx2_security.h b/drivers/crypto/octeontx2/otx2_security.h new file mode 100644 index 0000000..21b7da4 --- /dev/null +++ b/drivers/crypto/octeontx2/otx2_security.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2020 Marvell International Ltd. + */ + +#ifndef __OTX2_SECURITY_H__ +#define __OTX2_SECURITY_H__ + +#include + +int otx2_sec_eth_ctx_create(struct rte_eth_dev *eth_dev); + +void otx2_sec_eth_ctx_destroy(struct rte_eth_dev *eth_dev); + +#endif /* __OTX2_SECURITY_H__ */ diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index ed32927..3e19ac2 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -2236,10 +2236,19 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev) dev->hwcap |= OTX2_FIXUP_F_LIMIT_CQ_FULL; } + /* Create security ctx */ + if (otx2_sec_idev_ops.ctx_create != NULL) { + rc = otx2_sec_idev_ops.ctx_create(eth_dev); + if (rc) + goto free_mac_addrs; + dev->tx_offload_capa |= DEV_TX_OFFLOAD_SECURITY; + dev->rx_offload_capa |= DEV_RX_OFFLOAD_SECURITY; + } + /* Initialize rte-flow */ rc = otx2_flow_init(dev); if (rc) - goto free_mac_addrs; + goto sec_ctx_destroy; otx2_nix_mc_filter_init(dev); @@ -2250,6 +2259,9 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev) dev->rx_offload_capa, dev->tx_offload_capa); return 0; +sec_ctx_destroy: + if (otx2_sec_idev_ops.ctx_destroy != NULL) + otx2_sec_idev_ops.ctx_destroy(eth_dev); free_mac_addrs: rte_free(eth_dev->data->mac_addrs); unregister_irq: @@ -2333,6 +2345,10 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close) if (rc) otx2_err("Failed to cleanup npa lf, rc=%d", rc); + /* Destroy security ctx */ + if (otx2_sec_idev_ops.ctx_destroy != NULL) + otx2_sec_idev_ops.ctx_destroy(eth_dev); + rte_free(eth_dev->data->mac_addrs); eth_dev->data->mac_addrs = NULL; dev->drv_inited = false; -- 2.7.4