From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8B1AAA0531; Tue, 4 Feb 2020 12:18:11 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3BB4A1C00F; Tue, 4 Feb 2020 12:18:10 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 7B0801BFA3 for ; Tue, 4 Feb 2020 12:18:08 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 014BGSHe011980; Tue, 4 Feb 2020 03:18:07 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=DXO0NpLCQdqZotElLwt8vP8eGfrAlFS73jl7W2GpIT4=; b=D+hw4MdUC64pkewdsImXCgYYrlVW8OkiiRX/bDDZ4YbG11D33CLsbJIL4B31Qf3/PW32 u66vJSnCuUKCobQfQOBL7FqTq/8PhXua0cKj5BHYhh+8UjoX7HBQ3miVPt6ndO8Iewvw dyK/o2hR+Lo8glWGHoOuQRYz86VR8tv/XKcz64gRqyoo/ESeC3z1WevLu65hs+MYe0K8 NYy5fll5ydXLhMIgWpKOFeBqRXsMtS8a1XrYohT9MXzWrAv0FeWb6EEmctbpytxF4JsQ /NBLPBfHfYvapXuCNsUwI7pcZJBhU6yY1q7SrX6ObhlQHN1PR6fdmrhazdfYJ/ttvRUT zA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2xw9qukfxq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 04 Feb 2020 03:18:07 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 Feb 2020 03:18:05 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 Feb 2020 03:18:04 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 4 Feb 2020 03:18:04 -0800 Received: from ajoseph83.caveonetworks.com (unknown [10.29.45.60]) by maili.marvell.com (Postfix) with ESMTP id 7999C3F7068; Tue, 4 Feb 2020 03:18:00 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Declan Doherty , Thomas Monjalon CC: Anoob Joseph , Jerin Jacob , Narayana Prasad , Kiran Kumar K , Nithin Dabilpuram , "Pavan Nikhilesh" , Ankur Dwivedi , Archana Muniganti , Tejasree Kondoj , Vamsi Attunuru , "Lukasz Bartosik" , Date: Tue, 4 Feb 2020 16:47:10 +0530 Message-ID: <1580815045-32132-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580465035-30455-1-git-send-email-anoobj@marvell.com> References: <1580465035-30455-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-02-04_02:2020-02-04, 2020-02-04 signatures=0 Subject: [dpdk-dev] [PATCH v4 00/15] add OCTEON TX2 inline IPsec support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This series adds inline IPsec support in OCTEON TX2 PMD. In the inbound path, rte_flow framework need to be used to configure the NPC block, which does the h/w lookup. The packets would get processed by the crypto block and would submit to the scheduling block, SSO. So inline IPsec mode can be enabled only when traffic is received via event device using Rx adapter. In the outbound path, the core would submit to the crypto block and the crypto block would submit the packet for Tx internally. v4: * Reverted meson.build file edit in patch 14/15 v3: * Moved ethdev security ops to net/octeontx2 * Segregated all security related code in common to common/octeontx2/otx2_sec* files * Segregated all security related control code in net to net/octeontx2/otx2_ethdev_sec* files * Claimed maintainership for all files added above * Added support for AES-CBC v2: * Minimized additions to common/octeontx2 * Updated release notes * Renamed otx2_is_ethdev to otx2_ethdev_is_sec_capable Ankur Dwivedi (3): net/octeontx2: add eth security capabilities net/octeontx2: add datapath ops in eth security ctx net/octeontx2: add inline Tx path changes Anoob Joseph (4): common/octeontx2: add CPT LF mbox for inline inbound net/octeontx2: create eth security ctx crypto/octeontx2: enable CPT to share QP with ethdev net/octeontx2: add eth security session operations Archana Muniganti (3): net/octeontx2: add lookup mem changes to hold sa indices drivers/octeontx2: add sec in Rx fastpath framework drivers/octeontx2: add sec in Tx fastpath framework Tejasree Kondoj (3): crypto/octeontx2: configure for inline IPsec net/octeontx2: add security in eth dev configure net/octeontx2: add inline ipsec Rx path changes Vamsi Attunuru (2): common/octeontx2: add routine to check if sec capable otx2 net/octeontx2: sync inline tag type MAINTAINERS | 6 + doc/guides/nics/octeontx2.rst | 20 + doc/guides/rel_notes/release_20_02.rst | 9 + drivers/common/octeontx2/Makefile | 1 + drivers/common/octeontx2/meson.build | 1 + drivers/common/octeontx2/otx2_common.h | 4 + drivers/common/octeontx2/otx2_mbox.h | 7 + drivers/common/octeontx2/otx2_sec_idev.c | 183 +++++ drivers/common/octeontx2/otx2_sec_idev.h | 37 + .../octeontx2/rte_common_octeontx2_version.map | 6 + drivers/crypto/octeontx2/Makefile | 6 +- drivers/crypto/octeontx2/meson.build | 4 + .../crypto/octeontx2/otx2_cryptodev_hw_access.h | 22 +- drivers/crypto/octeontx2/otx2_cryptodev_mbox.c | 54 ++ drivers/crypto/octeontx2/otx2_cryptodev_mbox.h | 7 + drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 56 ++ drivers/crypto/octeontx2/otx2_cryptodev_qp.h | 35 + drivers/crypto/octeontx2/otx2_ipsec_fp.h | 350 +++++++++ drivers/event/octeontx2/Makefile | 1 + drivers/event/octeontx2/meson.build | 2 + drivers/event/octeontx2/otx2_evdev.c | 170 +++-- drivers/event/octeontx2/otx2_evdev.h | 4 +- drivers/event/octeontx2/otx2_worker.c | 6 +- drivers/event/octeontx2/otx2_worker.h | 6 + drivers/event/octeontx2/otx2_worker_dual.c | 6 +- drivers/net/octeontx2/Makefile | 4 + drivers/net/octeontx2/meson.build | 7 +- drivers/net/octeontx2/otx2_ethdev.c | 38 +- drivers/net/octeontx2/otx2_ethdev.h | 2 + drivers/net/octeontx2/otx2_ethdev_devargs.c | 19 + drivers/net/octeontx2/otx2_ethdev_sec.c | 844 +++++++++++++++++++++ drivers/net/octeontx2/otx2_ethdev_sec.h | 139 ++++ drivers/net/octeontx2/otx2_ethdev_sec_tx.h | 181 +++++ drivers/net/octeontx2/otx2_flow.c | 26 + drivers/net/octeontx2/otx2_lookup.c | 11 +- drivers/net/octeontx2/otx2_rx.c | 27 +- drivers/net/octeontx2/otx2_rx.h | 377 ++++++--- drivers/net/octeontx2/otx2_tx.c | 29 +- drivers/net/octeontx2/otx2_tx.h | 271 +++++-- 39 files changed, 2696 insertions(+), 282 deletions(-) create mode 100644 drivers/common/octeontx2/otx2_sec_idev.c create mode 100644 drivers/common/octeontx2/otx2_sec_idev.h create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_qp.h create mode 100644 drivers/crypto/octeontx2/otx2_ipsec_fp.h create mode 100644 drivers/net/octeontx2/otx2_ethdev_sec.c create mode 100644 drivers/net/octeontx2/otx2_ethdev_sec.h create mode 100644 drivers/net/octeontx2/otx2_ethdev_sec_tx.h -- 2.7.4