From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
by inbox.dpdk.org (Postfix) with ESMTP id 5CE37A0555;
Thu, 20 Feb 2020 09:04:46 +0100 (CET)
Received: from [92.243.14.124] (localhost [127.0.0.1])
by dpdk.org (Postfix) with ESMTP id 3DEAC1BFB6;
Thu, 20 Feb 2020 09:02:59 +0100 (CET)
Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com
[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 002091BFB6
for <dev@dpdk.org>; Thu, 20 Feb 2020 09:02:56 +0100 (CET)
Received: from pps.filterd (m0045849.ppops.net [127.0.0.1])
by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id
01K81JMr016880; Thu, 20 Feb 2020 00:02:56 -0800
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;
h=from : to : cc :
subject : date : message-id : in-reply-to : references : mime-version :
content-type; s=pfpt0818; bh=arEaKmkTS1wcWfy8HHCB+zWqbi3RV+VRF6r8yMhbKwQ=;
b=oLMMNSMSL5ClCJwIegn6po7ANJLWMeN6eTn8nn0WIPU/dIVlWByODV80H9U/x17PQ0xo
lBTHvzzPsziJO0/yX4PwjK0HSecDka8NqDROCPvO5lvcCZAbqOPB/fMZfQ0ZluOaWhxE
411owJguQh80HI/A1zHyIeZ7FUwMpfS3zMrTv/6dk9GQ5cFYA8Pxal88ofOU5NGIllK8
bta24Ytst1NB26rEQlmWz1ch9Dv+0avXWIBSmEfCLOBS+KcuuD7bW8fYnfjNfGmimnYe
iWA0NOvGAuNJtmTjoQPyfsZoXV/BIa5qnue+YaB/1Ga/LWzfyZVq8H6pQqDOEw/RO/z8 Ow==
Received: from sc-exch03.marvell.com ([199.233.58.183])
by mx0a-0016f401.pphosted.com with ESMTP id 2y8ubhefkn-1
(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);
Thu, 20 Feb 2020 00:02:56 -0800
Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com
(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2;
Thu, 20 Feb 2020 00:02:54 -0800
Received: from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH01.marvell.com
(10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;
Thu, 20 Feb 2020 00:02:54 -0800
Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com
(10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend
Transport; Thu, 20 Feb 2020 00:02:53 -0800
Received: from luke.marvell.com (unknown [10.95.130.24])
by maili.marvell.com (Postfix) with ESMTP id 023C33F7040;
Thu, 20 Feb 2020 00:02:50 -0800 (PST)
From: Lukasz Bartosik <lbartosik@marvell.com>
To: Akhil Goyal <akhil.goyal@nxp.com>, Radu Nicolau <radu.nicolau@intel.com>,
Thomas Monjalon <thomas@monjalon.net>
CC: Jerin Jacob <jerinj@marvell.com>, Narayana Prasad <pathreya@marvell.com>,
Ankur Dwivedi <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,
Archana Muniganti <marchana@marvell.com>, Tejasree Kondoj
<ktejasree@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>,
"Konstantin Ananyev" <konstantin.ananyev@intel.com>, <dev@dpdk.org>
Date: Thu, 20 Feb 2020 09:02:05 +0100
Message-ID: <1582185727-6749-14-git-send-email-lbartosik@marvell.com>
X-Mailer: git-send-email 2.7.4
In-Reply-To: <1582185727-6749-1-git-send-email-lbartosik@marvell.com>
References: <1580824721-21527-1-git-send-email-lbartosik@marvell.com>
<1582185727-6749-1-git-send-email-lbartosik@marvell.com>
MIME-Version: 1.0
Content-Type: text/plain
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572
definitions=2020-02-20_02:2020-02-19,
2020-02-20 signatures=0
Subject: [dpdk-dev] [PATCH v4 13/15] examples/ipsec-secgw: make number of
buffers dynamic
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>
Make number of buffers in a pool nb_mbuf_in_pool dependent on number
of ports, cores and crypto queues. Add command line option -s which
when used overrides dynamic calculation of number of buffers in a pool.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com>
---
examples/ipsec-secgw/ipsec-secgw.c | 71 ++++++++++++++++++++++++++++++++------
1 file changed, 60 insertions(+), 11 deletions(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index c98620e..341e7b4 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -60,8 +60,6 @@ volatile bool force_quit;
#define MEMPOOL_CACHE_SIZE 256
-#define NB_MBUF (32000)
-
#define CDEV_QUEUE_DESC 2048
#define CDEV_MAP_ENTRIES 16384
#define CDEV_MP_NB_OBJS 1024
@@ -164,6 +162,7 @@ static int32_t promiscuous_on = 1;
static int32_t numa_on = 1; /**< NUMA is enabled by default. */
static uint32_t nb_lcores;
static uint32_t single_sa;
+static uint32_t nb_bufs_in_pool;
/*
* RX/TX HW offload capabilities to enable/use on ethernet ports.
@@ -1274,6 +1273,7 @@ print_usage(const char *prgname)
" [-e]"
" [-a]"
" [-c]"
+ " [-s NUMBER_OF_MBUFS_IN_PKT_POOL]"
" -f CONFIG_FILE"
" --config (port,queue,lcore)[,(port,queue,lcore)]"
" [--single-sa SAIDX]"
@@ -1297,6 +1297,9 @@ print_usage(const char *prgname)
" -a enables SA SQN atomic behaviour\n"
" -c specifies inbound SAD cache size,\n"
" zero value disables the cache (default value: 128)\n"
+ " -s number of mbufs in packet pool, if not specified number\n"
+ " of mbufs will be calculated based on number of cores,\n"
+ " ports and crypto queues\n"
" -f CONFIG_FILE: Configuration file\n"
" --config (port,queue,lcore): Rx queue configuration\n"
" --single-sa SAIDX: In poll mode use single SA index for\n"
@@ -1496,7 +1499,7 @@ parse_args(int32_t argc, char **argv, struct eh_conf *eh_conf)
argvopt = argv;
- while ((opt = getopt_long(argc, argvopt, "aelp:Pu:f:j:w:c:",
+ while ((opt = getopt_long(argc, argvopt, "aelp:Pu:f:j:w:c:s:",
lgopts, &option_index)) != EOF) {
switch (opt) {
@@ -1530,6 +1533,19 @@ parse_args(int32_t argc, char **argv, struct eh_conf *eh_conf)
cfgfile = optarg;
f_present = 1;
break;
+
+ case 's':
+ ret = parse_decimal(optarg);
+ if (ret < 0) {
+ printf("Invalid number of buffers in a pool: "
+ "%s\n", optarg);
+ print_usage(prgname);
+ return -1;
+ }
+
+ nb_bufs_in_pool = ret;
+ break;
+
case 'j':
ret = parse_decimal(optarg);
if (ret < RTE_MBUF_DEFAULT_BUF_SIZE ||
@@ -1902,12 +1918,12 @@ check_cryptodev_mask(uint8_t cdev_id)
return -1;
}
-static int32_t
+static uint16_t
cryptodevs_init(void)
{
struct rte_cryptodev_config dev_conf;
struct rte_cryptodev_qp_conf qp_conf;
- uint16_t idx, max_nb_qps, qp, i;
+ uint16_t idx, max_nb_qps, qp, total_nb_qps, i;
int16_t cdev_id;
struct rte_hash_parameters params = { 0 };
@@ -1935,6 +1951,7 @@ cryptodevs_init(void)
printf("lcore/cryptodev/qp mappings:\n");
idx = 0;
+ total_nb_qps = 0;
for (cdev_id = 0; cdev_id < rte_cryptodev_count(); cdev_id++) {
struct rte_cryptodev_info cdev_info;
@@ -1968,6 +1985,7 @@ cryptodevs_init(void)
if (qp == 0)
continue;
+ total_nb_qps += qp;
dev_conf.socket_id = rte_cryptodev_socket_id(cdev_id);
dev_conf.nb_queue_pairs = qp;
dev_conf.ff_disable = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO;
@@ -2000,7 +2018,7 @@ cryptodevs_init(void)
printf("\n");
- return 0;
+ return total_nb_qps;
}
static void
@@ -2630,20 +2648,36 @@ inline_sessions_free(struct sa_ctx *sa_ctx)
}
}
+static uint32_t
+calculate_nb_mbufs(uint16_t nb_ports, uint16_t nb_crypto_qp, uint32_t nb_rxq,
+ uint32_t nb_txq)
+{
+ return RTE_MAX((nb_rxq * nb_rxd +
+ nb_ports * nb_lcores * MAX_PKT_BURST +
+ nb_ports * nb_txq * nb_txd +
+ nb_lcores * MEMPOOL_CACHE_SIZE +
+ nb_crypto_qp * CDEV_QUEUE_DESC +
+ nb_lcores * frag_tbl_sz *
+ FRAG_TBL_BUCKET_ENTRIES),
+ 8192U);
+}
+
int32_t
main(int32_t argc, char **argv)
{
int32_t ret;
- uint32_t lcore_id;
+ uint32_t lcore_id, nb_txq, nb_rxq = 0;
uint32_t cdev_id;
uint32_t i;
uint8_t socket_id;
- uint16_t portid;
+ uint16_t portid, nb_crypto_qp, nb_ports = 0;
uint64_t req_rx_offloads[RTE_MAX_ETHPORTS];
uint64_t req_tx_offloads[RTE_MAX_ETHPORTS];
struct eh_conf *eh_conf = NULL;
size_t sess_sz;
+ nb_bufs_in_pool = 0;
+
/* init EAL */
ret = rte_eal_init(argc, argv);
if (ret < 0)
@@ -2692,6 +2726,22 @@ main(int32_t argc, char **argv)
sess_sz = max_session_size();
+ nb_crypto_qp = cryptodevs_init();
+
+ if (nb_bufs_in_pool == 0) {
+ RTE_ETH_FOREACH_DEV(portid) {
+ if ((enabled_port_mask & (1 << portid)) == 0)
+ continue;
+ nb_ports++;
+ nb_rxq += get_port_nb_rx_queues(portid);
+ }
+
+ nb_txq = nb_lcores;
+
+ nb_bufs_in_pool = calculate_nb_mbufs(nb_ports, nb_crypto_qp,
+ nb_rxq, nb_txq);
+ }
+
for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
if (rte_lcore_is_enabled(lcore_id) == 0)
continue;
@@ -2705,11 +2755,12 @@ main(int32_t argc, char **argv)
if (socket_ctx[socket_id].mbuf_pool)
continue;
- pool_init(&socket_ctx[socket_id], socket_id, NB_MBUF);
+ pool_init(&socket_ctx[socket_id], socket_id, nb_bufs_in_pool);
session_pool_init(&socket_ctx[socket_id], socket_id, sess_sz);
session_priv_pool_init(&socket_ctx[socket_id], socket_id,
sess_sz);
}
+ printf("Number of mbufs in packet pool %d\n", nb_bufs_in_pool);
RTE_ETH_FOREACH_DEV(portid) {
if ((enabled_port_mask & (1 << portid)) == 0)
@@ -2721,8 +2772,6 @@ main(int32_t argc, char **argv)
req_tx_offloads[portid]);
}
- cryptodevs_init();
-
/*
* Set the enabled port mask in helper config for use by helper
* sub-system. This will be used while initializing devices using
--
2.7.4