From: Harman Kalra <hkalra@marvell.com>
To: Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>
Cc: <dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>
Subject: [dpdk-dev] [PATCH] net/octeontx2: setting link attributes
Date: Tue, 31 Mar 2020 21:54:24 +0530 [thread overview]
Message-ID: <1585671864-4464-1-git-send-email-hkalra@marvell.com> (raw)
Adding support to configure link attributes like speed,
duplex, negotiation.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
Depends on https://patchwork.dpdk.org/patch/66344/
drivers/net/octeontx2/otx2_ethdev.c | 12 ++--
drivers/net/octeontx2/otx2_ethdev.h | 3 +
drivers/net/octeontx2/otx2_ethdev_ops.c | 14 ++++-
drivers/net/octeontx2/otx2_link.c | 78 +++++++++++++++++++++++++
4 files changed, 99 insertions(+), 8 deletions(-)
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index e60f4901c..3aee11e2e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1592,11 +1592,6 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_configure;
}
- if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
- otx2_err("Setting link speed/duplex not supported");
- goto fail_configure;
- }
-
if (conf->dcb_capability_en == 1) {
otx2_err("dcb enable is not supported");
goto fail_configure;
@@ -1774,6 +1769,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
rte_ether_format_addr(ea_fmt, RTE_ETHER_ADDR_FMT_SIZE, ea);
+ /* Apply new link configurations if changed */
+ rc = otx2_apply_link_speed(eth_dev);
+ if (rc) {
+ otx2_err("Failed to set link configuration");
+ goto uninstall_mc_list;
+ }
+
otx2_nix_dbg("Configured port%d mac=%s nb_rxq=%d nb_txq=%d"
" rx_offloads=0x%" PRIx64 " tx_offloads=0x%" PRIx64 ""
" rx_flags=0x%x tx_flags=0x%x",
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index e5684f9f0..84747f22e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -331,6 +331,8 @@ struct otx2_eth_dev {
bool sdp_link; /* SDP flag */
/* Inline IPsec params */
uint16_t ipsec_in_max_spi;
+ uint8_t duplex;
+ uint32_t speed;
} __rte_cache_aligned;
struct otx2_eth_txq {
@@ -437,6 +439,7 @@ void otx2_eth_dev_link_status_update(struct otx2_dev *dev,
struct cgx_link_user_info *link);
int otx2_nix_dev_set_link_up(struct rte_eth_dev *eth_dev);
int otx2_nix_dev_set_link_down(struct rte_eth_dev *eth_dev);
+int otx2_apply_link_speed(struct rte_eth_dev *eth_dev);
/* IRQ */
int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 8f1635dba..80ac2b96e 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -610,9 +610,17 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
/* Auto negotiation disabled */
devinfo->speed_capa = ETH_LINK_SPEED_FIXED;
- devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
- ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
- ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G;
+ if (!otx2_dev_is_vf_or_sdp(dev) && !otx2_dev_is_lbk(dev)) {
+ devinfo->speed_capa |= ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
+ ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G;
+
+ /* 50G and 100G to be supported for board version C0
+ * and above.
+ */
+ if (!otx2_dev_is_Ax(dev))
+ devinfo->speed_capa |= ETH_LINK_SPEED_50G |
+ ETH_LINK_SPEED_100G;
+ }
devinfo->dev_capa = RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
diff --git a/drivers/net/octeontx2/otx2_link.c b/drivers/net/octeontx2/otx2_link.c
index 4128f56d9..12bf6c323 100644
--- a/drivers/net/octeontx2/otx2_link.c
+++ b/drivers/net/octeontx2/otx2_link.c
@@ -72,6 +72,9 @@ otx2_eth_dev_link_status_update(struct otx2_dev *dev,
eth_link.link_autoneg = ETH_LINK_AUTONEG;
eth_link.link_duplex = link->full_duplex;
+ otx2_dev->speed = link->speed;
+ otx2_dev->duplex = link->full_duplex;
+
/* Print link info */
nix_link_status_print(eth_dev, ð_link);
@@ -184,3 +187,78 @@ otx2_nix_dev_set_link_down(struct rte_eth_dev *eth_dev)
return nix_dev_set_link_state(eth_dev, 0);
}
+
+static int
+cgx_change_mode(struct otx2_eth_dev *dev, struct cgx_set_link_mode_args *cfg)
+{
+ struct otx2_mbox *mbox = dev->mbox;
+ struct cgx_set_link_mode_req *req;
+
+ req = otx2_mbox_alloc_msg_cgx_set_link_mode(mbox);
+ req->args.speed = cfg->speed;
+ req->args.duplex = cfg->duplex;
+ req->args.an = cfg->an;
+
+ return otx2_mbox_process(mbox);
+}
+
+#define SPEED_NONE 0
+static inline uint32_t
+nix_parse_link_speeds(struct otx2_eth_dev *dev, uint32_t link_speeds)
+{
+ uint32_t link_speed = SPEED_NONE;
+
+ /* 50G and 100G to be supported for board version C0 and above */
+ if (!otx2_dev_is_Ax(dev)) {
+ if (link_speeds & ETH_LINK_SPEED_100G)
+ link_speed = 100000;
+ if (link_speeds & ETH_LINK_SPEED_50G)
+ link_speed = 50000;
+ }
+ if (link_speeds & ETH_LINK_SPEED_40G)
+ link_speed = 40000;
+ if (link_speeds & ETH_LINK_SPEED_25G)
+ link_speed = 25000;
+ if (link_speeds & ETH_LINK_SPEED_20G)
+ link_speed = 20000;
+ if (link_speeds & ETH_LINK_SPEED_10G)
+ link_speed = 10000;
+ if (link_speeds & ETH_LINK_SPEED_5G)
+ link_speed = 5000;
+ if (link_speeds & ETH_LINK_SPEED_1G)
+ link_speed = 1000;
+
+ return link_speed;
+}
+
+static inline uint8_t
+nix_parse_eth_link_duplex(uint32_t link_speeds)
+{
+ if ((link_speeds & ETH_LINK_SPEED_10M_HD) ||
+ (link_speeds & ETH_LINK_SPEED_100M_HD))
+ return ETH_LINK_HALF_DUPLEX;
+ else
+ return ETH_LINK_FULL_DUPLEX;
+}
+
+int
+otx2_apply_link_speed(struct rte_eth_dev *eth_dev)
+{
+ struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+ struct rte_eth_conf *conf = ð_dev->data->dev_conf;
+ struct cgx_set_link_mode_args cfg;
+
+ /* If VF/SDP/LBK, link attributes cannot be changed */
+ if (otx2_dev_is_vf_or_sdp(dev) || otx2_dev_is_lbk(dev))
+ return 0;
+
+ memset(&cfg, 0, sizeof(struct cgx_set_link_mode_args));
+ cfg.speed = nix_parse_link_speeds(dev, conf->link_speeds);
+ if (cfg.speed != SPEED_NONE && cfg.speed != dev->speed) {
+ cfg.duplex = nix_parse_eth_link_duplex(conf->link_speeds);
+ cfg.an = (conf->link_speeds & ETH_LINK_SPEED_FIXED) == 0;
+
+ return cgx_change_mode(dev, &cfg);
+ }
+ return 0;
+}
--
2.18.0
next reply other threads:[~2020-03-31 16:24 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-31 16:24 Harman Kalra [this message]
2020-04-05 20:54 ` Jerin Jacob
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