From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DDD17A0577; Tue, 7 Apr 2020 06:00:36 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 98E611BF99; Tue, 7 Apr 2020 06:00:03 +0200 (CEST) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id 0CBDF1BF57 for ; Tue, 7 Apr 2020 06:00:01 +0200 (CEST) From: Suanming Mou To: Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko Cc: dev@dpdk.org, rasland@mellanox.com Date: Tue, 7 Apr 2020 11:59:43 +0800 Message-Id: <1586231987-338112-5-git-send-email-suanmingm@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1586231987-338112-1-git-send-email-suanmingm@mellanox.com> References: <1586231987-338112-1-git-send-email-suanmingm@mellanox.com> Subject: [dpdk-dev] [PATCH 4/8] common/mlx5: add batch counter id offset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit is a part for the DV counter optimization. The batch counter dcs id starts from 0x800000 and none batch counter starts from 0. As currently, the counter is changed to be indexed by pool index and the offset of the counter in the pool counters_raw array. It means now the counter index is same for batch and none batch counter. Add the 0x800000 batch counter offset to the batch counter index helps indicate the counter index is from batch or none batch container pool. Signed-off-by: Suanming Mou Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 00fd7c1..4ab1c75 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -767,6 +767,15 @@ enum { #define MLX5_ADAPTER_PAGE_SHIFT 12 #define MLX5_LOG_RQ_STRIDE_SHIFT 4 +/** + * The batch counter dcs id starts from 0x800000 and none batch counter + * starts from 0. As currently, the counter is changed to be indexed by + * pool index and the offset of the counter in the pool counters_raw array. + * It means now the counter index is same for batch and none batch counter. + * Add the 0x800000 batch counter offset to the batch counter index helps + * indicate the counter index is from batch or none batch container pool. + */ +#define MLX5_CNT_BATCH_OFFSET 0x800000 /* Flow counters. */ struct mlx5_ifc_alloc_flow_counter_out_bits { -- 1.8.3.1