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From: Simei Su <simei.su@intel.com>
To: qi.z.zhang@intel.com,
xiaolong.ye@intel.com,
jingjing.wu@intel.com
Cc: dev@dpdk.org,
yahui.cao@intel.com,
simei.su@intel.com
Date: Wed, 15 Apr 2020 10:55:18 +0800
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<1586919319-221220-1-git-send-email-simei.su@intel.com>
Subject: [dpdk-dev] [PATCH v4 4/5] net/iavf: add support for FDIR PFCP
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This patch enables PFCP node and sesssion packets with S_FIELD
for flow director filter.
Signed-off-by: Simei Su <simei.su@intel.com>
---
drivers/net/iavf/iavf_fdir.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c
index 1e59c7b..1e50a07 100644
--- a/drivers/net/iavf/iavf_fdir.c
+++ b/drivers/net/iavf/iavf_fdir.c
@@ -92,6 +92,9 @@
IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
IAVF_INSET_ESP_SPI)
+#define IAVF_FDIR_INSET_PFCP (\
+ IAVF_INSET_PFCP_S_FIELD)
+
static struct iavf_pattern_match_item iavf_fdir_pattern[] = {
{iavf_pattern_ethertype, IAVF_FDIR_INSET_ETH, IAVF_INSET_NONE},
{iavf_pattern_eth_ipv4, IAVF_FDIR_INSET_ETH_IPV4, IAVF_INSET_NONE},
@@ -112,6 +115,8 @@
{iavf_pattern_eth_ipv6_ah, IAVF_FDIR_INSET_AH, IAVF_INSET_NONE},
{iavf_pattern_eth_ipv4_udp_esp, IAVF_FDIR_INSET_IPV4_NATT_ESP, IAVF_INSET_NONE},
{iavf_pattern_eth_ipv6_udp_esp, IAVF_FDIR_INSET_IPV6_NATT_ESP, IAVF_INSET_NONE},
+ {iavf_pattern_eth_ipv4_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE},
+ {iavf_pattern_eth_ipv6_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE},
};
static struct iavf_flow_parser iavf_fdir_parser;
@@ -402,6 +407,7 @@
const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask;
const struct rte_flow_item_esp *esp_spec, *esp_mask;
const struct rte_flow_item_ah *ah_spec, *ah_mask;
+ const struct rte_flow_item_pfcp *pfcp_spec, *pfcp_mask;
uint64_t input_set = IAVF_INSET_NONE;
enum rte_flow_item_type next_type;
@@ -818,6 +824,27 @@
filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
break;
+ case RTE_FLOW_ITEM_TYPE_PFCP:
+ pfcp_spec = item->spec;
+ pfcp_mask = item->mask;
+
+ hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
+
+ VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, PFCP);
+
+ if (pfcp_spec && pfcp_mask) {
+ if (pfcp_mask->s_field == UINT8_MAX) {
+ input_set |= IAVF_INSET_PFCP_S_FIELD;
+ VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, PFCP, S_FIELD);
+ }
+
+ rte_memcpy(hdr->buffer, pfcp_spec,
+ sizeof(*pfcp_spec));
+ }
+
+ filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
+ break;
+
case RTE_FLOW_ITEM_TYPE_VOID:
break;
--
1.8.3.1