From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6A2BA0588; Thu, 16 Apr 2020 10:36:51 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CBE011DB9E; Thu, 16 Apr 2020 10:34:56 +0200 (CEST) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id D05151DB95 for ; Thu, 16 Apr 2020 10:34:54 +0200 (CEST) From: Suanming Mou To: viacheslavo@mellanox.com, matan@mellanox.com Cc: orika@mellanox.com, wentaoc@mellanox.com, rasland@mellanox.com, dev@dpdk.org Date: Thu, 16 Apr 2020 16:34:31 +0800 Message-Id: <1587026071-422636-11-git-send-email-suanmingm@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1587026071-422636-1-git-send-email-suanmingm@mellanox.com> References: <1587026071-422636-1-git-send-email-suanmingm@mellanox.com> Subject: [dpdk-dev] [PATCH v2 10/10] net/mlx5: reorganize rte flow structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, the rte flow structure is not fully aligned and has some bits wasted. The members can be optimized and reorganized to save memory. 1. The drv_type uses only limited bits, change the type to 2 bits what it needs. 2. Align the hairpin_flow_id, drv_type, fdir, copy_applied to 32 bits. As hairpin never uses the full 32 bits. 3. __rte_packed helps tight up the structure memory layout. The optimization totally helps save 14 bytes for the structure. Signed-off-by: Suanming Mou Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5.c | 3 ++- drivers/net/mlx5/mlx5_flow.h | 17 ++++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 9ab4b1f..a83791c 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -764,7 +764,8 @@ struct mlx5_flow_id_pool * goto error; } } - sh->flow_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX); + sh->flow_id_pool = mlx5_flow_id_pool_alloc + ((1 << HAIRPIN_FLOW_ID_BITS) - 1); if (!sh->flow_id_pool) { DRV_LOG(ERR, "can't create flow id pool"); err = ENOMEM; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 35570a9..d697eba 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -760,20 +760,23 @@ struct mlx5_fdir_flow { uint32_t rix_flow; /* Index to flow. */ }; +#define HAIRPIN_FLOW_ID_BITS 28 + /* Flow structure. */ struct rte_flow { ILIST_ENTRY(uint32_t)next; /**< Index to the next flow structure. */ - enum mlx5_flow_drv_type drv_type; /**< Driver type. */ - uint32_t counter; /**< Holds flow counter. */ - uint32_t rix_mreg_copy; - /**< Index to metadata register copy table resource. */ - uint16_t meter; /**< Holds flow meter id. */ uint32_t dev_handles; /**< Device flow handles that are part of the flow. */ + uint32_t drv_type:2; /**< Driver type. */ uint32_t fdir:1; /**< Identifier of associated FDIR if any. */ - uint32_t hairpin_flow_id; /**< The flow id used for hairpin. */ + uint32_t hairpin_flow_id:HAIRPIN_FLOW_ID_BITS; + /**< The flow id used for hairpin. */ uint32_t copy_applied:1; /**< The MARK copy Flow os applied. */ -}; + uint32_t rix_mreg_copy; + /**< Index to metadata register copy table resource. */ + uint32_t counter; /**< Holds flow counter. */ + uint16_t meter; /**< Holds flow meter id. */ +} __rte_packed; typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, -- 1.8.3.1