From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1F6AEA04C1; Fri, 11 Sep 2020 22:30:49 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 689921C1C2; Fri, 11 Sep 2020 22:30:23 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 72A421C194 for ; Fri, 11 Sep 2020 22:29:58 +0200 (CEST) IronPort-SDR: h/Lz9L1WoNCEyC67q+iZDgmDvuVE7fiQphl9+ZRccF/nUQpklv/qqLA7ffOsZk55pO7vs24G40 SX+C4rYEOgCQ== X-IronPort-AV: E=McAfee;i="6000,8403,9741"; a="156244345" X-IronPort-AV: E=Sophos;i="5.76,417,1592895600"; d="scan'208";a="156244345" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2020 13:29:54 -0700 IronPort-SDR: nvZMDRLDYia7eRm4TtsY0+U3VjRoLcm/SF/kKNSEKTkKVw0Ds4gCmG1l2nv/t/ehrvuEHmUxBU s6QZsJdlDM5A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,417,1592895600"; d="scan'208";a="481453495" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga005.jf.intel.com with ESMTP; 11 Sep 2020 13:29:54 -0700 From: Timothy McDaniel To: Cc: dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com Date: Fri, 11 Sep 2020 15:26:10 -0500 Message-Id: <1599855987-25976-6-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1599855987-25976-1-git-send-email-timothy.mcdaniel@intel.com> References: <1599855987-25976-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH 05/22] event/dlb2: add inline functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add miscellaneous inline functions that may be called from multiple files. These functions include inline assembly of new x86 instructions, such as movdir64b, since they are not available as builtin functions in the minimum supported GCC version. Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/dlb2_inline_fns.h | 85 ++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 drivers/event/dlb2/dlb2_inline_fns.h diff --git a/drivers/event/dlb2/dlb2_inline_fns.h b/drivers/event/dlb2/dlb2_inline_fns.h new file mode 100644 index 0000000..f2f0935 --- /dev/null +++ b/drivers/event/dlb2/dlb2_inline_fns.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2016-2020 Intel Corporation + */ + +#ifndef _DLB2_INLINE_FNS_H_ +#define _DLB2_INLINE_FNS_H_ + +/* Inline functions required in more than one source file. + */ + +static inline struct dlb2_eventdev * +dlb2_pmd_priv(const struct rte_eventdev *eventdev) +{ + return eventdev->data->dev_private; +} + +static inline void +dlb2_umonitor(volatile void *addr) +{ + /* TODO: Change to proper assembly when compiler support available */ + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (addr)); +} + +static inline void +dlb2_umwait(int state, uint64_t timeout) +{ + uint32_t eax = timeout & UINT32_MAX; + uint32_t edx = timeout >> 32; + + /* TODO: Change to proper assembly when compiler support available */ + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (state), "a" (eax), "d" (edx)); +} + +static inline void +dlb2_movntdq(void *qe4, void *pp_addr) +{ + /* Move entire 64B cache line of QEs, 128 bits (16B) at a time. */ + long long *_qe = (long long *)qe4; + __v2di src_data0 = (__v2di){_qe[0], _qe[1]}; + __v2di src_data1 = (__v2di){_qe[2], _qe[3]}; + __v2di src_data2 = (__v2di){_qe[4], _qe[5]}; + __v2di src_data3 = (__v2di){_qe[6], _qe[7]}; + + __builtin_ia32_movntdq((__v2di *)pp_addr + 0, (__v2di)src_data0); + rte_wmb(); + __builtin_ia32_movntdq((__v2di *)pp_addr + 1, (__v2di)src_data1); + rte_wmb(); + __builtin_ia32_movntdq((__v2di *)pp_addr + 2, (__v2di)src_data2); + rte_wmb(); + __builtin_ia32_movntdq((__v2di *)pp_addr + 3, (__v2di)src_data3); + rte_wmb(); +} + +static inline void +dlb2_movntdq_single(void *qe4, void *pp_addr) +{ + long long *_qe = (long long *)qe4; + __v2di src_data0 = (__v2di){_qe[0], _qe[1]}; + + __builtin_ia32_movntdq((__v2di *)pp_addr, (__v2di)src_data0); +} + +static inline void +dlb2_cldemote(void *addr) +{ + /* Load addr into RSI, then demote the cache line of the address + * contained in that register. + */ + asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (addr)); +} + +static inline void +dlb2_movdir64b(void *qe4, void *pp_addr) +{ + /* TODO: Change to proper assembly when compiler support available */ + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" + : + : "a" (pp_addr), "d" (qe4)); +} + +#endif /* _DLB2_INLINE_FNS_H_ */ -- 2.6.4