From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97220A04E1; Tue, 22 Sep 2020 10:56:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 652651DB7C; Tue, 22 Sep 2020 10:51:11 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id ACAE71D8CE for ; Tue, 22 Sep 2020 10:50:21 +0200 (CEST) Received: from mx1-us1.ppe-hosted.com (unknown [10.110.50.137]) by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 85D1720073 for ; Tue, 22 Sep 2020 08:50:21 +0000 (UTC) Received: from us4-mdac16-26.at1.mdlocal (unknown [10.110.49.208]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 85BA36009B for ; Tue, 22 Sep 2020 08:50:21 +0000 (UTC) X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.110.50.7]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 201A222004D for ; Tue, 22 Sep 2020 08:50:21 +0000 (UTC) Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id DD6C74C005B for ; Tue, 22 Sep 2020 08:50:20 +0000 (UTC) Received: from ukex01.SolarFlarecom.com (10.17.10.4) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 22 Sep 2020 09:50:11 +0100 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 22 Sep 2020 09:50:11 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 08M8oBn0004770 for ; Tue, 22 Sep 2020 09:50:11 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id 495011613A9 for ; Tue, 22 Sep 2020 09:50:11 +0100 (BST) From: Andrew Rybchenko To: Date: Tue, 22 Sep 2020 09:49:35 +0100 Message-ID: <1600764594-14752-42-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1600764594-14752-1-git-send-email-arybchenko@solarflare.com> References: <1600764594-14752-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.6.1012-25674.003 X-TM-AS-Result: No-3.116100-8.000000-10 X-TMASE-MatchedRID: 1ym/sa87C4rtZHY4/imivVzIUxHqXB+QfglgnB0nDhO4kqXJipiTZYy+ AfTlDGN12XHJ0L4jOIQs/31GzKkTsbf0EuHoGRzunFVnNmvv47tLXPA26IG0hN9RlPzeVuQQko+ u6J/paHxfM9oRlVZxEvAidXSqIS8LL47TD00zmvLHmyDJSEsI22f6wD367VgtVWQnHKxp38gjh4 Zo7vvnhX2dcFgFzv71EtRm78gcrDHSufU2EEbaYV0NxjlHSNPuBGvINcfHqhcUvn93ewYigiiqs nPUKvF6FfxbStl7tUpmaTFBWBkYZEWeDZCFKxQboSEnUwVkbil5dnPVq3ls7KlTFDGZMPhCc9ZY NjuFJJXoYu5Hg7SR3rSMZ0S4zDcYdTGrL2lSZKOeAiCmPx4NwBnUJ0Ek6yhjxEHRux+uk8hxKpv EGAbTDv5zXelAP7uhvLUSYjXHzZ3CSjulfFWHMBYbNqIj3rq88Ast25yXDrS5soJSUNOfVm7iSX bHJ2pirdOdki0Oy1OMCqFQKtKJ6xySoBCeolQDq8uPJC94SFgR06l6KId4N+omcwkrJL7n X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.116100-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.6.1012-25674.003 X-MDID: 1600764621-zQuIBEOcyxcr Subject: [dpdk-dev] [PATCH 41/60] common/sfc_efx/base: group RxQ parameters into a structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Make number of efx_mcdi_init_rxq() arguments reasonable before addition of one more argument. Non essential parameters not supported in some cases are moved into helper structure. Signed-off-by: Andrew Rybchenko Reviewed-by: Andy Moreton --- drivers/common/sfc_efx/base/ef10_rx.c | 57 +++++++++++--------------- drivers/common/sfc_efx/base/efx_impl.h | 20 +++++---- drivers/common/sfc_efx/base/efx_mcdi.c | 33 ++++++--------- drivers/common/sfc_efx/base/rhead_rx.c | 14 ++++--- 4 files changed, 58 insertions(+), 66 deletions(-) diff --git a/drivers/common/sfc_efx/base/ef10_rx.c b/drivers/common/sfc_efx/base/ef10_rx.c index 43d545b377..ea5f514f18 100644 --- a/drivers/common/sfc_efx/base/ef10_rx.c +++ b/drivers/common/sfc_efx/base/ef10_rx.c @@ -906,21 +906,18 @@ ef10_rx_qcreate( __in efx_rxq_t *erp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_mcdi_init_rxq_params_t params; const efx_rx_prefix_layout_t *erpl; efx_rc_t rc; - boolean_t disable_scatter; - boolean_t want_inner_classes; - unsigned int ps_buf_size; - uint32_t es_bufs_per_desc = 0; - uint32_t es_max_dma_len = 0; - uint32_t es_buf_stride = 0; - uint32_t hol_block_timeout = 0; _NOTE(ARGUNUSED(id, erp)) EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH)); EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS); + memset(¶ms, 0, sizeof (params)); + params.buf_size = erp->er_buf_size; + switch (type) { case EFX_RXQ_TYPE_DEFAULT: erpl = &ef10_default_rx_prefix_layout; @@ -929,7 +926,6 @@ ef10_rx_qcreate( goto fail1; } erp->er_buf_size = type_data->ertd_default.ed_buf_size; - ps_buf_size = 0; break; #if EFSYS_OPT_RX_PACKED_STREAM case EFX_RXQ_TYPE_PACKED_STREAM: @@ -940,19 +936,19 @@ ef10_rx_qcreate( } switch (type_data->ertd_packed_stream.eps_buf_size) { case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M: - ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M; + params.ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M; break; case EFX_RXQ_PACKED_STREAM_BUF_SIZE_512K: - ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K; + params.ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K; break; case EFX_RXQ_PACKED_STREAM_BUF_SIZE_256K: - ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K; + params.ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K; break; case EFX_RXQ_PACKED_STREAM_BUF_SIZE_128K: - ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K; + params.ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K; break; case EFX_RXQ_PACKED_STREAM_BUF_SIZE_64K: - ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K; + params.ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K; break; default: rc = ENOTSUP; @@ -968,14 +964,13 @@ ef10_rx_qcreate( rc = EINVAL; goto fail4; } - ps_buf_size = 0; - es_bufs_per_desc = + params.es_bufs_per_desc = type_data->ertd_es_super_buffer.eessb_bufs_per_desc; - es_max_dma_len = + params.es_max_dma_len = type_data->ertd_es_super_buffer.eessb_max_dma_len; - es_buf_stride = + params.es_buf_stride = type_data->ertd_es_super_buffer.eessb_buf_stride; - hol_block_timeout = + params.hol_block_timeout = type_data->ertd_es_super_buffer.eessb_hol_block_timeout; break; #endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */ @@ -985,59 +980,57 @@ ef10_rx_qcreate( } #if EFSYS_OPT_RX_PACKED_STREAM - if (ps_buf_size != 0) { + if (params.ps_buf_size != 0) { /* Check if datapath firmware supports packed stream mode */ if (encp->enc_rx_packed_stream_supported == B_FALSE) { rc = ENOTSUP; goto fail6; } /* Check if packed stream allows configurable buffer sizes */ - if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) && + if ((params.ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) && (encp->enc_rx_var_packed_stream_supported == B_FALSE)) { rc = ENOTSUP; goto fail7; } } #else /* EFSYS_OPT_RX_PACKED_STREAM */ - EFSYS_ASSERT(ps_buf_size == 0); + EFSYS_ASSERT(params.ps_buf_size == 0); #endif /* EFSYS_OPT_RX_PACKED_STREAM */ #if EFSYS_OPT_RX_ES_SUPER_BUFFER - if (es_bufs_per_desc > 0) { + if (params.es_bufs_per_desc > 0) { if (encp->enc_rx_es_super_buffer_supported == B_FALSE) { rc = ENOTSUP; goto fail8; } - if (!EFX_IS_P2ALIGNED(uint32_t, es_max_dma_len, + if (!EFX_IS_P2ALIGNED(uint32_t, params.es_max_dma_len, EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) { rc = EINVAL; goto fail9; } - if (!EFX_IS_P2ALIGNED(uint32_t, es_buf_stride, + if (!EFX_IS_P2ALIGNED(uint32_t, params.es_buf_stride, EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) { rc = EINVAL; goto fail10; } } #else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */ - EFSYS_ASSERT(es_bufs_per_desc == 0); + EFSYS_ASSERT(params.es_bufs_per_desc == 0); #endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */ /* Scatter can only be disabled if the firmware supports doing so */ if (flags & EFX_RXQ_FLAG_SCATTER) - disable_scatter = B_FALSE; + params.disable_scatter = B_FALSE; else - disable_scatter = encp->enc_rx_disable_scatter_supported; + params.disable_scatter = encp->enc_rx_disable_scatter_supported; if (flags & EFX_RXQ_FLAG_INNER_CLASSES) - want_inner_classes = B_TRUE; + params.want_inner_classes = B_TRUE; else - want_inner_classes = B_FALSE; + params.want_inner_classes = B_FALSE; if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index, - esmp, disable_scatter, want_inner_classes, erp->er_buf_size, - ps_buf_size, es_bufs_per_desc, es_max_dma_len, - es_buf_stride, hol_block_timeout)) != 0) + esmp, ¶ms)) != 0) goto fail11; erp->er_eep = eep; diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h index 01869155fa..c373192554 100644 --- a/drivers/common/sfc_efx/base/efx_impl.h +++ b/drivers/common/sfc_efx/base/efx_impl.h @@ -1430,6 +1430,17 @@ efx_mcdi_fini_evq( __in efx_nic_t *enp, __in uint32_t instance); +typedef struct efx_mcdi_init_rxq_params_s { + boolean_t disable_scatter; + boolean_t want_inner_classes; + uint32_t buf_size; + uint32_t ps_buf_size; + uint32_t es_bufs_per_desc; + uint32_t es_max_dma_len; + uint32_t es_buf_stride; + uint32_t hol_block_timeout; +} efx_mcdi_init_rxq_params_t; + LIBEFX_INTERNAL extern __checkReturn efx_rc_t efx_mcdi_init_rxq( @@ -1439,14 +1450,7 @@ efx_mcdi_init_rxq( __in uint32_t label, __in uint32_t instance, __in efsys_mem_t *esmp, - __in boolean_t disable_scatter, - __in boolean_t want_inner_classes, - __in uint32_t buf_size, - __in uint32_t ps_bufsize, - __in uint32_t es_bufs_per_desc, - __in uint32_t es_max_dma_len, - __in uint32_t es_buf_stride, - __in uint32_t hol_block_timeout); + __in const efx_mcdi_init_rxq_params_t *params); LIBEFX_INTERNAL extern __checkReturn efx_rc_t diff --git a/drivers/common/sfc_efx/base/efx_mcdi.c b/drivers/common/sfc_efx/base/efx_mcdi.c index 278c5e2a64..aa19c7c759 100644 --- a/drivers/common/sfc_efx/base/efx_mcdi.c +++ b/drivers/common/sfc_efx/base/efx_mcdi.c @@ -2688,14 +2688,7 @@ efx_mcdi_init_rxq( __in uint32_t label, __in uint32_t instance, __in efsys_mem_t *esmp, - __in boolean_t disable_scatter, - __in boolean_t want_inner_classes, - __in uint32_t buf_size, - __in uint32_t ps_bufsize, - __in uint32_t es_bufs_per_desc, - __in uint32_t es_max_dma_len, - __in uint32_t es_buf_stride, - __in uint32_t hol_block_timeout) + __in const efx_mcdi_init_rxq_params_t *params) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); efx_mcdi_req_t req; @@ -2719,21 +2712,21 @@ efx_mcdi_init_rxq( } no_cont_ev = (eep->ee_flags & EFX_EVQ_FLAGS_NO_CONT_EV); - if ((no_cont_ev == B_TRUE) && (disable_scatter == B_FALSE)) { + if ((no_cont_ev == B_TRUE) && (params->disable_scatter == B_FALSE)) { /* TODO: Support scatter in NO_CONT_EV mode */ rc = EINVAL; goto fail2; } - if (ps_bufsize > 0) + if (params->ps_buf_size > 0) dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM; - else if (es_bufs_per_desc > 0) + else if (params->es_bufs_per_desc > 0) dma_mode = MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_SUPER_BUFFER; else dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET; if (encp->enc_tunnel_encapsulations_supported != 0 && - !want_inner_classes) { + !params->want_inner_classes) { /* * WANT_OUTER_CLASSES can only be specified on hardware which * supports tunnel encapsulation offloads, even though it is @@ -2768,31 +2761,31 @@ efx_mcdi_init_rxq( INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0, INIT_RXQ_EXT_IN_CRC_MODE, 0, INIT_RXQ_EXT_IN_FLAG_PREFIX, 1, - INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter, + INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, params->disable_scatter, INIT_RXQ_EXT_IN_DMA_MODE, dma_mode, - INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize, + INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, params->ps_buf_size, INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes, INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV, no_cont_ev); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0); MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, enp->en_vport_id); - if (es_bufs_per_desc > 0) { + if (params->es_bufs_per_desc > 0) { MCDI_IN_SET_DWORD(req, INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET, - es_bufs_per_desc); + params->es_bufs_per_desc); MCDI_IN_SET_DWORD(req, - INIT_RXQ_V3_IN_ES_MAX_DMA_LEN, es_max_dma_len); + INIT_RXQ_V3_IN_ES_MAX_DMA_LEN, params->es_max_dma_len); MCDI_IN_SET_DWORD(req, - INIT_RXQ_V3_IN_ES_PACKET_STRIDE, es_buf_stride); + INIT_RXQ_V3_IN_ES_PACKET_STRIDE, params->es_buf_stride); MCDI_IN_SET_DWORD(req, INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT, - hol_block_timeout); + params->hol_block_timeout); } if (encp->enc_init_rxq_with_buffer_size) MCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES, - buf_size); + params->buf_size); dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR); addr = EFSYS_MEM_ADDR(esmp); diff --git a/drivers/common/sfc_efx/base/rhead_rx.c b/drivers/common/sfc_efx/base/rhead_rx.c index c9ab3f92e1..38c905444a 100644 --- a/drivers/common/sfc_efx/base/rhead_rx.c +++ b/drivers/common/sfc_efx/base/rhead_rx.c @@ -280,8 +280,8 @@ rhead_rx_qcreate( __in efx_rxq_t *erp) { const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp); + efx_mcdi_init_rxq_params_t params; efx_rc_t rc; - boolean_t disable_scatter; _NOTE(ARGUNUSED(id)) @@ -289,13 +289,15 @@ rhead_rx_qcreate( (1 << ESF_GZ_EV_RXPKTS_Q_LABEL_WIDTH)); EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS); + memset(¶ms, 0, sizeof (params)); + switch (type) { case EFX_RXQ_TYPE_DEFAULT: if (type_data == NULL) { rc = EINVAL; goto fail1; } - erp->er_buf_size = type_data->ertd_default.ed_buf_size; + params.buf_size = type_data->ertd_default.ed_buf_size; break; default: rc = ENOTSUP; @@ -304,9 +306,9 @@ rhead_rx_qcreate( /* Scatter can only be disabled if the firmware supports doing so */ if (flags & EFX_RXQ_FLAG_SCATTER) - disable_scatter = B_FALSE; + params.disable_scatter = B_FALSE; else - disable_scatter = encp->enc_rx_disable_scatter_supported; + params.disable_scatter = encp->enc_rx_disable_scatter_supported; /* * Ignore EFX_RXQ_FLAG_INNER_CLASSES since in accordance with @@ -315,12 +317,12 @@ rhead_rx_qcreate( */ if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index, - esmp, disable_scatter, B_FALSE, erp->er_buf_size, - 0, 0, 0, 0, 0)) != 0) + esmp, ¶ms)) != 0) goto fail3; erp->er_eep = eep; erp->er_label = label; + erp->er_buf_size = params.buf_size; erp->er_prefix_layout = rhead_default_rx_prefix_layout; return (0); -- 2.17.1