From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F1DF5A04B5; Thu, 1 Oct 2020 02:30:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B102F1D601; Thu, 1 Oct 2020 02:29:57 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 5BBD91D582 for ; Thu, 1 Oct 2020 02:29:53 +0200 (CEST) IronPort-SDR: Kp8jKYbImBL6gzBv75K4U+GjpReWu0QU9BaVK1W+Pq60sRwRthw7VYkkQjN/E/ylXJEhZbQZcF 5xvzV50zLjSA== X-IronPort-AV: E=McAfee;i="6000,8403,9760"; a="161828700" X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="161828700" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2020 17:29:50 -0700 IronPort-SDR: ZtJ8G0kQ4OqYib0iVXbXx8ZxOwSmlZY5iGzDr8uXnBSGO3oavQWs6ljFJ4FUGkN3rPtts2RTGU dQoPnGcr6Inw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="385321756" Received: from unknown (HELO localhost.ch.intel.com) ([143.182.137.102]) by orsmga001.jf.intel.com with ESMTP; 30 Sep 2020 17:29:50 -0700 From: Omkar Maslekar To: dev@dpdk.org Cc: bruce.richardson@intel.com, ciara.loftus@intel.com, omkar.maslekar@intel.com Date: Wed, 30 Sep 2020 17:28:32 -0700 Message-Id: <1601512112-12577-2-git-send-email-omkar.maslekar@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1601512112-12577-1-git-send-email-omkar.maslekar@intel.com> References: <1599700614-22809-1-git-send-email-omkar.maslekar@intel.com> <1601512112-12577-1-git-send-email-omkar.maslekar@intel.com> Subject: [dpdk-dev] [PATCH v5] eal: add cache-line demote support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" rte_cldemote is similar to a prefetch hint - in reverse. cldemote(addr) enables software to hint to hardware that line is likely to be shared. Useful in core-to-core communications where cache-line is likely to be shared. ARM and PPC implementation is provided with NOP and can be added if any equivalent instructions could be used for implementation on those architectures. Signed-off-by: Omkar Maslekar Acked-by: Bruce Richardson --- v5: documentation updated fixed formatting issue in release notes added Acked-by: Bruce Richardson * v4: updated bold text for title and fixed margin in release notes * v3: fixed warning regarding whitespace * v2: documentation updated --- --- doc/guides/rel_notes/release_20_11.rst | 7 +++++++ lib/librte_eal/arm/include/rte_prefetch_32.h | 5 +++++ lib/librte_eal/arm/include/rte_prefetch_64.h | 5 +++++ lib/librte_eal/include/generic/rte_prefetch.h | 14 ++++++++++++++ lib/librte_eal/ppc/include/rte_prefetch.h | 5 +++++ lib/librte_eal/x86/include/rte_prefetch.h | 9 +++++++++ 6 files changed, 45 insertions(+) diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst index df227a1..dc402ab 100644 --- a/doc/guides/rel_notes/release_20_11.rst +++ b/doc/guides/rel_notes/release_20_11.rst @@ -55,6 +55,13 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Added new function rte_cldemote in rte_prefetch.h.** + + Added a hardware hint CLDEMOTE, which is similar to prefetch in reverse. + CLDEMOTE moves the cache line to the more remote cache, where it expects + sharing to be efficient. Moving the cache line to a level more distant from + the processor helps to accelerate core-to-core communication. + Removed Items ------------- diff --git a/lib/librte_eal/arm/include/rte_prefetch_32.h b/lib/librte_eal/arm/include/rte_prefetch_32.h index e53420a..ad91edd 100644 --- a/lib/librte_eal/arm/include/rte_prefetch_32.h +++ b/lib/librte_eal/arm/include/rte_prefetch_32.h @@ -33,6 +33,11 @@ static inline void rte_prefetch_non_temporal(const volatile void *p) rte_prefetch0(p); } +static inline void rte_cldemote(const volatile void *p) +{ + RTE_SET_USED(p); +} + #ifdef __cplusplus } #endif diff --git a/lib/librte_eal/arm/include/rte_prefetch_64.h b/lib/librte_eal/arm/include/rte_prefetch_64.h index fc2b391..35d278a 100644 --- a/lib/librte_eal/arm/include/rte_prefetch_64.h +++ b/lib/librte_eal/arm/include/rte_prefetch_64.h @@ -32,6 +32,11 @@ static inline void rte_prefetch_non_temporal(const volatile void *p) asm volatile ("PRFM PLDL1STRM, [%0]" : : "r" (p)); } +static inline void rte_cldemote(const volatile void *p) +{ + RTE_SET_USED(p); +} + #ifdef __cplusplus } #endif diff --git a/lib/librte_eal/include/generic/rte_prefetch.h b/lib/librte_eal/include/generic/rte_prefetch.h index 6e47bdf..5500cd5 100644 --- a/lib/librte_eal/include/generic/rte_prefetch.h +++ b/lib/librte_eal/include/generic/rte_prefetch.h @@ -51,4 +51,18 @@ */ static inline void rte_prefetch_non_temporal(const volatile void *p); +/** + * Demote a cache line to a more distant level of cache from the processor. + * + * CLDEMOTE hints to hardware to move (demote) a cache line from the closest to + * the processor to a level more distant from the processor. It is a hint and + * not guarantee. rte_cldemote is intended to move the cache line to the more + * remote cache, where it expects sharing to be efficient and to indicate that a + * line may be accessed by a different core in the future. + * + * @param p + * Address to demote + */ +static inline void rte_cldemote(const volatile void *p); + #endif /* _RTE_PREFETCH_H_ */ diff --git a/lib/librte_eal/ppc/include/rte_prefetch.h b/lib/librte_eal/ppc/include/rte_prefetch.h index 9ba07c8..3fe9655 100644 --- a/lib/librte_eal/ppc/include/rte_prefetch.h +++ b/lib/librte_eal/ppc/include/rte_prefetch.h @@ -34,6 +34,11 @@ static inline void rte_prefetch_non_temporal(const volatile void *p) rte_prefetch0(p); } +static inline void rte_cldemote(const volatile void *p) +{ + RTE_SET_USED(p); +} + #ifdef __cplusplus } #endif diff --git a/lib/librte_eal/x86/include/rte_prefetch.h b/lib/librte_eal/x86/include/rte_prefetch.h index 384c6b3..029d06e 100644 --- a/lib/librte_eal/x86/include/rte_prefetch.h +++ b/lib/librte_eal/x86/include/rte_prefetch.h @@ -32,6 +32,15 @@ static inline void rte_prefetch_non_temporal(const volatile void *p) asm volatile ("prefetchnta %[p]" : : [p] "m" (*(const volatile char *)p)); } +/* + * we're using raw byte codes for now as only the newest compiler + * versions support this instruction natively. + */ +static inline void rte_cldemote(const volatile void *p) +{ + asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (p)); +} + #ifdef __cplusplus } #endif -- 1.8.3.1