From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F4E4A04BC; Thu, 8 Oct 2020 20:50:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5D74B1B9EC; Thu, 8 Oct 2020 20:49:34 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 8D56A1B96F; Thu, 8 Oct 2020 20:49:30 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 098IUxYh023886; Thu, 8 Oct 2020 11:49:28 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-type : mime-version; s=pfpt0220; bh=1qzJ/lVdLwgO0SZO+HHFkk+ZM9ek8PvqHql9dCS+buQ=; b=bDAnGsF9/s0flmabEOo2yfrUyZWTlcf32XrCA3G4DRDFPBFCC+OJWDxtY96+M/B+793q oLNt/TsGBVWTI9fXSfb3SDUg3fEjctYIvQ8JWczV0DUfeEMuJs7JjGVeOXYSb0pjTwdU 6mc5dWqXu8WrBw9Qe2Fxjo9+l6vsz95Ne61J7E93hSQQfgavDSL/nTVKR9dh5XXY9lnZ nyWkdxtixX+a7TFOXHVWPyr9bQ5HERAxnjR5kZxdrIOgGO77mlb355mqCpuTBzdADLrC ERjhXceU+a4NM6/DUSk1uecitc3nrF9znFg0ML/6wGeJjsGesddMirFmFpIjxq6aXsR9 lA== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 33xrtns6k4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 08 Oct 2020 11:49:28 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 8 Oct 2020 11:49:27 -0700 Received: from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 8 Oct 2020 11:49:26 -0700 Received: from NAM02-BL2-obe.outbound.protection.outlook.com (104.47.38.59) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2 via Frontend Transport; Thu, 8 Oct 2020 11:49:26 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=DWvOXhRgyT+TvXxvJioGjYASFgHuDlBYB+yAJb6nHcVDYfZAWyD/zXc4KZqTfe0A8D2qFiTTesSVpxDEiTjFN641AxIyxImhFJM4Z0R4JPjHxr/ckxgDiVPRHeKuSi/RjFaHS4Iq+st2i1xuuiiTNB7v+AgvvtfOLqMHZbATfQtyuBMDkz6XphpyBMgSzeueT6/Z3UbTIvgyTg0cH0D+qGB1DTE5Oh2c/vvpAcRSXrchbTD6kY36QdDZWSMcIsKDn30sPQwHurKjvGhjzYAjhTu03DI0zEpvQJxXbhtAgKp1kO7eildNPHAgooF4YTOfUK/KSwVT2/EWghA2Ddx4hA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1qzJ/lVdLwgO0SZO+HHFkk+ZM9ek8PvqHql9dCS+buQ=; b=aYRbVzZz71WZsD3y7t+9Rp7xR55iAlNsjmcp6/lAaITrBvDYp8GEo+WfddGg5SgLUGNCaI0zKhdxzxdHBCppp18vqlyltQZZVbL0VeucdqvRj6BTOHsbArqa152RqsSHGYL6+UVKxPfZc1VSSOKCEz1FjrvxTVQD6crDbc3ai6cfzNGto5F1C/iZDbW09svY/ErrtIXrPhDbUS+e2EnjJRQHVRoDslMRzSKzZgJRSUMkGjpDFivo89RLtXUMj5KF6/HQ/dz1yJ469+qHcOd2cn4ndt+0iU/AxOxWDAM3uDXyyefvesiP9gV0kwMIuSC5fsOb/hzsL4h861t5QtGF3A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=marvell.com; dmarc=pass action=none header.from=marvell.com; dkim=pass header.d=marvell.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.onmicrosoft.com; s=selector1-marvell-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1qzJ/lVdLwgO0SZO+HHFkk+ZM9ek8PvqHql9dCS+buQ=; b=YOD4u3GhRQszZd3G/asMWm1LpvLzWbVYosceu57iopr1STW+dUj+rdmohtTzf2R1jSMBj1j8xwU8+lQdBt6c7jb6WUgyIaDDU8tiFZ5pI51H1RaF3Q0KMHUFh1IIlvD7x37s15XiE513t6MQFe5LLBqfPqSkMmb5vJmIA1i5vpI= Received: from CO6PR18MB3842.namprd18.prod.outlook.com (2603:10b6:5:341::16) by MW2PR18MB2169.namprd18.prod.outlook.com (2603:10b6:907:5::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3433.32; Thu, 8 Oct 2020 18:49:23 +0000 Received: from CO6PR18MB3842.namprd18.prod.outlook.com ([fe80::b960:6770:a1:2a19]) by CO6PR18MB3842.namprd18.prod.outlook.com ([fe80::b960:6770:a1:2a19%7]) with mapi id 15.20.3455.023; Thu, 8 Oct 2020 18:49:23 +0000 From: Harman Kalra To: Jerin Jacob , Nithin Dabilpuram , Pavan Nikhilesh , "Kiran Kumar K" CC: , Harman Kalra , Date: Fri, 9 Oct 2020 00:18:45 +0530 Message-ID: <1602182927-18254-3-git-send-email-hkalra@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1602182927-18254-1-git-send-email-hkalra@marvell.com> References: <1602182927-18254-1-git-send-email-hkalra@marvell.com> Content-Type: text/plain X-Originating-IP: [1.6.215.26] X-ClientProxiedBy: BMXPR01CA0093.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:54::33) To CO6PR18MB3842.namprd18.prod.outlook.com (2603:10b6:5:341::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from hkarlara-OptiPlex-3046.marvell.com (1.6.215.26) by BMXPR01CA0093.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3455.21 via Frontend Transport; Thu, 8 Oct 2020 18:49:21 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 03e930ac-bb64-4b21-6f32-08d86bbadfb2 X-MS-TrafficTypeDiagnostic: MW2PR18MB2169: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:517; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Ee6RWGQ2EtZBEcdyG+fZHtVxQL5/Tk20wIxzXsezjMv33Rb4DdhMNTs7/GjgVJ3qDtTh8jJ/ndsjWVHS1PpXfrf6MJ0pU9oc39cUMWOOZo/MZYXXoyH406befSvtajzVtApYFVeT/BpaixqbFrykr7JYnAoYyDT5KvfYdbak6WCYGoYaPCH9zgsYXklBFuAcwM48x7hjSiYCN5WPS4rVbK4KgaFpeupzpAPe2J28974vop7jmiBakpvje4DZtDnK5xOLbncy/NOXPoxCP91uwj7iAZVE730Hrv2SvWwP+eKQU4chhNOHSJEPsrXK9b3fj8b0wv8QWoO7JEOgWTg3SS1q5Uqk8vdoXkIN+bYgci/kYaMMcQ680ZXDN4r6TjD6Q442fGGEXrqNa9kE7gI6UA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CO6PR18MB3842.namprd18.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(39860400002)(136003)(366004)(346002)(376002)(396003)(956004)(6636002)(8936002)(86362001)(6486002)(2616005)(478600001)(8676002)(83380400001)(4326008)(7696005)(2906002)(316002)(110136005)(6666004)(52116002)(1006002)(66946007)(26005)(186003)(36756003)(66476007)(66556008)(450100002)(16526019)(5660300002)(36456003)(42976004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: TrA54EifbfTCdJpAG0Dw3oMhrV6w33qOThNQOV7OTtHCRxezjoAeXkNFzpuC3AMmv1hJKHLLduH7Q/legutpHvP8qahuyEzGOyQhy65trqiBgiTrrOrSOiQF54L9Ltpnka1U/Vd7fOt2eo4fdAplldIaRQ7Mq/OKra+Im9NQcolJLIFvW5pyeVi7HqtLe1n3lgBaTPh+lLdJYVvC9Pa3XvVfTibLBaKM2LpeuLbmsBU8vwYUdT5WYFvK5i0c+PMboFMUrAW7p9Nxgivz8atUR2UvlLQa4W7Wzj50r6Zol81+VhAzuRsoGCBxED78VVZMc1Omdrh6pIqHXMUfw76Na/s4SwihJX5AcVmMLDY8E+PzpcnCgnzkROpx/AjOLGPPT4BldsCYkX2PjEFXWQdL1eLogE6bKH8x2zxs6vshoxpbv0BQsPhV6NpKwwDARj5hRbpBAYNJ0ikZ1f08a1CX2jFebKoGq8B/+lN5FcnBkdLTqH2NhJ5mkUeAh0zMGQ4/vthI/n0wGSWEpT5w74Rkssyuv1I2dhXNyH80OOcV25Ke+M4I817FizyU//mF5zGMpFSVJ4OABkO+nePENHFKhTrDFMiQPIC0qbMb1go2dVAtcAcgWTnUfGence/IL11qa86tDL42+ME8e8kL4uDlig== X-MS-Exchange-CrossTenant-Network-Message-Id: 03e930ac-bb64-4b21-6f32-08d86bbadfb2 X-MS-Exchange-CrossTenant-AuthSource: CO6PR18MB3842.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Oct 2020 18:49:23.5859 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 90rGMd9HxVuzys/TuqlHU/Zey+lQxS4XsYRkpFXmXqHjAJ1ISgBlf/bGx51autbCskudEdOG+YhIcDPzjzpmLg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR18MB2169 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-08_12:2020-10-08, 2020-10-08 signatures=0 Subject: [dpdk-dev] [PATCH v2 3/4] net/octeontx2: fix jumbo frame crash X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Issue has been observed in case of multi segments where mbuf data gets corrupted due to missing barriers. Changes made to mbuf just before LMTST by one core gets updatded when the same mbuf is in use by another core, leading to corruption. It should be ensured that all changes made to mbuf should be written before LMTST. Fixes: cbd5710db48d ("net/octeontx2: add Tx multi segment version") Cc: stable@dpdk.org Signed-off-by: Pavan Nikhilesh Signed-off-by: Nithin Dabilpuram Signed-off-by: Harman Kalra --- V2: * replace rte_cio_wmb with rte_io_wmb drivers/common/octeontx2/otx2_io_arm64.h | 12 ++++++++++ drivers/common/octeontx2/otx2_io_generic.h | 16 +++++++++++--- drivers/event/octeontx2/otx2_worker.h | 20 +++++++++++++---- drivers/mempool/octeontx2/otx2_mempool_ops.c | 4 ++++ drivers/net/octeontx2/otx2_tx.c | 23 ++++++++++++++------ drivers/net/octeontx2/otx2_tx.h | 23 ++++++++++++++++++++ 6 files changed, 84 insertions(+), 14 deletions(-) diff --git a/drivers/common/octeontx2/otx2_io_arm64.h b/drivers/common/octeontx2/otx2_io_arm64.h index 7e45329b3..b5c85d9a6 100644 --- a/drivers/common/octeontx2/otx2_io_arm64.h +++ b/drivers/common/octeontx2/otx2_io_arm64.h @@ -63,6 +63,18 @@ otx2_lmt_submit(rte_iova_t io_address) return result; } +static __rte_always_inline uint64_t +otx2_lmt_submit_release(rte_iova_t io_address) +{ + uint64_t result; + + asm volatile ( + ".cpu generic+lse\n" + "ldeorl xzr,%x[rf],[%[rs]]" : + [rf] "=r"(result) : [rs] "r"(io_address)); + return result; +} + static __rte_always_inline void otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext) { diff --git a/drivers/common/octeontx2/otx2_io_generic.h b/drivers/common/octeontx2/otx2_io_generic.h index b1d754008..da64c9b31 100644 --- a/drivers/common/octeontx2/otx2_io_generic.h +++ b/drivers/common/octeontx2/otx2_io_generic.h @@ -45,12 +45,22 @@ otx2_lmt_submit(uint64_t io_address) return 0; } +static inline int64_t +otx2_lmt_submit_release(uint64_t io_address) +{ + RTE_SET_USED(io_address); + + return 0; +} + static __rte_always_inline void otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext) { - RTE_SET_USED(out); - RTE_SET_USED(in); - RTE_SET_USED(lmtext); + /* Copy four words if lmtext = 0 + * six words if lmtext = 1 + * eight words if lmtext =2 + */ + memcpy(out, in, (4 + (2 * lmtext)) * sizeof(uint64_t)); } static __rte_always_inline void diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h index 757fa6fe5..5eb83435e 100644 --- a/drivers/event/octeontx2/otx2_worker.h +++ b/drivers/event/octeontx2/otx2_worker.h @@ -280,7 +280,19 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], /* Perform header writes before barrier for TSO */ otx2_nix_xmit_prepare_tso(m, flags); - rte_io_wmb(); + /* Lets commit any changes in the packet here in case of single seg as + * no further changes to mbuf will be done. + * While for multi seg all mbufs used are set to NULL in + * otx2_nix_prepare_mseg() after preparing the sg list and these changes + * should be committed before LMTST. + * Also in no fast free case some mbuf fields are updated in + * otx2_nix_prefree_seg + * Hence otx2_nix_xmit_submit_lmt_release/otx2_nix_xmit_mseg_one_release + * has store barrier for multiseg. + */ + if (!(flags & NIX_TX_MULTI_SEG_F) && + !(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)) + rte_io_wmb(); txq = otx2_ssogws_xtract_meta(m, txq_data); otx2_ssogws_prepare_pkt(txq, m, cmd, flags); @@ -291,12 +303,12 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], if (!ev->sched_type) { otx2_nix_xmit_mseg_prep_lmt(cmd, txq->lmt_addr, segdw); otx2_ssogws_head_wait(ws); - if (otx2_nix_xmit_submit_lmt(txq->io_addr) == 0) + if (otx2_nix_xmit_submit_lmt_release(txq->io_addr) == 0) otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr, txq->io_addr, segdw); } else { - otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr, txq->io_addr, - segdw); + otx2_nix_xmit_mseg_one_release(cmd, txq->lmt_addr, + txq->io_addr, segdw); } } else { /* Passing no of segdw as 4: HDR + EXT + SG + SMEM */ diff --git a/drivers/mempool/octeontx2/otx2_mempool_ops.c b/drivers/mempool/octeontx2/otx2_mempool_ops.c index 5229a7cfb..9ff71bcf6 100644 --- a/drivers/mempool/octeontx2/otx2_mempool_ops.c +++ b/drivers/mempool/octeontx2/otx2_mempool_ops.c @@ -15,6 +15,10 @@ otx2_npa_enq(struct rte_mempool *mp, void * const *obj_table, unsigned int n) const uint64_t addr = npa_lf_aura_handle_to_base(aura_handle) + NPA_LF_AURA_OP_FREE0; + /* Ensure mbuf init changes are written before the free pointers + * are enqueued to the stack. + */ + rte_io_wmb(); for (index = 0; index < n; index++) otx2_store_pair((uint64_t)obj_table[index], reg, addr); diff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c index 1b75cd559..4458d8bca 100644 --- a/drivers/net/octeontx2/otx2_tx.c +++ b/drivers/net/octeontx2/otx2_tx.c @@ -38,8 +38,11 @@ nix_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, otx2_nix_xmit_prepare_tso(tx_pkts[i], flags); } - /* Lets commit any changes in the packet */ - rte_io_wmb(); + /* Lets commit any changes in the packet here as no further changes + * to the packet will be done unless no fast free is enabled. + */ + if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)) + rte_io_wmb(); for (i = 0; i < pkts; i++) { otx2_nix_xmit_prepare(tx_pkts[i], cmd, flags); @@ -74,12 +77,11 @@ nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf **tx_pkts, otx2_nix_xmit_prepare_tso(tx_pkts[i], flags); } - /* Lets commit any changes in the packet */ - rte_io_wmb(); - for (i = 0; i < pkts; i++) { otx2_nix_xmit_prepare(tx_pkts[i], cmd, flags); segdw = otx2_nix_prepare_mseg(tx_pkts[i], cmd, flags); + /* Lets commit any changes in the packet */ + rte_io_wmb(); otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0], tx_pkts[i]->ol_flags, segdw, flags); @@ -127,8 +129,11 @@ nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, /* Reduce the cached count */ txq->fc_cache_pkts -= pkts; - /* Lets commit any changes in the packet */ - rte_io_wmb(); + /* Lets commit any changes in the packet here as no further changes + * to the packet will be done unless no fast free is enabled. + */ + if (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)) + rte_io_wmb(); senddesc01_w0 = vld1q_dup_u64(&txq->cmd[0]); senddesc23_w0 = senddesc01_w0; @@ -221,6 +226,10 @@ nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, 1, 0); senddesc01_w0 = vorrq_u64(senddesc01_w0, xmask01); senddesc23_w0 = vorrq_u64(senddesc23_w0, xmask23); + /* Ensuring mbuf fields which got updated in + * otx2_nix_prefree_seg are written before LMTST. + */ + rte_io_wmb(); } else { struct rte_mbuf *mbuf; /* Mark mempool object as "put" since diff --git a/drivers/net/octeontx2/otx2_tx.h b/drivers/net/octeontx2/otx2_tx.h index caf170fd1..d6ea3b487 100644 --- a/drivers/net/octeontx2/otx2_tx.h +++ b/drivers/net/octeontx2/otx2_tx.h @@ -363,6 +363,10 @@ otx2_nix_xmit_prepare(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags) * DF bit = 0 otherwise */ send_hdr->w0.df = otx2_nix_prefree_seg(m); + /* Ensuring mbuf fields which got updated in + * otx2_nix_prefree_seg are written before LMTST. + */ + rte_io_wmb(); } /* Mark mempool object as "put" since it is freed by NIX */ if (!send_hdr->w0.df) @@ -395,6 +399,12 @@ otx2_nix_xmit_submit_lmt(const rte_iova_t io_addr) return otx2_lmt_submit(io_addr); } +static __rte_always_inline uint64_t +otx2_nix_xmit_submit_lmt_release(const rte_iova_t io_addr) +{ + return otx2_lmt_submit_release(io_addr); +} + static __rte_always_inline uint16_t otx2_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags) { @@ -483,6 +493,19 @@ otx2_nix_xmit_mseg_one(uint64_t *cmd, void *lmt_addr, } while (lmt_status == 0); } +static __rte_always_inline void +otx2_nix_xmit_mseg_one_release(uint64_t *cmd, void *lmt_addr, + rte_iova_t io_addr, uint16_t segdw) +{ + uint64_t lmt_status; + + rte_io_wmb(); + do { + otx2_lmt_mov_seg(lmt_addr, (const void *)cmd, segdw); + lmt_status = otx2_lmt_submit(io_addr); + } while (lmt_status == 0); +} + #define L3L4CSUM_F NIX_TX_OFFLOAD_L3_L4_CSUM_F #define OL3OL4CSUM_F NIX_TX_OFFLOAD_OL3_OL4_CSUM_F #define VLAN_F NIX_TX_OFFLOAD_VLAN_QINQ_F -- 2.18.0