From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2DAE7A04DF; Wed, 21 Oct 2020 13:39:31 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CCC92AD2A; Wed, 21 Oct 2020 13:38:11 +0200 (CEST) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id ED849AD0D for ; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 0FB9BB6B41; Wed, 21 Oct 2020 13:37:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wtt7Hpc9NKHy; Wed, 21 Oct 2020 13:37:56 +0200 (CEST) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id C69E9B6B43; Wed, 21 Oct 2020 13:37:51 +0200 (CEST) From: =?UTF-8?q?Juraj=20Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com Cc: dev@dpdk.org, =?UTF-8?q?Juraj=20Linke=C5=A1?= Date: Wed, 21 Oct 2020 13:37:39 +0200 Message-Id: <1603280261-20206-5-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> References: <1602600882-695-1-git-send-email-juraj.linkes@pantheon.tech> <1603280261-20206-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [RFC PATCH v3 4/6] build: move core and NUMA counts to cross files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The values of RTE_MAX_NUMA_NODES and RTE_MAX_LCORE are going to vary for different build machines, even for the same Implementer ID and Part Number combinations. Move the fixed values to cross files and use automatic discovery/values from cmdline options for native build. Use predefined values for generic-armv8 build, since that build is not tied to the build machine. Signed-off-by: Juraj Linkeš --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 6 ++++ config/arm/arm64_bluefield_linux_gcc | 2 ++ config/arm/arm64_dpaa_linux_gcc | 2 ++ config/arm/arm64_emag_linux_gcc | 2 ++ config/arm/arm64_n1sdp_linux_gcc | 2 ++ config/arm/arm64_octeontx2_linux_gcc | 2 ++ config/arm/arm64_stingray_linux_gcc | 2 ++ config/arm/arm64_thunderx2_linux_gcc | 2 ++ config/arm/arm64_thunderx_linux_gcc | 2 ++ config/arm/meson.build | 43 +++++++++++++++++----------- 11 files changed, 51 insertions(+), 16 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 52c5f4476..36100c594 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x56' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 13ee8b223..779333199 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -26,3 +26,9 @@ implementer_id = 'generic' # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 part_number = 'generic' + +# Supported extra configuration +# max_numa_nodes = n # will set RTE_MAX_NUMA_NODES +# max_lcores = n # will set RTE_MAX_LCORE +max_lcores = 256 +max_numa_nodes = 4 diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index b79389d85..7ff6fd309 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 573ae7e42..adae86f57 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = 'dpaa' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 24f3d533e..3cccca901 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x50' +max_numa_nodes = 1 +max_lcores = 32 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 6fb3f02ea..3a8b46812 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd0c' +max_numa_nodes = 1 +max_lcores = 4 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index ac1042806..2baf95a2a 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xb2' +max_numa_nodes = 1 +max_lcores = 36 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index b79389d85..7ff6fd309 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_numa_nodes = 1 +max_lcores = 16 diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index dd257745e..07440fe5f 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xaf' +max_numa_nodes = 2 +max_lcores = 256 diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 670764437..16ba78fd6 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -14,3 +14,5 @@ endian = 'little' [properties] implementer_id = '0x43' +max_numa_nodes = 1 +max_lcores = 96 diff --git a/config/arm/meson.build b/config/arm/meson.build index 66b08bfb5..5605e807b 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -33,44 +33,40 @@ flags_common_default = [ ['RTE_ARCH_ARM64', true] ] +# add these to defaults when machine='generic-armv8' +flags_force_generic = [ + ['RTE_MAX_NUMA_NODES', 4], + ['RTE_MAX_LCORE', 256] +] + # implementer specific aarch64 flags, with middle priority # (will overwrite common flags) flags_generic = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128] ] flags_arm = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64] ] flags_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128] ] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false] ] flags_emag = [ ['RTE_MACHINE', '"emag"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32], ['RTE_CACHE_LINE_SIZE', 64] ] flags_armada = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16], ['RTE_CACHE_LINE_SIZE', 64] ] @@ -78,8 +74,6 @@ flags_armada = [ # (will overwrite both common and implementer specific flags) flags_n1sdp_extra = [ ['RTE_MACHINE', '"n1sdp"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 4], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], ['RTE_LIBRTE_VHOST_NUMA', false] ] @@ -90,15 +84,11 @@ flags_thunderx_extra = [ flags_thunderx2_extra = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 2], - ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true] ] flags_octeontx2_extra = [ ['RTE_MACHINE', '"octeontx2"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true] @@ -160,6 +150,7 @@ else # default build impl_config = impl_generic part_number = 'generic' + flags_common_default += flags_force_generic else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -214,6 +205,26 @@ else dpdk_flags += part_number_config[1] endif + # apply cross-specific options + if meson.is_cross_build() + # configure RTE_MAX_NUMA_NODES and RTE_MAX_LCORE from cross file + # RFC: do we want defaults for these two? or should we require + # that all cross file define them? + cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0) + if cross_max_numa_nodes != 0 + dpdk_flags += [ + ['RTE_MAX_NUMA_NODES', cross_max_numa_nodes] + ] + endif + cross_max_lcores = meson.get_cross_property('max_lcores', 0) + if cross_max_lcores != 0 + message('Setting RTE_MAX_LCORE from cross file') + dpdk_flags += [ + ['RTE_MAX_LCORE', cross_max_lcores] + ] + endif + endif + machine_args = [] # Clear previous machine args foreach flag: part_number_config[0] if cc.has_argument(flag) -- 2.20.1