DPDK patches and discussions
 help / color / mirror / Atom feed
From: Matan Azrad <matan@nvidia.com>
To: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Cc: dev@dpdk.org, Dekel Peled <dekelp@nvidia.com>
Subject: [dpdk-dev] [PATCH 5/8] common/mlx5: add definitions for ASO flow hit
Date: Thu, 29 Oct 2020 21:57:58 +0000	[thread overview]
Message-ID: <1604008681-414157-6-git-send-email-matan@nvidia.com> (raw)
In-Reply-To: <1604008681-414157-1-git-send-email-matan@nvidia.com>

From: Dekel Peled <dekelp@nvidia.com>

This patch adds different PRM definitions, related to ASO flow hit
feature, in MLX5 PMD code.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
---
 drivers/common/mlx5/linux/meson.build |  2 ++
 drivers/common/mlx5/mlx5_prm.h        | 66 ++++++++++++++++++++++++++++++++++-
 2 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build
index 7c552a3..a738cd2 100644
--- a/drivers/common/mlx5/linux/meson.build
+++ b/drivers/common/mlx5/linux/meson.build
@@ -126,6 +126,8 @@ has_sym_args = [
 	'MLX5_OPCODE_SEND_EN' ],
 	[ 'HAVE_MLX5_OPCODE_WAIT', 'infiniband/mlx5dv.h',
 	'MLX5_OPCODE_WAIT' ],
+        [ 'HAVE_MLX5_OPCODE_ACCESS_ASO', 'infiniband/mlx5dv.h',
+        'MLX5_OPCODE_ACCESS_ASO' ],
 	[ 'HAVE_SUPPORTED_40000baseKR4_Full', 'linux/ethtool.h',
 	'SUPPORTED_40000baseKR4_Full' ],
 	[ 'HAVE_SUPPORTED_40000baseCR4_Full', 'linux/ethtool.h',
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 9514aba..cd50d13 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -120,7 +120,7 @@
 				  MLX5_WQE_DSEG_SIZE + \
 				  MLX5_ESEG_MIN_INLINE_SIZE)
 
-/* Missed in mlv5dv.h, should define here. */
+/* Missed in mlx5dv.h, should define here. */
 #ifndef HAVE_MLX5_OPCODE_ENHANCED_MPSW
 #define MLX5_OPCODE_ENHANCED_MPSW 0x29u
 #endif
@@ -133,6 +133,10 @@
 #define MLX5_OPCODE_WAIT 0x0fu
 #endif
 
+#ifndef HAVE_MLX5_OPCODE_ACCESS_ASO
+#define MLX5_OPCODE_ACCESS_ASO 0x2du
+#endif
+
 /* CQE value to inform that VLAN is stripped. */
 #define MLX5_CQE_VLAN_STRIPPED (1u << 0)
 
@@ -2348,6 +2352,66 @@ struct mlx5_ifc_create_flow_hit_aso_in_bits {
 	struct mlx5_ifc_flow_hit_aso_bits flow_hit_aso;
 };
 
+enum mlx5_access_aso_op_mod {
+	ASO_OP_MOD_IPSEC = 0x0,
+	ASO_OP_MOD_CONNECTION_TRACKING = 0x1,
+	ASO_OP_MOD_POLICER = 0x2,
+	ASO_OP_MOD_RACE_AVOIDANCE = 0x3,
+	ASO_OP_MOD_FLOW_HIT = 0x4,
+};
+
+enum mlx5_aso_data_mask_mode {
+	BITWISE_64BIT = 0x0,
+	BYTEWISE_64BYTE = 0x1,
+	CALCULATED_64BYTE = 0x2,
+};
+
+enum mlx5_aso_pre_cond_op {
+	ASO_OP_ALWAYS_FALSE = 0x0,
+	ASO_OP_ALWAYS_TRUE = 0x1,
+	ASO_OP_EQUAL = 0x2,
+	ASO_OP_NOT_EQUAL = 0x3,
+	ASO_OP_GREATER_OR_EQUAL = 0x4,
+	ASO_OP_LESSER_OR_EQUAL = 0x5,
+	ASO_OP_LESSER = 0x6,
+	ASO_OP_GREATER = 0x7,
+	ASO_OP_CYCLIC_GREATER = 0x8,
+	ASO_OP_CYCLIC_LESSER = 0x9,
+};
+
+enum mlx5_aso_op {
+	ASO_OPER_LOGICAL_AND = 0x0,
+	ASO_OPER_LOGICAL_OR = 0x1,
+};
+
+/* ASO WQE CTRL segment. */
+struct mlx5_aso_cseg {
+	uint32_t va_h;
+	uint32_t va_l_ro;
+	uint32_t lkey;
+	uint32_t operand_masks;
+	uint32_t condition_0_data;
+	uint32_t condition_0_mask;
+	uint32_t condition_1_data;
+	uint32_t condition_1_mask;
+	uint64_t bitwise_data;
+	uint64_t data_mask;
+} __rte_packed;
+
+#define MLX5_ASO_WQE_DSEG_SIZE	0x40
+
+/* ASO WQE Data segment. */
+struct mlx5_aso_dseg {
+	uint8_t data[MLX5_ASO_WQE_DSEG_SIZE];
+} __rte_packed;
+
+/* ASO WQE. */
+struct mlx5_aso_wqe {
+	struct mlx5_wqe_cseg general_cseg;
+	struct mlx5_aso_cseg aso_cseg;
+	struct mlx5_aso_dseg aso_dseg;
+} __rte_packed;
+
 enum {
 	MLX5_QP_ST_RC = 0x0,
 };
-- 
1.8.3.1


  parent reply	other threads:[~2020-10-29 21:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-29 21:57 [dpdk-dev] [PATCH 0/8] net/mlx5: support flow hit steering action Matan Azrad
2020-10-29 21:57 ` [dpdk-dev] [PATCH 1/8] common/mlx5: add DevX API to create ASO flow hit object Matan Azrad
2020-10-29 21:57 ` [dpdk-dev] [PATCH 2/8] common/mlx5: use general object type for cap index Matan Azrad
2020-10-29 21:57 ` [dpdk-dev] [PATCH 3/8] common/mlx5: add read ASO flow hit HCA capability Matan Azrad
2020-10-29 21:57 ` [dpdk-dev] [PATCH 4/8] common/mlx5: add glue func create flow hit action Matan Azrad
2020-10-29 21:57 ` Matan Azrad [this message]
2020-10-29 21:57 ` [dpdk-dev] [PATCH 6/8] net/mlx5: support flow hit action for aging Matan Azrad
2020-10-29 21:58 ` [dpdk-dev] [PATCH 7/8] net/mlx5: optimize shared RSS action memory Matan Azrad
2020-10-29 21:58 ` [dpdk-dev] [PATCH 8/8] net/mlx5: support shared age action Matan Azrad
2020-11-01 17:57 ` [dpdk-dev] [PATCH v2 0/9] net/mlx5: support flow hit steering action Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 1/9] common/mlx5: add DevX API to create ASO flow hit object Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 2/9] common/mlx5: use general object type for cap index Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 3/9] common/mlx5: add read ASO flow hit HCA capability Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 4/9] common/mlx5: add glue func create flow hit action Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 5/9] common/mlx5: add definitions for ASO flow hit Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 6/9] net/mlx5: support flow hit action for aging Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 7/9] net/mlx5: optimize shared RSS action memory Matan Azrad
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 8/9] net/mlx5: support shared age action Matan Azrad
2020-11-02  6:16     ` Matan Azrad
2020-11-02  9:33       ` Raslan Darawsheh
2020-11-01 17:57   ` [dpdk-dev] [PATCH v2 9/9] net/mlx5: allow age modes combination Matan Azrad
2020-11-02 11:10   ` [dpdk-dev] [PATCH v2 0/9] net/mlx5: support flow hit steering action Raslan Darawsheh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1604008681-414157-6-git-send-email-matan@nvidia.com \
    --to=matan@nvidia.com \
    --cc=dekelp@nvidia.com \
    --cc=dev@dpdk.org \
    --cc=viacheslavo@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).