From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 40BA4A04E7; Sun, 1 Nov 2020 18:58:38 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9DD412BF5; Sun, 1 Nov 2020 18:58:17 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 972562BF4 for ; Sun, 1 Nov 2020 18:58:16 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from matan@nvidia.com) with SMTP; 1 Nov 2020 19:58:14 +0200 Received: from nvidia.com (pegasus25.mtr.labs.mlnx [10.210.16.10]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0A1Hvxnr009671; Sun, 1 Nov 2020 19:58:14 +0200 From: Matan Azrad To: Viacheslav Ovsiienko Cc: dev@dpdk.org, Dekel Peled Date: Sun, 1 Nov 2020 17:57:45 +0000 Message-Id: <1604253472-213766-3-git-send-email-matan@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1604253472-213766-1-git-send-email-matan@nvidia.com> References: <1604008681-414157-1-git-send-email-matan@nvidia.com> <1604253472-213766-1-git-send-email-matan@nvidia.com> Subject: [dpdk-dev] [PATCH v2 2/9] common/mlx5: use general object type for cap index X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dekel Peled PRM defines the general object types using positive numbers. The same values are used as index for the relevant bit in HCA capabilities general_obj_types bit mask. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index c2cdd78..0d123ba 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1041,9 +1041,12 @@ enum { MLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION = 0x13 << 1, }; -#define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTQ_NET_Q (1ULL << 0xd) -#define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_Q_COUNTERS (1ULL << 0x1c) -#define MLX5_GENERAL_OBJ_TYPES_CAP_PARSE_GRAPH_FLEX_NODE (1ULL << 0x22) +#define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTQ_NET_Q \ + (1ULL << MLX5_GENERAL_OBJ_TYPE_VIRTQ) +#define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_Q_COUNTERS \ + (1ULL << MLX5_GENERAL_OBJ_TYPE_VIRTIO_Q_COUNTERS) +#define MLX5_GENERAL_OBJ_TYPES_CAP_PARSE_GRAPH_FLEX_NODE \ + (1ULL << MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH) enum { MLX5_HCA_CAP_OPMOD_GET_MAX = 0, -- 1.8.3.1