From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 89611A04E7; Sun, 1 Nov 2020 18:58:59 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A944E2C2A; Sun, 1 Nov 2020 18:58:28 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 3B4F82BFF for ; Sun, 1 Nov 2020 18:58:27 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from matan@nvidia.com) with SMTP; 1 Nov 2020 19:58:22 +0200 Received: from nvidia.com (pegasus25.mtr.labs.mlnx [10.210.16.10]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0A1Hvxns009671; Sun, 1 Nov 2020 19:58:22 +0200 From: Matan Azrad To: Viacheslav Ovsiienko Cc: dev@dpdk.org, Dekel Peled Date: Sun, 1 Nov 2020 17:57:46 +0000 Message-Id: <1604253472-213766-4-git-send-email-matan@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1604253472-213766-1-git-send-email-matan@nvidia.com> References: <1604008681-414157-1-git-send-email-matan@nvidia.com> <1604253472-213766-1-git-send-email-matan@nvidia.com> Subject: [dpdk-dev] [PATCH v2 3/9] common/mlx5: add read ASO flow hit HCA capability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dekel Peled Read and store the device capability of FLOW_HIT_ASO general object, using the DevX API. Signed-off-by: Dekel Peled Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 3 +++ drivers/common/mlx5/mlx5_devx_cmds.h | 1 + drivers/common/mlx5/mlx5_prm.h | 2 ++ 3 files changed, 6 insertions(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index a87b624..aacb105 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -719,6 +719,9 @@ struct mlx5_devx_obj * attr->regex = MLX5_GET(cmd_hca_cap, hcattr, regexp); attr->regexp_num_of_engines = MLX5_GET(cmd_hca_cap, hcattr, regexp_num_of_engines); + attr->flow_hit_aso = !!(MLX5_GET64(cmd_hca_cap, hcattr, + general_obj_types) & + MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO); if (attr->qos.sup) { MLX5_SET(query_hca_cap_in, in, op_mod, MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP | diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index c3bbc01..8fedfac 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -102,6 +102,7 @@ struct mlx5_hca_attr { uint32_t num_lag_ports:4; /* Number of ports can be bonded. */ uint32_t dev_freq_khz; /* Timestamp counter frequency, kHz. */ uint32_t scatter_fcs_w_decap_disable:1; + uint32_t flow_hit_aso:1; /* General obj type FLOW_HIT_ASO supported. */ uint32_t regex:1; uint32_t regexp_num_of_engines; uint32_t log_max_ft_sampler_num:8; diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 0d123ba..2c5da16 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -1047,6 +1047,8 @@ enum { (1ULL << MLX5_GENERAL_OBJ_TYPE_VIRTIO_Q_COUNTERS) #define MLX5_GENERAL_OBJ_TYPES_CAP_PARSE_GRAPH_FLEX_NODE \ (1ULL << MLX5_GENERAL_OBJ_TYPE_FLEX_PARSE_GRAPH) +#define MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO \ + (1ULL << MLX5_GENERAL_OBJ_TYPE_FLOW_HIT_ASO) enum { MLX5_HCA_CAP_OPMOD_GET_MAX = 0, -- 1.8.3.1