From: Michael Baum <michaelba@nvidia.com>
To: dev@dpdk.org
Cc: Matan Azrad <matan@nvidia.com>,
Raslan Darawsheh <rasland@nvidia.com>,
Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Subject: [dpdk-dev] [PATCH v2 11/17] regex/mlx5: move DevX SQ creation to common
Date: Tue, 29 Dec 2020 08:52:18 +0000 [thread overview]
Message-ID: <1609231944-29274-12-git-send-email-michaelba@nvidia.com> (raw)
In-Reply-To: <1609231944-29274-1-git-send-email-michaelba@nvidia.com>
Using common function for DevX SQ creation.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/regex/mlx5/mlx5_regex.h | 8 +-
drivers/regex/mlx5/mlx5_regex_control.c | 153 ++++++++++---------------------
drivers/regex/mlx5/mlx5_regex_fastpath.c | 14 +--
3 files changed, 55 insertions(+), 120 deletions(-)
diff --git a/drivers/regex/mlx5/mlx5_regex.h b/drivers/regex/mlx5/mlx5_regex.h
index 9f7a388..7e1b2a9 100644
--- a/drivers/regex/mlx5/mlx5_regex.h
+++ b/drivers/regex/mlx5/mlx5_regex.h
@@ -18,15 +18,10 @@
struct mlx5_regex_sq {
uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
- struct mlx5_devx_obj *obj; /* The SQ DevX object. */
- int64_t dbr_offset; /* Door bell record offset. */
- uint32_t dbr_umem; /* Door bell record umem id. */
- uint8_t *wqe; /* The SQ ring buffer. */
- struct mlx5dv_devx_umem *wqe_umem; /* SQ buffer umem. */
+ struct mlx5_devx_sq sq_obj; /* The SQ DevX object. */
size_t pi, db_pi;
size_t ci;
uint32_t sqn;
- uint32_t *dbr;
};
struct mlx5_regex_cq {
@@ -73,7 +68,6 @@ struct mlx5_regex_priv {
uint32_t nb_engines; /* Number of RegEx engines. */
struct mlx5dv_devx_uar *uar; /* UAR object. */
struct ibv_pd *pd;
- struct mlx5_dbr_page_list dbrpgs; /* Door-bell pages. */
struct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */
};
diff --git a/drivers/regex/mlx5/mlx5_regex_control.c b/drivers/regex/mlx5/mlx5_regex_control.c
index ca6c0f5..df57fad 100644
--- a/drivers/regex/mlx5/mlx5_regex_control.c
+++ b/drivers/regex/mlx5/mlx5_regex_control.c
@@ -112,6 +112,27 @@
#endif
/**
+ * Destroy the SQ object.
+ *
+ * @param qp
+ * Pointer to the QP element
+ * @param q_ind
+ * The index of the queue.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+regex_ctrl_destroy_sq(struct mlx5_regex_qp *qp, uint16_t q_ind)
+{
+ struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
+
+ mlx5_devx_sq_destroy(&sq->sq_obj);
+ memset(sq, 0, sizeof(*sq));
+ return 0;
+}
+
+/**
* create the SQ object.
*
* @param priv
@@ -131,84 +152,42 @@
uint16_t q_ind, uint16_t log_nb_desc)
{
#ifdef HAVE_IBV_FLOW_DV_SUPPORT
- struct mlx5_devx_create_sq_attr attr = { 0 };
- struct mlx5_devx_modify_sq_attr modify_attr = { 0 };
- struct mlx5_devx_wq_attr *wq_attr = &attr.wq_attr;
- struct mlx5_devx_dbr_page *dbr_page = NULL;
+ struct mlx5_devx_create_sq_attr attr = {
+ .user_index = q_ind,
+ .cqn = qp->cq.cq_obj.cq->id,
+ .wq_attr = (struct mlx5_devx_wq_attr){
+ .uar_page = priv->uar->page_id,
+ },
+ };
+ struct mlx5_devx_modify_sq_attr modify_attr = {
+ .state = MLX5_SQC_STATE_RDY,
+ };
struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
- void *buf = NULL;
- uint32_t sq_size;
uint32_t pd_num = 0;
int ret;
sq->log_nb_desc = log_nb_desc;
- sq_size = 1 << sq->log_nb_desc;
- sq->dbr_offset = mlx5_get_dbr(priv->ctx, &priv->dbrpgs, &dbr_page);
- if (sq->dbr_offset < 0) {
- DRV_LOG(ERR, "Can't allocate sq door bell record.");
- rte_errno = ENOMEM;
- goto error;
- }
- sq->dbr_umem = mlx5_os_get_umem_id(dbr_page->umem);
- sq->dbr = (uint32_t *)((uintptr_t)dbr_page->dbrs +
- (uintptr_t)sq->dbr_offset);
-
- buf = rte_calloc(NULL, 1, 64 * sq_size, 4096);
- if (!buf) {
- DRV_LOG(ERR, "Can't allocate wqe buffer.");
- rte_errno = ENOMEM;
- goto error;
- }
- sq->wqe = buf;
- sq->wqe_umem = mlx5_glue->devx_umem_reg(priv->ctx, buf, 64 * sq_size,
- 7);
sq->ci = 0;
sq->pi = 0;
- if (!sq->wqe_umem) {
- DRV_LOG(ERR, "Can't register wqe mem.");
- rte_errno = ENOMEM;
- goto error;
- }
- attr.state = MLX5_SQC_STATE_RST;
- attr.tis_lst_sz = 0;
- attr.tis_num = 0;
- attr.user_index = q_ind;
- attr.cqn = qp->cq.cq_obj.cq->id;
- wq_attr->uar_page = priv->uar->page_id;
- regex_get_pdn(priv->pd, &pd_num);
- wq_attr->pd = pd_num;
- wq_attr->wq_type = MLX5_WQ_TYPE_CYCLIC;
- wq_attr->dbr_umem_id = sq->dbr_umem;
- wq_attr->dbr_addr = sq->dbr_offset;
- wq_attr->dbr_umem_valid = 1;
- wq_attr->wq_umem_id = mlx5_os_get_umem_id(sq->wqe_umem);
- wq_attr->wq_umem_offset = 0;
- wq_attr->wq_umem_valid = 1;
- wq_attr->log_wq_stride = 6;
- wq_attr->log_wq_sz = sq->log_nb_desc;
- sq->obj = mlx5_devx_cmd_create_sq(priv->ctx, &attr);
- if (!sq->obj) {
- DRV_LOG(ERR, "Can't create sq object.");
- rte_errno = ENOMEM;
- goto error;
+ ret = regex_get_pdn(priv->pd, &pd_num);
+ if (ret)
+ return ret;
+ attr.wq_attr.pd = pd_num;
+ ret = mlx5_devx_sq_create(priv->ctx, &sq->sq_obj, log_nb_desc, &attr,
+ SOCKET_ID_ANY);
+ if (ret) {
+ DRV_LOG(ERR, "Can't create SQ object.");
+ rte_errno = ENOMEM;
+ return -rte_errno;
}
- modify_attr.state = MLX5_SQC_STATE_RDY;
- ret = mlx5_devx_cmd_modify_sq(sq->obj, &modify_attr);
+ ret = mlx5_devx_cmd_modify_sq(sq->sq_obj.sq, &modify_attr);
if (ret) {
- DRV_LOG(ERR, "Can't change sq state to ready.");
- rte_errno = ENOMEM;
- goto error;
+ DRV_LOG(ERR, "Can't change SQ state to ready.");
+ regex_ctrl_destroy_sq(qp, q_ind);
+ rte_errno = ENOMEM;
+ return -rte_errno;
}
-
return 0;
-error:
- if (sq->wqe_umem)
- mlx5_glue->devx_umem_dereg(sq->wqe_umem);
- if (buf)
- rte_free(buf);
- if (sq->dbr_offset)
- mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
- return -rte_errno;
#else
(void)priv;
(void)qp;
@@ -220,44 +199,6 @@
}
/**
- * Destroy the SQ object.
- *
- * @param priv
- * Pointer to the priv object.
- * @param qp
- * Pointer to the QP element
- * @param q_ind
- * The index of the queue.
- *
- * @return
- * 0 on success, a negative errno value otherwise and rte_errno is set.
- */
-static int
-regex_ctrl_destroy_sq(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
- uint16_t q_ind)
-{
- struct mlx5_regex_sq *sq = &qp->sqs[q_ind];
-
- if (sq->wqe_umem) {
- mlx5_glue->devx_umem_dereg(sq->wqe_umem);
- sq->wqe_umem = NULL;
- }
- if (sq->wqe) {
- rte_free((void *)(uintptr_t)sq->wqe);
- sq->wqe = NULL;
- }
- if (sq->dbr_offset) {
- mlx5_release_dbr(&priv->dbrpgs, sq->dbr_umem, sq->dbr_offset);
- sq->dbr_offset = -1;
- }
- if (sq->obj) {
- mlx5_devx_cmd_destroy(sq->obj);
- sq->obj = NULL;
- }
- return 0;
-}
-
-/**
* Setup the qp.
*
* @param dev
@@ -329,7 +270,7 @@
mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh);
err_btree:
for (i = 0; i < nb_sq_config; i++)
- regex_ctrl_destroy_sq(priv, qp, i);
+ regex_ctrl_destroy_sq(qp, i);
regex_ctrl_destroy_cq(&qp->cq);
err_cq:
rte_free(qp->sqs);
diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c
index 255fd40..cd0f9bd 100644
--- a/drivers/regex/mlx5/mlx5_regex_fastpath.c
+++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c
@@ -110,12 +110,12 @@ struct mlx5_regex_job {
&priv->mr_scache, &qp->mr_ctrl,
rte_pktmbuf_mtod(op->mbuf, uintptr_t),
!!(op->mbuf->ol_flags & EXT_ATTACHED_MBUF));
- uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset;
+ uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes + wqe_offset;
int ds = 4; /* ctrl + meta + input + output */
set_wqe_ctrl_seg((struct mlx5_wqe_ctrl_seg *)wqe, sq->pi,
- MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id,
- 0, ds, 0, 0);
+ MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX,
+ sq->sq_obj.sq->id, 0, ds, 0, 0);
set_regex_ctrl_seg(wqe + 12, 0, op->group_id0, op->group_id1,
op->group_id2,
op->group_id3, 0);
@@ -137,12 +137,12 @@ struct mlx5_regex_job {
{
size_t wqe_offset = (sq->db_pi & (sq_size_get(sq) - 1)) *
MLX5_SEND_WQE_BB;
- uint8_t *wqe = (uint8_t *)sq->wqe + wqe_offset;
+ uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes + wqe_offset;
((struct mlx5_wqe_ctrl_seg *)wqe)->fm_ce_se = MLX5_WQE_CTRL_CQ_UPDATE;
uint64_t *doorbell_addr =
(uint64_t *)((uint8_t *)uar->base_addr + 0x800);
rte_io_wmb();
- sq->dbr[MLX5_SND_DBR] = rte_cpu_to_be_32((sq->db_pi + 1) &
+ sq->sq_obj.db_rec[MLX5_SND_DBR] = rte_cpu_to_be_32((sq->db_pi + 1) &
MLX5_REGEX_MAX_WQE_INDEX);
rte_wmb();
*doorbell_addr = *(volatile uint64_t *)wqe;
@@ -301,7 +301,7 @@ struct mlx5_regex_job {
uint32_t job_id;
for (sqid = 0; sqid < queue->nb_obj; sqid++) {
struct mlx5_regex_sq *sq = &queue->sqs[sqid];
- uint8_t *wqe = (uint8_t *)sq->wqe;
+ uint8_t *wqe = (uint8_t *)(uintptr_t)sq->sq_obj.wqes;
for (entry = 0 ; entry < sq_size_get(sq); entry++) {
job_id = sqid * sq_size_get(sq) + entry;
struct mlx5_regex_job *job = &queue->jobs[job_id];
@@ -334,7 +334,7 @@ struct mlx5_regex_job {
return -ENOMEM;
qp->metadata = mlx5_glue->reg_mr(pd, ptr,
- MLX5_REGEX_METADATA_SIZE*qp->nb_desc,
+ MLX5_REGEX_METADATA_SIZE * qp->nb_desc,
IBV_ACCESS_LOCAL_WRITE);
if (!qp->metadata) {
DRV_LOG(ERR, "Failed to register metadata");
--
1.8.3.1
next prev parent reply other threads:[~2020-12-29 8:52 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-17 11:44 [dpdk-dev] [PATCH 00/17] common/mlx5: share DevX resources creations Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 01/17] net/mlx5: fix ASO SQ creation error flow Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 00/17] common/mlx5: share DevX resources creations Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 01/17] net/mlx5: fix ASO SQ creation error flow Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 00/19] common/mlx5: share DevX resources creations Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 01/19] common/mlx5: fix completion queue entry size configuration Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 02/19] net/mlx5: remove CQE padding device argument Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 03/19] net/mlx5: fix ASO SQ creation error flow Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 04/19] common/mlx5: share DevX CQ creation Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 05/19] regex/mlx5: move DevX CQ creation to common Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 06/19] vdpa/mlx5: " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 07/19] net/mlx5: move rearm and clock queue " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 08/19] net/mlx5: move ASO " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 09/19] net/mlx5: move Tx " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 10/19] net/mlx5: move Rx " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 11/19] common/mlx5: enhance page size configuration Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 12/19] common/mlx5: share DevX SQ creation Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 13/19] regex/mlx5: move DevX SQ creation to common Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 14/19] net/mlx5: move rearm and clock queue " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 15/19] net/mlx5: move Tx " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 16/19] net/mlx5: move ASO " Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 17/19] common/mlx5: share DevX RQ creation Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 18/19] net/mlx5: move Rx RQ creation to common Michael Baum
2021-01-06 8:19 ` [dpdk-dev] [PATCH v3 19/19] common/mlx5: remove doorbell allocation API Michael Baum
2021-01-12 21:39 ` [dpdk-dev] [PATCH v3 00/19] common/mlx5: share DevX resources creations Thomas Monjalon
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 02/17] common/mlx5: share DevX CQ creation Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 03/17] regex/mlx5: move DevX CQ creation to common Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 04/17] vdpa/mlx5: " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 05/17] net/mlx5: move rearm and clock queue " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 06/17] net/mlx5: move ASO " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 07/17] net/mlx5: move Tx " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 08/17] net/mlx5: move Rx " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 09/17] common/mlx5: enhance page size configuration Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 10/17] common/mlx5: share DevX SQ creation Michael Baum
2020-12-29 8:52 ` Michael Baum [this message]
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 12/17] net/mlx5: move rearm and clock queue SQ creation to common Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 13/17] net/mlx5: move Tx " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 14/17] net/mlx5: move ASO " Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 15/17] common/mlx5: share DevX RQ creation Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 16/17] net/mlx5: move Rx RQ creation to common Michael Baum
2020-12-29 8:52 ` [dpdk-dev] [PATCH v2 17/17] common/mlx5: remove doorbell allocation API Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 02/17] common/mlx5: share DevX CQ creation Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 03/17] regex/mlx5: move DevX CQ creation to common Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 04/17] vdpa/mlx5: " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 05/17] net/mlx5: move rearm and clock queue " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 06/17] net/mlx5: move ASO " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 07/17] net/mlx5: move Tx " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 08/17] net/mlx5: move Rx " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 09/17] common/mlx5: enhance page size configuration Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 10/17] common/mlx5: share DevX SQ creation Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 11/17] regex/mlx5: move DevX SQ creation to common Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 12/17] net/mlx5: move rearm and clock queue " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 13/17] net/mlx5: move Tx " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 14/17] net/mlx5: move ASO " Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 15/17] common/mlx5: share DevX RQ creation Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 16/17] net/mlx5: move Rx RQ creation to common Michael Baum
2020-12-17 11:44 ` [dpdk-dev] [PATCH 17/17] common/mlx5: remove doorbell allocation API Michael Baum
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