From: "谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com>
To: ferruh.yigit@intel.com, maxime.coquelin@redhat.com,
david.marchand@redhat.com
Cc: dev@dpdk.org, anatoly.burakov@intel.com, xuemingl@nvidia.com,
grive@u256.net, chenbo.xia@intel.com,
"谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com>
Subject: [dpdk-dev] [PATCH v9 1/2] bus/pci: use PCI standard sysfs entry to get PIO address
Date: Thu, 04 Mar 2021 01:46:51 +0800 [thread overview]
Message-ID: <1614793612-91528-2-git-send-email-huawei.xhw@alibaba-inc.com> (raw)
In-Reply-To: <1614793612-91528-1-git-send-email-huawei.xhw@alibaba-inc.com>
From: "huawei.xhw" <huawei.xhw@alibaba-inc.com>
Currently virtio PMD asssumes legacy device uses PIO bar.
There are three ways to get PIO(PortIO) address for virtio legacy device.
under igb_uio, get pio address from uio/uio# sysfs attribute
under uio_pci_generic:
for X86, get PIO address from /proc/ioport
for other ARCH, get PIO address from standard PCI sysfs attribute
Actually, igb_uio sysfs attribute exports exactly the same thing as standard PCI sysfs, i.e,
pci_dev->resource[] in kernel source code
This patch refactors these messy things, and uses standard PCI sysfs attribute.
Signed-off-by: huawei xie <huawei.xhw@alibaba-inc.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/bus/pci/linux/pci.c | 77 -----------------------------------------
drivers/bus/pci/linux/pci_uio.c | 64 ++++++++++++++++++++++++----------
2 files changed, 46 insertions(+), 95 deletions(-)
diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c
index 2e1808b..0f38abf 100644
--- a/drivers/bus/pci/linux/pci.c
+++ b/drivers/bus/pci/linux/pci.c
@@ -677,71 +677,6 @@ int rte_pci_write_config(const struct rte_pci_device *device,
}
}
-#if defined(RTE_ARCH_X86)
-static int
-pci_ioport_map(struct rte_pci_device *dev, int bar __rte_unused,
- struct rte_pci_ioport *p)
-{
- uint16_t start, end;
- FILE *fp;
- char *line = NULL;
- char pci_id[16];
- int found = 0;
- size_t linesz;
-
- if (rte_eal_iopl_init() != 0) {
- RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n",
- __func__, dev->name);
- return -1;
- }
-
- snprintf(pci_id, sizeof(pci_id), PCI_PRI_FMT,
- dev->addr.domain, dev->addr.bus,
- dev->addr.devid, dev->addr.function);
-
- fp = fopen("/proc/ioports", "r");
- if (fp == NULL) {
- RTE_LOG(ERR, EAL, "%s(): can't open ioports\n", __func__);
- return -1;
- }
-
- while (getdelim(&line, &linesz, '\n', fp) > 0) {
- char *ptr = line;
- char *left;
- int n;
-
- n = strcspn(ptr, ":");
- ptr[n] = 0;
- left = &ptr[n + 1];
-
- while (*left && isspace(*left))
- left++;
-
- if (!strncmp(left, pci_id, strlen(pci_id))) {
- found = 1;
-
- while (*ptr && isspace(*ptr))
- ptr++;
-
- sscanf(ptr, "%04hx-%04hx", &start, &end);
-
- break;
- }
- }
-
- free(line);
- fclose(fp);
-
- if (!found)
- return -1;
-
- p->base = start;
- RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%x\n", start);
-
- return 0;
-}
-#endif
-
int
rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p)
@@ -756,14 +691,8 @@ int rte_pci_write_config(const struct rte_pci_device *device,
break;
#endif
case RTE_PCI_KDRV_IGB_UIO:
- ret = pci_uio_ioport_map(dev, bar, p);
- break;
case RTE_PCI_KDRV_UIO_GENERIC:
-#if defined(RTE_ARCH_X86)
- ret = pci_ioport_map(dev, bar, p);
-#else
ret = pci_uio_ioport_map(dev, bar, p);
-#endif
break;
default:
break;
@@ -830,14 +759,8 @@ int rte_pci_write_config(const struct rte_pci_device *device,
break;
#endif
case RTE_PCI_KDRV_IGB_UIO:
- ret = pci_uio_ioport_unmap(p);
- break;
case RTE_PCI_KDRV_UIO_GENERIC:
-#if defined(RTE_ARCH_X86)
- ret = 0;
-#else
ret = pci_uio_ioport_unmap(p);
-#endif
break;
default:
break;
diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c
index f3305a2..01f2a40 100644
--- a/drivers/bus/pci/linux/pci_uio.c
+++ b/drivers/bus/pci/linux/pci_uio.c
@@ -373,10 +373,13 @@
pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p)
{
+ FILE *f = NULL;
char dirname[PATH_MAX];
char filename[PATH_MAX];
- int uio_num;
- unsigned long start;
+ char buf[BUFSIZ];
+ uint64_t phys_addr, end_addr, flags;
+ unsigned long base;
+ int i;
if (rte_eal_iopl_init() != 0) {
RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n",
@@ -384,41 +387,66 @@
return -1;
}
- uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0);
- if (uio_num < 0)
+ /* open and read addresses of the corresponding resource in sysfs */
+ snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource",
+ rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus,
+ dev->addr.devid, dev->addr.function);
+ f = fopen(filename, "r");
+ if (f == NULL) {
+ RTE_LOG(ERR, EAL, "%s(): Cannot open sysfs resource: %s\n",
+ __func__, strerror(errno));
return -1;
+ }
- /* get portio start */
- snprintf(filename, sizeof(filename),
- "%s/portio/port%d/start", dirname, bar);
- if (eal_parse_sysfs_value(filename, &start) < 0) {
- RTE_LOG(ERR, EAL, "%s(): cannot parse portio start\n",
- __func__);
- return -1;
+ for (i = 0; i < bar + 1; i++) {
+ if (fgets(buf, sizeof(buf), f) == NULL) {
+ RTE_LOG(ERR, EAL, "%s(): Cannot read sysfs resource\n", __func__);
+ goto error;
+ }
}
- /* ensure we don't get anything funny here, read/write will cast to
- * uin16_t */
- if (start > UINT16_MAX)
- return -1;
+ if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr,
+ &end_addr, &flags) < 0)
+ goto error;
+
+ if (!(flags & IORESOURCE_IO)) {
+ RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not supported\n", __func__);
+ goto error;
+ }
+ base = (unsigned long)phys_addr;
+ RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base);
+
+ if (base > UINT16_MAX)
+ goto error;
/* FIXME only for primary process ? */
if (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) {
+ int uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0);
+ if (uio_num < 0) {
+ RTE_LOG(ERR, EAL, "cannot open %s: %s\n",
+ dirname, strerror(errno));
+ goto error;
+ }
snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num);
dev->intr_handle.fd = open(filename, O_RDWR);
if (dev->intr_handle.fd < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
filename, strerror(errno));
- return -1;
+ goto error;
}
dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
}
- RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", start);
+ RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", base);
- p->base = start;
+ p->base = base;
p->len = 0;
+ fclose(f);
return 0;
+error:
+ if (f)
+ fclose(f);
+ return -1;
}
#else
int
--
1.8.3.1
next prev parent reply other threads:[~2021-03-03 17:47 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 3:18 [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-18 9:33 ` David Marchand
2021-02-21 15:58 ` 谢华伟(此时此刻)
2021-02-24 12:49 ` David Marchand
2021-02-24 15:29 ` 谢华伟(此时此刻)
2021-02-24 17:52 ` David Marchand
2021-03-01 15:47 ` 谢华伟(此时此刻)
2021-03-02 12:31 ` 谢华伟(此时此刻)
2021-01-29 3:18 ` [dpdk-dev] [PATCH v6 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-09 14:51 ` Ferruh Yigit
2021-02-19 8:52 ` Ferruh Yigit
2021-02-21 15:45 ` 谢华伟(此时此刻)
2021-02-17 9:06 ` David Marchand
2021-02-17 14:15 ` 谢华伟(此时此刻)
2021-02-18 9:33 ` David Marchand
2021-01-29 3:25 ` [dpdk-dev] [PATCH v6 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-02-01 7:43 ` 谢华伟(此时此刻)
2021-02-03 9:37 ` Maxime Coquelin
2021-02-04 2:50 ` 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 " 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-02-22 17:15 ` [dpdk-dev] [PATCH v7 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-02-22 17:25 ` Ferruh Yigit
2021-02-23 14:20 ` 谢华伟(此时此刻)
2021-02-24 15:45 ` Ferruh Yigit
2021-02-25 3:59 ` 谢华伟(此时此刻)
2021-02-25 9:52 ` David Marchand
2021-03-01 15:43 ` 谢华伟(此时此刻)
2021-03-02 13:14 ` David Marchand
2021-03-03 7:56 ` 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-01 16:01 ` [dpdk-dev] [PATCH v8 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-02 12:48 ` [dpdk-dev] [PATCH v8 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD 谢华伟(此时此刻)
2021-03-02 13:01 ` Ferruh Yigit
2021-03-02 13:17 ` David Marchand
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 " 谢华伟(此时此刻)
2021-03-03 17:46 ` 谢华伟(此时此刻) [this message]
2021-03-03 17:46 ` [dpdk-dev] [PATCH v9 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-03 18:24 ` [dpdk-dev] [PATCH v9 0/2] support both PIO and MMIO BAR for legacy device in virtio PMD Stephen Hemminger
2021-03-04 13:45 ` 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-05 16:17 ` 谢华伟(此时此刻)
2021-03-09 6:22 ` 谢华伟(此时此刻)
2021-03-09 7:44 ` David Marchand
2021-03-03 18:47 ` [dpdk-dev] [PATCH v10 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 1/2] bus/pci: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-03-10 17:36 ` [dpdk-dev] [PATCH v11 2/2] bus/pci: support MMIO in PCI ioport accessors 谢华伟(此时此刻)
2021-03-11 6:42 ` Wang, Haiyue
2021-03-15 10:19 ` David Marchand
2021-03-15 11:25 ` 谢华伟(此时此刻)
2021-03-15 13:11 ` Wang, Haiyue
2021-03-11 11:54 ` [dpdk-dev] [PATCH v11 0/2] support both PIO and MMIO BAR for legacy virito device Wang, Yinan
2021-03-12 14:32 ` David Marchand
2021-03-15 14:16 ` David Marchand
2021-03-17 8:12 ` 谢华伟(此时此刻)
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