* [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5
@ 2021-05-10 12:06 Chengwen Feng
2021-05-10 12:06 ` [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed Chengwen Feng
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Chengwen Feng @ 2021-05-10 12:06 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev
This patch set contains two bugfixes for mlx4 and mlx5.
Chengwen Feng (2):
net/mlx4: fix memory barrier incorrectly placed
net/mlx5: fix memory barrier incorrectly placed
drivers/net/mlx4/mlx4_mp.c | 2 +-
drivers/net/mlx5/linux/mlx5_mp_os.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--
2.8.1
^ permalink raw reply [flat|nested] 9+ messages in thread* [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed 2021-05-10 12:06 [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Chengwen Feng @ 2021-05-10 12:06 ` Chengwen Feng 2021-05-11 9:23 ` Slava Ovsiienko 2021-05-10 12:06 ` [dpdk-dev] [PATCH 2/2] net/mlx5: " Chengwen Feng ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: Chengwen Feng @ 2021-05-10 12:06 UTC (permalink / raw) To: thomas, ferruh.yigit; +Cc: dev The memory barrier is used to ensure that the response is returned only after the Tx/Rx function is set, it should place after the Rx/Tx function is set. Fixes: 0203d33a1059 ("net/mlx4: support secondary process") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> --- drivers/net/mlx4/mlx4_mp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c index ddf7bdb..8fcfb54 100644 --- a/drivers/net/mlx4/mlx4_mp.c +++ b/drivers/net/mlx4/mlx4_mp.c @@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer) switch (param->type) { case MLX4_MP_REQ_START_RXTX: INFO("port %u starting datapath", dev->data->port_id); - rte_mb(); dev->tx_pkt_burst = mlx4_tx_burst; dev->rx_pkt_burst = mlx4_rx_burst; #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET @@ -144,6 +143,7 @@ mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer) } } #endif + rte_mb(); mp_init_msg(dev, &mp_res, param->type); res->result = 0; ret = rte_mp_reply(&mp_res, peer); -- 2.8.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed 2021-05-10 12:06 ` [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed Chengwen Feng @ 2021-05-11 9:23 ` Slava Ovsiienko 2021-05-11 11:08 ` fengchengwen 0 siblings, 1 reply; 9+ messages in thread From: Slava Ovsiienko @ 2021-05-11 9:23 UTC (permalink / raw) To: Chengwen Feng, NBU-Contact-Thomas Monjalon, ferruh.yigit; +Cc: dev > -----Original Message----- > From: dev <dev-bounces@dpdk.org> On Behalf Of Chengwen Feng > Sent: Monday, May 10, 2021 15:06 > To: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; > ferruh.yigit@intel.com > Cc: dev@dpdk.org > Subject: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly > placed > > The memory barrier is used to ensure that the response is returned only > after the Tx/Rx function is set, it should place after the Rx/Tx function is set. > > Fixes: 0203d33a1059 ("net/mlx4: support secondary process") > Cc: stable@dpdk.org > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> Hi, Chengwen Nice catch, thank you for the patches. Just out of curiosity - did we meet the real issue with this ineffective barrier? With best regards, Slava > --- > drivers/net/mlx4/mlx4_mp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c > index ddf7bdb..8fcfb54 100644 > --- a/drivers/net/mlx4/mlx4_mp.c > +++ b/drivers/net/mlx4/mlx4_mp.c > @@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg > *mp_msg, const void *peer) > switch (param->type) { > case MLX4_MP_REQ_START_RXTX: > INFO("port %u starting datapath", dev->data->port_id); > - rte_mb(); > dev->tx_pkt_burst = mlx4_tx_burst; > dev->rx_pkt_burst = mlx4_rx_burst; > #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET > @@ -144,6 +143,7 @@ mp_secondary_handle(const struct rte_mp_msg > *mp_msg, const void *peer) > } > } > #endif > + rte_mb(); > mp_init_msg(dev, &mp_res, param->type); > res->result = 0; > ret = rte_mp_reply(&mp_res, peer); > -- > 2.8.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed 2021-05-11 9:23 ` Slava Ovsiienko @ 2021-05-11 11:08 ` fengchengwen 2021-05-11 12:02 ` Slava Ovsiienko 0 siblings, 1 reply; 9+ messages in thread From: fengchengwen @ 2021-05-11 11:08 UTC (permalink / raw) To: Slava Ovsiienko, NBU-Contact-Thomas Monjalon, ferruh.yigit; +Cc: dev On 2021/5/11 17:23, Slava Ovsiienko wrote: >> -----Original Message----- >> From: dev <dev-bounces@dpdk.org> On Behalf Of Chengwen Feng >> Sent: Monday, May 10, 2021 15:06 >> To: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; >> ferruh.yigit@intel.com >> Cc: dev@dpdk.org >> Subject: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly >> placed >> >> The memory barrier is used to ensure that the response is returned only >> after the Tx/Rx function is set, it should place after the Rx/Tx function is set. >> >> Fixes: 0203d33a1059 ("net/mlx4: support secondary process") >> Cc: stable@dpdk.org >> >> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > > > Hi, Chengwen > > Nice catch, thank you for the patches. > Just out of curiosity - did we meet the real issue with this ineffective barrier? > > With best regards, > Slava > Hi, Slava It's just a theoretical analysis that's possible, I think it should never happen in practice. We found this problem when checking the memory barrier of the hns3 driver (ps: the implementation of hns3 mp is somewhat similar to that of mlx), this memory barrier got us a little confused, so we fix it to make it just less confusing. Best Regards >> --- >> drivers/net/mlx4/mlx4_mp.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c >> index ddf7bdb..8fcfb54 100644 >> --- a/drivers/net/mlx4/mlx4_mp.c >> +++ b/drivers/net/mlx4/mlx4_mp.c >> @@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg >> *mp_msg, const void *peer) >> switch (param->type) { >> case MLX4_MP_REQ_START_RXTX: >> INFO("port %u starting datapath", dev->data->port_id); >> - rte_mb(); >> dev->tx_pkt_burst = mlx4_tx_burst; >> dev->rx_pkt_burst = mlx4_rx_burst; >> #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET >> @@ -144,6 +143,7 @@ mp_secondary_handle(const struct rte_mp_msg >> *mp_msg, const void *peer) >> } >> } >> #endif >> + rte_mb(); >> mp_init_msg(dev, &mp_res, param->type); >> res->result = 0; >> ret = rte_mp_reply(&mp_res, peer); >> -- >> 2.8.1 > > > . > ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed 2021-05-11 11:08 ` fengchengwen @ 2021-05-11 12:02 ` Slava Ovsiienko 0 siblings, 0 replies; 9+ messages in thread From: Slava Ovsiienko @ 2021-05-11 12:02 UTC (permalink / raw) To: fengchengwen, NBU-Contact-Thomas Monjalon, ferruh.yigit; +Cc: dev > -----Original Message----- > From: fengchengwen <fengchengwen@huawei.com> > Sent: Tuesday, May 11, 2021 14:09 > To: Slava Ovsiienko <viacheslavo@nvidia.com>; NBU-Contact-Thomas > Monjalon <thomas@monjalon.net>; ferruh.yigit@intel.com > Cc: dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly > placed > > > > On 2021/5/11 17:23, Slava Ovsiienko wrote: > >> -----Original Message----- > >> From: dev <dev-bounces@dpdk.org> On Behalf Of Chengwen Feng > >> Sent: Monday, May 10, 2021 15:06 > >> To: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; > >> ferruh.yigit@intel.com > >> Cc: dev@dpdk.org > >> Subject: [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier > >> incorrectly placed > >> > >> The memory barrier is used to ensure that the response is returned > >> only after the Tx/Rx function is set, it should place after the Rx/Tx > function is set. > >> > >> Fixes: 0203d33a1059 ("net/mlx4: support secondary process") > >> Cc: stable@dpdk.org > >> > >> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> > > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > > > > > > Hi, Chengwen > > > > Nice catch, thank you for the patches. > > Just out of curiosity - did we meet the real issue with this ineffective > barrier? > > > > With best regards, > > Slava > > > > Hi, Slava > > It's just a theoretical analysis that's possible, I think it should never happen in > practice. > We found this problem when checking the memory barrier of the hns3 driver > (ps: the implementation of hns3 mp is somewhat similar to that of mlx), this > memory barrier got us a little confused, so we fix it to make it just less > confusing. OK, thank you for the answer. With best regards, Slava > > Best Regards > > >> --- > >> drivers/net/mlx4/mlx4_mp.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/net/mlx4/mlx4_mp.c b/drivers/net/mlx4/mlx4_mp.c > >> index ddf7bdb..8fcfb54 100644 > >> --- a/drivers/net/mlx4/mlx4_mp.c > >> +++ b/drivers/net/mlx4/mlx4_mp.c > >> @@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg > >> *mp_msg, const void *peer) > >> switch (param->type) { > >> case MLX4_MP_REQ_START_RXTX: > >> INFO("port %u starting datapath", dev->data->port_id); > >> - rte_mb(); > >> dev->tx_pkt_burst = mlx4_tx_burst; > >> dev->rx_pkt_burst = mlx4_rx_burst; #ifdef > >> HAVE_IBV_MLX4_UAR_MMAP_OFFSET @@ -144,6 +143,7 @@ > >> mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void > >> *peer) > >> } > >> } > >> #endif > >> + rte_mb(); > >> mp_init_msg(dev, &mp_res, param->type); > >> res->result = 0; > >> ret = rte_mp_reply(&mp_res, peer); > >> -- > >> 2.8.1 > > > > > > . > > ^ permalink raw reply [flat|nested] 9+ messages in thread
* [dpdk-dev] [PATCH 2/2] net/mlx5: fix memory barrier incorrectly placed 2021-05-10 12:06 [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Chengwen Feng 2021-05-10 12:06 ` [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed Chengwen Feng @ 2021-05-10 12:06 ` Chengwen Feng 2021-05-11 9:24 ` Slava Ovsiienko 2021-05-10 12:12 ` [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Thomas Monjalon 2021-05-12 8:54 ` Thomas Monjalon 3 siblings, 1 reply; 9+ messages in thread From: Chengwen Feng @ 2021-05-10 12:06 UTC (permalink / raw) To: thomas, ferruh.yigit; +Cc: dev The memory barrier is used to ensure that the response is returned only after the Tx/Rx function is set, it should place after the Rx/Tx function is set. Fixes: 2aac5b5d119f ("net/mlx5: sync stop/start with secondary process") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> --- drivers/net/mlx5/linux/mlx5_mp_os.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/linux/mlx5_mp_os.c b/drivers/net/mlx5/linux/mlx5_mp_os.c index ca529b6..3a4aa76 100644 --- a/drivers/net/mlx5/linux/mlx5_mp_os.c +++ b/drivers/net/mlx5/linux/mlx5_mp_os.c @@ -132,7 +132,6 @@ struct rte_mp_msg mp_res; switch (param->type) { case MLX5_MP_REQ_START_RXTX: DRV_LOG(INFO, "port %u starting datapath", dev->data->port_id); - rte_mb(); dev->rx_pkt_burst = mlx5_select_rx_function(dev); dev->tx_pkt_burst = mlx5_select_tx_function(dev); ppriv = (struct mlx5_proc_priv *)dev->process_private; @@ -149,6 +148,7 @@ struct rte_mp_msg mp_res; return -rte_errno; } } + rte_mb(); mp_init_msg(&priv->mp_id, &mp_res, param->type); res->result = 0; ret = rte_mp_reply(&mp_res, peer); -- 2.8.1 ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 2/2] net/mlx5: fix memory barrier incorrectly placed 2021-05-10 12:06 ` [dpdk-dev] [PATCH 2/2] net/mlx5: " Chengwen Feng @ 2021-05-11 9:24 ` Slava Ovsiienko 0 siblings, 0 replies; 9+ messages in thread From: Slava Ovsiienko @ 2021-05-11 9:24 UTC (permalink / raw) To: Chengwen Feng, NBU-Contact-Thomas Monjalon, ferruh.yigit; +Cc: dev > -----Original Message----- > From: dev <dev-bounces@dpdk.org> On Behalf Of Chengwen Feng > Sent: Monday, May 10, 2021 15:06 > To: NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; > ferruh.yigit@intel.com > Cc: dev@dpdk.org > Subject: [dpdk-dev] [PATCH 2/2] net/mlx5: fix memory barrier incorrectly > placed > > The memory barrier is used to ensure that the response is returned only > after the Tx/Rx function is set, it should place after the Rx/Tx function is set. > > Fixes: 2aac5b5d119f ("net/mlx5: sync stop/start with secondary process") > Cc: stable@dpdk.org > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 2021-05-10 12:06 [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Chengwen Feng 2021-05-10 12:06 ` [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed Chengwen Feng 2021-05-10 12:06 ` [dpdk-dev] [PATCH 2/2] net/mlx5: " Chengwen Feng @ 2021-05-10 12:12 ` Thomas Monjalon 2021-05-12 8:54 ` Thomas Monjalon 3 siblings, 0 replies; 9+ messages in thread From: Thomas Monjalon @ 2021-05-10 12:12 UTC (permalink / raw) To: Chengwen Feng; +Cc: ferruh.yigit, dev, matan, viacheslavo 10/05/2021 14:06, Chengwen Feng: > This patch set contains two bugfixes for mlx4 and mlx5. > > Chengwen Feng (2): > net/mlx4: fix memory barrier incorrectly placed > net/mlx5: fix memory barrier incorrectly placed Please could you use the option "--cc-cmd devtools/get-maintainer.sh" when sending patches, so the right people are Cc'ed? Adding Matan and Slava for these 2 patches. ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 2021-05-10 12:06 [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Chengwen Feng ` (2 preceding siblings ...) 2021-05-10 12:12 ` [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Thomas Monjalon @ 2021-05-12 8:54 ` Thomas Monjalon 3 siblings, 0 replies; 9+ messages in thread From: Thomas Monjalon @ 2021-05-12 8:54 UTC (permalink / raw) To: Chengwen Feng; +Cc: ferruh.yigit, dev, rasland 10/05/2021 14:06, Chengwen Feng: > This patch set contains two bugfixes for mlx4 and mlx5. > > Chengwen Feng (2): > net/mlx4: fix memory barrier incorrectly placed > net/mlx5: fix memory barrier incorrectly placed Applied in next-net-mlx, thanks ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-05-12 8:54 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-05-10 12:06 [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Chengwen Feng 2021-05-10 12:06 ` [dpdk-dev] [PATCH 1/2] net/mlx4: fix memory barrier incorrectly placed Chengwen Feng 2021-05-11 9:23 ` Slava Ovsiienko 2021-05-11 11:08 ` fengchengwen 2021-05-11 12:02 ` Slava Ovsiienko 2021-05-10 12:06 ` [dpdk-dev] [PATCH 2/2] net/mlx5: " Chengwen Feng 2021-05-11 9:24 ` Slava Ovsiienko 2021-05-10 12:12 ` [dpdk-dev] [PATCH 0/2] bugfix for mlx4 and mlx5 Thomas Monjalon 2021-05-12 8:54 ` Thomas Monjalon
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