From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C6A5A0547; Wed, 19 May 2021 15:29:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DE10E41108; Wed, 19 May 2021 15:28:56 +0200 (CEST) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by mails.dpdk.org (Postfix) with ESMTP id 1201D41107 for ; Wed, 19 May 2021 15:28:55 +0200 (CEST) Received: from dggems703-chm.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4FlYXn38VdzCtv0; Wed, 19 May 2021 21:26:01 +0800 (CST) Received: from dggpeml500024.china.huawei.com (7.185.36.10) by dggems703-chm.china.huawei.com (10.3.19.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Wed, 19 May 2021 21:28:48 +0800 Received: from localhost.localdomain (10.67.165.24) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Wed, 19 May 2021 21:28:47 +0800 From: Chengwen Feng To: , CC: , , , , , , , , Date: Wed, 19 May 2021 21:25:31 +0800 Message-ID: <1621430731-27753-3-git-send-email-fengchengwen@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1621430731-27753-1-git-send-email-fengchengwen@huawei.com> References: <1620808126-18876-1-git-send-email-fengchengwen@huawei.com> <1621430731-27753-1-git-send-email-fengchengwen@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.165.24] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v6 2/2] net/hns3: refactor SVE code compile method X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, the SVE code is compiled only when -march supports SVE (e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this approach. The solution: a. If the minimum instruction set support SVE then compiles it. b. Else if the compiler support SVE then compiles it. c. Otherwise don't compile it. [1] https://mails.dpdk.org/archives/dev/2021-April/208189.html Fixes: 8c25b02b082a ("net/hns3: fix enabling SVE Rx/Tx") Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng --- drivers/net/hns3/hns3_rxtx.c | 2 +- drivers/net/hns3/meson.build | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index 1d7a769..4ef20c6 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -2808,7 +2808,7 @@ hns3_get_default_vec_support(void) static bool hns3_get_sve_support(void) { -#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE) +#if defined(CC_SVE_SUPPORT) if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256) return false; if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE)) diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build index 53c7df7..5f9af9b 100644 --- a/drivers/net/hns3/meson.build +++ b/drivers/net/hns3/meson.build @@ -35,7 +35,26 @@ deps += ['hash'] if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64') sources += files('hns3_rxtx_vec.c') - if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' + + # compile SVE when: + # a. support SVE in minimum instruction set baseline + # b. it's not minimum instruction set, but compiler support + if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and cc.check_header('arm_sve.h') + cflags += ['-DCC_SVE_SUPPORT'] sources += files('hns3_rxtx_vec_sve.c') + elif cc.has_argument('-march=armv8.2-a+sve') and cc.check_header('arm_sve.h') + sve_cflags = ['-DCC_SVE_SUPPORT'] + foreach flag: cflags + # filterout -march -mcpu -mtune + if not (flag.startswith('-march=') or flag.startswith('-mcpu=') or flag.startswith('-mtune=')) + sve_cflags += flag + endif + endforeach + hns3_sve_lib = static_library('hns3_sve_lib', + 'hns3_rxtx_vec_sve.c', + dependencies: [static_rte_ethdev], + include_directories: includes, + c_args: [sve_cflags, '-march=armv8.2-a+sve']) + objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c') endif endif -- 2.8.1