From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0D709A0A0A; Thu, 20 May 2021 18:16:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ECAC2410F7; Thu, 20 May 2021 18:16:02 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 1EBD1410F5; Thu, 20 May 2021 18:16:00 +0200 (CEST) IronPort-SDR: HjQfAHLKWgsowkRF7wS6nYs7fG9eOx3nhyLEZbR3urpmjI4XGH1CDFXlQyCj7lCBE3PKKc3OJ5 Bp99k8aAqkzA== X-IronPort-AV: E=McAfee;i="6200,9189,9989"; a="201319851" X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="201319851" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2021 09:14:54 -0700 IronPort-SDR: YIDlL3ZZ/jqCNIev4xjd9JzPe/fUkhtCs6Rv+U0OZEsrzxab7ShwM9NuysA3ulHPzk7sAuhcs4 yV+c+1oFm0+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="474088858" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga001.jf.intel.com with ESMTP; 20 May 2021 09:14:54 -0700 From: Timothy McDaniel To: Cc: dev@dpdk.org, erik.g.carrillo@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net, david.marchand@redhat.com, stable@dpdk.org, timothy.mcdaniel@intel.com Date: Thu, 20 May 2021 11:13:06 -0500 Message-Id: <1621527186-5345-1-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1620843888-882873-1-git-send-email-timothy.mcdaniel@intel.com> References: <1620843888-882873-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH] event/dlb2: remove references to deferred scheduling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Deferred scheduling is a DLB v1.0 feature, and is not valid for DLB v2.0 or v2.5. Fixes: a3c8a44634e3 ("event/dlb2: remove useless code") Cc: stable@dpdk.org Signed-off-by: Timothy McDaniel --- Cc: timothy.mcdaniel@intel.com --- doc/guides/eventdevs/dlb2.rst | 21 --------------------- drivers/event/dlb2/dlb2_priv.h | 3 --- 2 files changed, 24 deletions(-) diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst index 31de6bc47..c60c454d6 100644 --- a/doc/guides/eventdevs/dlb2.rst +++ b/doc/guides/eventdevs/dlb2.rst @@ -293,27 +293,6 @@ The PMD does not support the following configuration sequences: This sequence is not supported because the event device must be reconfigured before its ports or queues can be. -Deferred Scheduling -~~~~~~~~~~~~~~~~~~~ - -The DLB PMD's default behavior for managing a CQ is to "pop" the CQ once per -dequeued event before returning from rte_event_dequeue_burst(). This frees the -corresponding entries in the CQ, which enables the DLB to schedule more events -to it. - -To support applications seeking finer-grained scheduling control -- for example -deferring scheduling to get the best possible priority scheduling and -load-balancing -- the PMD supports a deferred scheduling mode. In this mode, -the CQ entry is not popped until the *subsequent* rte_event_dequeue_burst() -call. This mode only applies to load-balanced event ports with dequeue depth of -1. - -To enable deferred scheduling, use the defer_sched vdev argument like so: - - .. code-block:: console - - --vdev=dlb2_event,defer_sched=on - Atomic Inflights Allocation ~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h index 3140764a5..b1225af37 100644 --- a/drivers/event/dlb2/dlb2_priv.h +++ b/drivers/event/dlb2/dlb2_priv.h @@ -32,7 +32,6 @@ #define DLB2_MAX_NUM_EVENTS "max_num_events" #define DLB2_NUM_DIR_CREDITS "num_dir_credits" #define DEV_ID_ARG "dev_id" -#define DLB2_DEFER_SCHED_ARG "defer_sched" #define DLB2_QID_DEPTH_THRESH_ARG "qid_depth_thresh" #define DLB2_COS_ARG "cos" #define DLB2_POLL_INTERVAL_ARG "poll_interval" @@ -585,7 +584,6 @@ struct dlb2_eventdev { uint16_t num_dir_ports; /* total num of dir ports requested */ bool umwait_allowed; bool global_dequeue_wait; /* Not using per dequeue wait if true */ - bool defer_sched; enum dlb2_cq_poll_modes poll_mode; int poll_interval; int sw_credit_quanta; @@ -620,7 +618,6 @@ struct dlb2_devargs { int max_num_events; int num_dir_credits_override; int dev_id; - int defer_sched; struct dlb2_qid_depth_thresholds qid_depth_thresholds; enum dlb2_cos cos_id; int poll_interval; -- 2.23.0