From: Chengwen Feng <fengchengwen@huawei.com>
To: <thomas@monjalon.net>, <ferruh.yigit@intel.com>, <ruifeng.wang@arm.com>
Cc: <dev@dpdk.org>, <bruce.richardson@intel.com>,
<vladimir.medvedkin@intel.com>, <viktorin@rehivetech.com>,
<jerinj@marvell.com>
Subject: [dpdk-dev] [PATCH v3] build: fix SVE compile error with gcc8.3
Date: Fri, 21 May 2021 09:53:22 +0800 [thread overview]
Message-ID: <1621562002-10961-1-git-send-email-fengchengwen@huawei.com> (raw)
In-Reply-To: <1621495007-28387-1-git-send-email-fengchengwen@huawei.com>
If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler are gcc8.3, it will compile error:
In file included from ../dpdk-next-net/lib/eal/common/
eal_common_options.c:38:
../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
error: arm_sve.h: No such file or directory
#include <arm_sve.h>
^~~~~~~~~~~
compilation terminated.
The root cause is that gcc8.3 supports SVE (the macro
__ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].
The solution:
a) Detect compiler whether support SVE ACLE, if support then define
CC_SVE_ACLE_SUPPORT macro.
b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
[1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
<arm_sve.h>, user should include it when writing ACLE SVE code.
Fixes: 67b68824a82d ("lpm/arm: support SVE")
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
v3:
* double-indent 'cc.check_header('arm_sve.h')' line
* move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
of compile_time_cpuflags setting)
* fix minor syntax error in commit log
v2:
* modify title start with 'build'
---
config/arm/meson.build | 5 +++++
lib/eal/arm/include/rte_vect.h | 2 +-
lib/lpm/rte_lpm.h | 2 +-
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e..08299b0 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
endif
+
+if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
+ cc.check_header('arm_sve.h'))
+ dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1)
+endif
diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 093e912..277b656 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -9,7 +9,7 @@
#include "generic/rte_vect.h"
#include "rte_debug.h"
#include "arm_neon.h"
-#ifdef __ARM_FEATURE_SVE
+#ifdef CC_SVE_ACLE_SUPPORT
#include <arm_sve.h>
#endif
diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index 28b5768..9262814 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
uint32_t defv);
#if defined(RTE_ARCH_ARM)
-#ifdef __ARM_FEATURE_SVE
+#ifdef CC_SVE_ACLE_SUPPORT
#include "rte_lpm_sve.h"
#else
#include "rte_lpm_neon.h"
--
2.8.1
next prev parent reply other threads:[~2021-05-21 1:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 7:16 [dpdk-dev] [PATCH] lpm/arm: " Chengwen Feng
2021-05-20 8:17 ` Ruifeng Wang
2021-05-20 11:45 ` fengchengwen
2021-05-20 11:40 ` [dpdk-dev] [PATCH v2] build: " Chengwen Feng
2021-05-20 13:09 ` Bruce Richardson
2021-05-21 1:57 ` fengchengwen
2021-05-21 1:53 ` Chengwen Feng [this message]
2021-05-25 6:02 ` [dpdk-dev] [PATCH v3] " Ruifeng Wang
2021-05-27 7:12 ` Fengchengwen
2021-06-12 7:07 ` fengchengwen
2021-06-21 0:56 ` fengchengwen
2021-06-23 8:05 ` Thomas Monjalon
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