From: Anoob Joseph <anoobj@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>
Cc: Ankur Dwivedi <adwivedi@marvell.com>,
Jerin Jacob <jerinj@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>,
Anoob Joseph <anoobj@marvell.com>,
Archana Muniganti <marchana@marvell.com>
Subject: [dpdk-dev] [PATCH 05/20] crypto/cnxk: add queue pair ops
Date: Wed, 2 Jun 2021 22:13:26 +0530 [thread overview]
Message-ID: <1622652221-22732-6-git-send-email-anoobj@marvell.com> (raw)
In-Reply-To: <1622652221-22732-1-git-send-email-anoobj@marvell.com>
From: Ankur Dwivedi <adwivedi@marvell.com>
Add ops for
- queue_pair_setup()
- queue_pair_release()
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 4 +-
drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 4 +-
drivers/crypto/cnxk/cnxk_cpt_ops_helper.c | 28 ++++
drivers/crypto/cnxk/cnxk_cpt_ops_helper.h | 20 +++
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 236 ++++++++++++++++++++++++++++++
drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 48 ++++++
drivers/crypto/cnxk/meson.build | 1 +
7 files changed, 337 insertions(+), 4 deletions(-)
create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
create mode 100644 drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index b0eccb3..007d449 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {
.stats_get = NULL,
.stats_reset = NULL,
- .queue_pair_setup = NULL,
- .queue_pair_release = NULL,
+ .queue_pair_setup = cnxk_cpt_queue_pair_setup,
+ .queue_pair_release = cnxk_cpt_queue_pair_release,
/* Symmetric crypto ops */
.sym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index acfb071..73ccf5b 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -29,8 +29,8 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {
.stats_get = NULL,
.stats_reset = NULL,
- .queue_pair_setup = NULL,
- .queue_pair_release = NULL,
+ .queue_pair_setup = cnxk_cpt_queue_pair_setup,
+ .queue_pair_release = cnxk_cpt_queue_pair_release,
/* Symmetric crypto ops */
.sym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
new file mode 100644
index 0000000..103195e
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include <rte_common.h>
+
+#include "hw/cpt.h"
+#include "roc_api.h"
+
+#include "cnxk_cpt_ops_helper.h"
+
+int
+cnxk_cpt_ops_helper_get_mlen(void)
+{
+ uint32_t len;
+
+ /* For MAC */
+ len = 2 * sizeof(uint64_t);
+ len += ROC_SE_MAX_MAC_LEN * sizeof(uint8_t);
+
+ len += CPT_OFFSET_CONTROL_BYTES + CPT_MAX_IV_LEN;
+ len += RTE_ALIGN_CEIL((ROC_SE_SG_LIST_HDR_SIZE +
+ (RTE_ALIGN_CEIL(ROC_SE_MAX_SG_IN_OUT_CNT, 4) >>
+ 2) * SG_ENTRY_SIZE),
+ 8);
+
+ return len;
+}
diff --git a/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
new file mode 100644
index 0000000..23c6fed
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cpt_ops_helper.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _CNXK_CPT_OPS_HELPER_H_
+#define _CNXK_CPT_OPS_HELPER_H_
+
+#define CPT_MAX_IV_LEN 16
+#define CPT_OFFSET_CONTROL_BYTES 8
+#define SG_ENTRY_SIZE sizeof(struct roc_se_sglist_comp)
+
+/*
+ * Get size of contiguous meta buffer to be allocated
+ *
+ * @return
+ * - length
+ */
+int cnxk_cpt_ops_helper_get_mlen(void);
+
+#endif /* _CNXK_CPT_OPS_HELPER_H_ */
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 7f71c29..d36258b 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -8,6 +8,7 @@
#include "roc_cpt.h"
+#include "cnxk_cpt_ops_helper.h"
#include "cnxk_cryptodev.h"
#include "cnxk_cryptodev_ops.h"
#include "cnxk_cryptodev_capabilities.h"
@@ -56,6 +57,16 @@ int
cnxk_cpt_dev_close(struct rte_cryptodev *dev)
{
struct cnxk_cpt_vf *vf = dev->data->dev_private;
+ uint16_t i;
+ int ret;
+
+ for (i = 0; i < dev->data->nb_queue_pairs; i++) {
+ ret = cnxk_cpt_queue_pair_release(dev, i);
+ if (ret < 0) {
+ plt_err("Could not release queue pair %u", i);
+ return ret;
+ }
+ }
roc_cpt_dev_clear(&vf->cpt);
@@ -76,3 +87,228 @@ cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;
info->min_mbuf_tailroom_req = CNXK_CPT_MIN_TAILROOM_REQ;
}
+
+static void
+qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
+{
+ snprintf(name, size, "cnxk_cpt_pq_mem_%u:%u", dev_id, qp_id);
+}
+
+static int
+cnxk_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
+ struct cnxk_cpt_qp *qp, uint8_t qp_id,
+ uint32_t nb_elements)
+{
+ char mempool_name[RTE_MEMPOOL_NAMESIZE];
+ struct cpt_qp_meta_info *meta_info;
+ struct rte_mempool *pool;
+ uint32_t cache_sz;
+ int mlen = 8;
+
+ if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
+ /* Get meta len */
+ mlen = cnxk_cpt_ops_helper_get_mlen();
+ }
+
+ cache_sz = RTE_MIN(RTE_MEMPOOL_CACHE_MAX_SIZE, nb_elements / 1.5);
+
+ /* Allocate mempool */
+
+ snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "cnxk_cpt_mb_%u:%u",
+ dev->data->dev_id, qp_id);
+
+ pool = rte_mempool_create(mempool_name, nb_elements, mlen, cache_sz, 0,
+ NULL, NULL, NULL, NULL, rte_socket_id(), 0);
+
+ if (pool == NULL) {
+ plt_err("Could not create mempool for metabuf");
+ return rte_errno;
+ }
+
+ meta_info = &qp->meta_info;
+
+ meta_info->pool = pool;
+ meta_info->mlen = mlen;
+
+ return 0;
+}
+
+static void
+cnxk_cpt_metabuf_mempool_destroy(struct cnxk_cpt_qp *qp)
+{
+ struct cpt_qp_meta_info *meta_info = &qp->meta_info;
+
+ rte_mempool_free(meta_info->pool);
+
+ meta_info->pool = NULL;
+ meta_info->mlen = 0;
+}
+
+static struct cnxk_cpt_qp *
+cnxk_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
+ uint32_t iq_len)
+{
+ const struct rte_memzone *pq_mem;
+ char name[RTE_MEMZONE_NAMESIZE];
+ struct cnxk_cpt_qp *qp;
+ uint32_t len;
+ uint8_t *va;
+ int ret;
+
+ /* Allocate queue pair */
+ qp = rte_zmalloc_socket("CNXK Crypto PMD Queue Pair", sizeof(*qp),
+ ROC_ALIGN, 0);
+ if (qp == NULL) {
+ plt_err("Could not allocate queue pair");
+ return NULL;
+ }
+
+ /* For pending queue */
+ len = iq_len * sizeof(struct cpt_inflight_req);
+
+ qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
+ qp_id);
+
+ pq_mem = rte_memzone_reserve_aligned(name, len, rte_socket_id(),
+ RTE_MEMZONE_SIZE_HINT_ONLY |
+ RTE_MEMZONE_256MB,
+ RTE_CACHE_LINE_SIZE);
+ if (pq_mem == NULL) {
+ plt_err("Could not allocate reserved memzone");
+ goto qp_free;
+ }
+
+ va = pq_mem->addr;
+
+ memset(va, 0, len);
+
+ ret = cnxk_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
+ if (ret) {
+ plt_err("Could not create mempool for metabuf");
+ goto pq_mem_free;
+ }
+
+ /* Initialize pending queue */
+ qp->pend_q.req_queue = pq_mem->addr;
+ qp->pend_q.enq_tail = 0;
+ qp->pend_q.deq_head = 0;
+ qp->pend_q.pending_count = 0;
+
+ return qp;
+
+pq_mem_free:
+ rte_memzone_free(pq_mem);
+qp_free:
+ rte_free(qp);
+ return NULL;
+}
+
+static int
+cnxk_cpt_qp_destroy(const struct rte_cryptodev *dev, struct cnxk_cpt_qp *qp)
+{
+ const struct rte_memzone *pq_mem;
+ char name[RTE_MEMZONE_NAMESIZE];
+ int ret;
+
+ cnxk_cpt_metabuf_mempool_destroy(qp);
+
+ qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
+ qp->lf.lf_id);
+
+ pq_mem = rte_memzone_lookup(name);
+
+ ret = rte_memzone_free(pq_mem);
+ if (ret)
+ return ret;
+
+ rte_free(qp);
+
+ return 0;
+}
+
+int
+cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
+{
+ struct cnxk_cpt_qp *qp = dev->data->queue_pairs[qp_id];
+ struct cnxk_cpt_vf *vf = dev->data->dev_private;
+ struct roc_cpt *roc_cpt = &vf->cpt;
+ struct roc_cpt_lf *lf;
+ int ret;
+
+ if (qp == NULL)
+ return -EINVAL;
+
+ lf = roc_cpt->lf[qp_id];
+ if (lf == NULL)
+ return -ENOTSUP;
+
+ roc_cpt_lf_fini(lf);
+
+ ret = cnxk_cpt_qp_destroy(dev, qp);
+ if (ret) {
+ plt_err("Could not destroy queue pair %d", qp_id);
+ return ret;
+ }
+
+ roc_cpt->lf[qp_id] = NULL;
+ dev->data->queue_pairs[qp_id] = NULL;
+
+ return 0;
+}
+
+int
+cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
+ const struct rte_cryptodev_qp_conf *conf,
+ int socket_id __rte_unused)
+{
+ struct cnxk_cpt_vf *vf = dev->data->dev_private;
+ struct roc_cpt *roc_cpt = &vf->cpt;
+ struct rte_pci_device *pci_dev;
+ struct cnxk_cpt_qp *qp;
+ int ret;
+
+ if (dev->data->queue_pairs[qp_id] != NULL)
+ cnxk_cpt_queue_pair_release(dev, qp_id);
+
+ pci_dev = RTE_DEV_TO_PCI(dev->device);
+
+ if (pci_dev->mem_resource[2].addr == NULL) {
+ plt_err("Invalid PCI mem address");
+ return -EIO;
+ }
+
+ qp = cnxk_cpt_qp_create(dev, qp_id, conf->nb_descriptors);
+ if (qp == NULL) {
+ plt_err("Could not create queue pair %d", qp_id);
+ return -ENOMEM;
+ }
+
+ qp->lf.lf_id = qp_id;
+ qp->lf.nb_desc = conf->nb_descriptors;
+
+ ret = roc_cpt_lf_init(roc_cpt, &qp->lf);
+ if (ret < 0) {
+ plt_err("Could not initialize queue pair %d", qp_id);
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ roc_cpt->lf[qp_id] = &qp->lf;
+
+ ret = roc_cpt_lmtline_init(roc_cpt, &qp->lmtline, qp_id);
+ if (ret < 0) {
+ roc_cpt->lf[qp_id] = NULL;
+ plt_err("Could not init lmtline for queue pair %d", qp_id);
+ goto exit;
+ }
+
+ qp->sess_mp = conf->mp_session;
+ qp->sess_mp_priv = conf->mp_session_private;
+ dev->data->queue_pairs[qp_id] = qp;
+
+ return 0;
+
+exit:
+ cnxk_cpt_qp_destroy(dev, qp);
+ return ret;
+}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index 604e71a..96a0f87 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -7,9 +7,51 @@
#include <rte_cryptodev.h>
+#include "roc_cpt.h"
+
#define CNXK_CPT_MIN_HEADROOM_REQ 24
#define CNXK_CPT_MIN_TAILROOM_REQ 8
+struct cpt_qp_meta_info {
+ struct rte_mempool *pool;
+ int mlen;
+};
+
+struct cpt_inflight_req {
+ union cpt_res_s res;
+ struct rte_crypto_op *cop;
+ void *mdata;
+ uint8_t op_flags;
+} __rte_aligned(16);
+
+struct pending_queue {
+ /** Pending requests count */
+ uint64_t pending_count;
+ /** Array of pending requests */
+ struct cpt_inflight_req *req_queue;
+ /** Tail of queue to be used for enqueue */
+ uint16_t enq_tail;
+ /** Head of queue to be used for dequeue */
+ uint16_t deq_head;
+ /** Timeout to track h/w being unresponsive */
+ uint64_t time_out;
+};
+
+struct cnxk_cpt_qp {
+ struct roc_cpt_lf lf;
+ /**< Crypto LF */
+ struct pending_queue pend_q;
+ /**< Pending queue */
+ struct rte_mempool *sess_mp;
+ /**< Session mempool */
+ struct rte_mempool *sess_mp_priv;
+ /**< Session private data mempool */
+ struct cpt_qp_meta_info meta_info;
+ /**< Metabuf info required to support operations on the queue pair */
+ struct roc_cpt_lmtline lmtline;
+ /**< Lmtline information */
+};
+
int cnxk_cpt_dev_config(struct rte_cryptodev *dev,
struct rte_cryptodev_config *conf);
@@ -22,4 +64,10 @@ int cnxk_cpt_dev_close(struct rte_cryptodev *dev);
void cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
struct rte_cryptodev_info *info);
+int cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
+ const struct rte_cryptodev_qp_conf *conf,
+ int socket_id __rte_unused);
+
+int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
+
#endif /* _CNXK_CRYPTODEV_OPS_H_ */
diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build
index fa6be06..b0aa3c0 100644
--- a/drivers/crypto/cnxk/meson.build
+++ b/drivers/crypto/cnxk/meson.build
@@ -13,6 +13,7 @@ sources = files(
'cn9k_cryptodev_ops.c',
'cn10k_cryptodev.c',
'cn10k_cryptodev_ops.c',
+ 'cnxk_cpt_ops_helper.c',
'cnxk_cryptodev.c',
'cnxk_cryptodev_capabilities.c',
'cnxk_cryptodev_ops.c',
--
2.7.4
next prev parent reply other threads:[~2021-06-02 16:44 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 16:43 [dpdk-dev] [PATCH 00/20] Add Marvell CNXK crypto PMDs Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 01/20] crypto/cnxk: add driver skeleton Anoob Joseph
2021-06-16 7:28 ` Akhil Goyal
2021-06-16 7:37 ` Anoob Joseph
2021-06-16 7:47 ` Akhil Goyal
2021-06-16 19:58 ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 02/20] crypto/cnxk: add probe and remove Anoob Joseph
2021-06-16 10:51 ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 03/20] crypto/cnxk: add device control ops Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 04/20] crypto/cnxk: add symmetric crypto capabilities Anoob Joseph
2021-06-16 9:47 ` Akhil Goyal
2021-06-02 16:43 ` Anoob Joseph [this message]
2021-06-16 11:05 ` [dpdk-dev] [PATCH 05/20] crypto/cnxk: add queue pair ops Akhil Goyal
2021-06-17 7:13 ` Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 06/20] crypto/cnxk: add session ops framework Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 07/20] crypto/cnxk: add enqueue burst op Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 08/20] crypto/cnxk: add dequeue " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 09/20] crypto/cnxk: add cipher operation in session Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 10/20] crypto/cnxk: add auth " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 11/20] crypto/cnxk: add aead " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 12/20] crypto/cnxk: add chained " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 13/20] crypto/cnxk: add flexi crypto cipher encrypt Anoob Joseph
2021-06-16 19:45 ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 14/20] crypto/cnxk: add flexi crypto cipher decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 15/20] crypto/cnxk: add ZUC and SNOW3G encrypt Anoob Joseph
2021-06-16 19:51 ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 16/20] crypto/cnxk: add ZUC and SNOW3G decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 17/20] crypto/cnxk: add KASUMI encrypt Anoob Joseph
2021-06-16 19:51 ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 18/20] crypto/cnxk: add KASUMI decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 19/20] crypto/cnxk: add digest support Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 20/20] test/crypto: enable cnxk crypto PMDs Anoob Joseph
2021-06-16 7:23 ` [dpdk-dev] [PATCH 00/20] Add Marvell CNXK " Akhil Goyal
2021-06-16 19:56 ` Akhil Goyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1622652221-22732-6-git-send-email-anoobj@marvell.com \
--to=anoobj@marvell.com \
--cc=adwivedi@marvell.com \
--cc=dev@dpdk.org \
--cc=gakhil@marvell.com \
--cc=jerinj@marvell.com \
--cc=ktejasree@marvell.com \
--cc=marchana@marvell.com \
--cc=thomas@monjalon.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).