From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51498A0C40; Fri, 25 Jun 2021 07:57:14 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CB68B40698; Fri, 25 Jun 2021 07:57:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 05F154068A for ; Fri, 25 Jun 2021 07:57:12 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15P5vCag018115; Thu, 24 Jun 2021 22:57:12 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=sKUujRvuImHDk8Z+rJZLIuagqCe8wZKPddZ3dzMTNrc=; b=XnRbbB2p3ac5Xsb3QLHVi+3raQuTBEok8Fxg/NfolcwiwRXfSi0oSK6Rnwh9ddz/xdih nFAxRQONpuxa4k+VhSwGYIzCwWP80yVW1x89Kat8amAg7jiO0OuUpGpX8ej5/U4TR1Iy lMSQu1/hPJYLrLYqtBoOsjP1wkE8kvbf1TfQIVRDAF+2Qc3XQevEERP1+YFVjmA+cgMX /N8D1lwwb3ZGTKcCwr4Z66a01oLm4w0sUcuTsu5b8NnA4vdIEtIXFmV+GRFbNXcQjXTC nVTtzXrbngwHsPatTgGIilQzgBJaRePod0jQpSzN4Ex6cJoEsvtb/T9se6KOKFbS0k2M XQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39d241shnv-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 Jun 2021 22:57:12 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Jun 2021 22:57:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 24 Jun 2021 22:57:03 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id 56E933F7041; Thu, 24 Jun 2021 22:57:00 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Anoob Joseph , Jerin Jacob , "Ankur Dwivedi" , Tejasree Kondoj , Date: Fri, 25 Jun 2021 11:26:11 +0530 Message-ID: <1624600591-29841-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: dH4MApMiT0b-lBcBcskTjLvIrXQm43Ua X-Proofpoint-ORIG-GUID: dH4MApMiT0b-lBcBcskTjLvIrXQm43Ua X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-25_02:2021-06-24, 2021-06-25 signatures=0 Subject: [dpdk-dev] [PATCH v2 00/20] Add Marvell CNXK crypto PMDs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add cnxk crypto PMDs supporting Marvell CN106XX SoC, based on 'common/cnxk'. This series utilizes 'common/cnxk' to register cn9k & cn10k crypto PMDs and add symmetric cryptographic features for the same. Depends-on: series-17482 ("Add CPT in Marvell CNXK common driver") Changes in v2: - Added documentation & updated release notes - Reworked DP logs as suggested by Akhil - Rearranged capability additions & feature flag updates as suggested by Akhil - Rebased on v2 of dependant series Ankur Dwivedi (5): crypto/cnxk: add driver skeleton crypto/cnxk: add probe and remove crypto/cnxk: add device control ops crypto/cnxk: add queue pair ops crypto/cnxk: add symmetric crypto capabilities Anoob Joseph (5): crypto/cnxk: add session ops framework crypto/cnxk: add enqueue burst op crypto/cnxk: add dequeue burst op crypto/cnxk: add cipher operation in session crypto/cnxk: add auth operation in session Archana Muniganti (5): crypto/cnxk: add aead operation in session crypto/cnxk: add chained operation in session crypto/cnxk: add flexi crypto cipher encrypt crypto/cnxk: add flexi crypto cipher decrypt crypto/cnxk: add ZUC and SNOW3G encrypt Tejasree Kondoj (5): crypto/cnxk: add ZUC and SNOW3G decrypt crypto/cnxk: add KASUMI encrypt crypto/cnxk: add KASUMI decrypt crypto/cnxk: add digest support test/crypto: enable cnxk crypto PMDs MAINTAINERS | 9 + app/test/meson.build | 2 + app/test/test_cryptodev.c | 14 + app/test/test_cryptodev.h | 2 + doc/guides/cryptodevs/cnxk.rst | 192 ++ doc/guides/cryptodevs/features/cn10k.ini | 66 + doc/guides/cryptodevs/features/cn9k.ini | 66 + doc/guides/rel_notes/release_21_08.rst | 7 + drivers/crypto/cnxk/cn10k_cryptodev.c | 152 ++ drivers/crypto/cnxk/cn10k_cryptodev.h | 13 + drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 357 +++ drivers/crypto/cnxk/cn10k_cryptodev_ops.h | 15 + drivers/crypto/cnxk/cn9k_cryptodev.c | 150 ++ drivers/crypto/cnxk/cn9k_cryptodev.h | 13 + drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 319 +++ drivers/crypto/cnxk/cn9k_cryptodev_ops.h | 14 + drivers/crypto/cnxk/cnxk_cryptodev.c | 33 + drivers/crypto/cnxk/cnxk_cryptodev.h | 26 + drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 699 ++++++ drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h | 25 + drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 551 +++++ drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 108 + drivers/crypto/cnxk/cnxk_se.h | 2675 +++++++++++++++++++++ drivers/crypto/cnxk/meson.build | 21 + drivers/crypto/cnxk/version.map | 3 + drivers/crypto/meson.build | 1 + 26 files changed, 5533 insertions(+) create mode 100644 doc/guides/cryptodevs/cnxk.rst create mode 100644 doc/guides/cryptodevs/features/cn10k.ini create mode 100644 doc/guides/cryptodevs/features/cn9k.ini create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.c create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev.h create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.h create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.c create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev.h create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.h create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.h create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_capabilities.h create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.h create mode 100644 drivers/crypto/cnxk/cnxk_se.h create mode 100644 drivers/crypto/cnxk/meson.build create mode 100644 drivers/crypto/cnxk/version.map -- 2.7.4