From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4DC36A0C56; Wed, 1 Sep 2021 19:11:21 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EBC8641123; Wed, 1 Sep 2021 19:11:15 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5A9004111B for ; Wed, 1 Sep 2021 19:11:14 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 181Ege2t016701 for ; Wed, 1 Sep 2021 10:11:13 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=kSKLGZu7SPMMzLx5XzFE4d20KWWQprAI8YaZlE4oDJQ=; b=dZKW3Kuigmq8Cev5sD6s57lDGTeSwxWdizZ5crkNZhfGXKUfnlOdant7tTFtrlLL+Emo 9ZbSDQKgw00VglbyI3zm3iE78Bg4PKnvhBaTB3pR2nWytsDLsIQSXL3j7JZhXSCXbMWT D1Ehc6CUJyu5nLkDw0+gJlynf5/PUziwAu4y8x7lYufLdVohR6vawWIN4X2yvmzMQiIy Bcwf7w6tQfzP1eG9X50GnxMUOmIYefywAx5+pqPTRub/+sxuuVLOWmXm5kmP7T9SdCrZ 0T/nATMpwopaKW2r61dTcJ2YcD84iNeWKKLOWJw+4MNF1MfCj6Fm9SxSEplDk8wRHhqR fQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3atbfh0n09-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 01 Sep 2021 10:11:13 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 1 Sep 2021 10:11:11 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 1 Sep 2021 10:11:11 -0700 Received: from cavium.marvell.com (cavium.marvell.com [10.28.34.244]) by maili.marvell.com (Postfix) with ESMTP id ED6973F7071; Wed, 1 Sep 2021 10:11:09 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: Date: Wed, 1 Sep 2021 13:10:32 -0400 Message-ID: <1630516236-10526-4-git-send-email-skoteshwar@marvell.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1630516236-10526-1-git-send-email-skoteshwar@marvell.com> References: <1630516236-10526-1-git-send-email-skoteshwar@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-ORIG-GUID: ovkYPrf6EsqJ2-hwhLeo-WK_2FmOp0Ia X-Proofpoint-GUID: ovkYPrf6EsqJ2-hwhLeo-WK_2FmOp0Ia X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-01_05,2021-09-01_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 4/8] common/cnxk: handle packet mode shaper limits X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Satha Rao Add new macros to reflect HW shaper PPS limits. New API to validate input rates for packet mode. Increase adjust value to support lesser PPS (<61). Signed-off-by: Satha Rao --- drivers/common/cnxk/hw/nix.h | 3 + drivers/common/cnxk/roc_nix_priv.h | 1 + drivers/common/cnxk/roc_nix_tm_ops.c | 76 ++++++++++++++++++-------- drivers/common/cnxk/roc_nix_tm_utils.c | 4 +- 4 files changed, 60 insertions(+), 24 deletions(-) diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h index d2054385c2..6a0eb019ac 100644 --- a/drivers/common/cnxk/hw/nix.h +++ b/drivers/common/cnxk/hw/nix.h @@ -2133,6 +2133,9 @@ struct nix_lso_format { NIX_TM_SHAPER_RATE(NIX_TM_MAX_RATE_EXPONENT, NIX_TM_MAX_RATE_MANTISSA, \ 0) +#define NIX_TM_MIN_SHAPER_PPS_RATE 25 +#define NIX_TM_MAX_SHAPER_PPS_RATE (100ul << 20) + /* NIX burst limits */ #define NIX_TM_MAX_BURST_EXPONENT 0xful #define NIX_TM_MAX_BURST_MANTISSA 0x7ffful diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h index cc8e822427..3412bf25e5 100644 --- a/drivers/common/cnxk/roc_nix_priv.h +++ b/drivers/common/cnxk/roc_nix_priv.h @@ -90,6 +90,7 @@ struct nix_tm_shaper_profile { struct nix_tm_tb commit; struct nix_tm_tb peak; int32_t pkt_len_adj; + int32_t pkt_mode_adj; bool pkt_mode; uint32_t id; void (*free_fn)(void *profile); diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c index a313023be2..69d58376ec 100644 --- a/drivers/common/cnxk/roc_nix_tm_ops.c +++ b/drivers/common/cnxk/roc_nix_tm_ops.c @@ -77,6 +77,51 @@ roc_nix_tm_free_resources(struct roc_nix *roc_nix, bool hw_only) return nix_tm_free_resources(roc_nix, BIT(ROC_NIX_TM_USER), hw_only); } +static int +nix_tm_adjust_shaper_pps_rate(struct nix_tm_shaper_profile *profile) +{ + uint64_t min_rate = profile->commit.rate; + + if (!profile->pkt_mode) + return 0; + + profile->pkt_mode_adj = 1; + + if (profile->commit.rate && + (profile->commit.rate < NIX_TM_MIN_SHAPER_PPS_RATE || + profile->commit.rate > NIX_TM_MAX_SHAPER_PPS_RATE)) + return NIX_ERR_TM_INVALID_COMMIT_RATE; + + if (profile->peak.rate && + (profile->peak.rate < NIX_TM_MIN_SHAPER_PPS_RATE || + profile->peak.rate > NIX_TM_MAX_SHAPER_PPS_RATE)) + return NIX_ERR_TM_INVALID_PEAK_RATE; + + if (profile->peak.rate && min_rate > profile->peak.rate) + min_rate = profile->peak.rate; + + /* Each packet accomulate single count, whereas HW + * considers each unit as Byte, so we need convert + * user pps to bps + */ + profile->commit.rate = profile->commit.rate * 8; + profile->peak.rate = profile->peak.rate * 8; + min_rate = min_rate * 8; + + if (min_rate && (min_rate < NIX_TM_MIN_SHAPER_RATE)) { + int adjust = NIX_TM_MIN_SHAPER_RATE / min_rate; + + if (adjust > NIX_TM_LENGTH_ADJUST_MAX) + return NIX_ERR_TM_SHAPER_PKT_LEN_ADJUST; + + profile->pkt_mode_adj += adjust; + profile->commit.rate += (adjust * profile->commit.rate); + profile->peak.rate += (adjust * profile->peak.rate); + } + + return 0; +} + static int nix_tm_shaper_profile_add(struct roc_nix *roc_nix, struct nix_tm_shaper_profile *profile, int skip_ins) @@ -86,8 +131,13 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix, uint64_t min_burst, max_burst; uint64_t peak_rate, peak_sz; uint32_t id; + int rc; id = profile->id; + rc = nix_tm_adjust_shaper_pps_rate(profile); + if (rc) + return rc; + commit_rate = profile->commit.rate; commit_sz = profile->commit.size; peak_rate = profile->peak.rate; @@ -157,17 +207,8 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix, profile->ref_cnt = 0; profile->id = roc_profile->id; - if (roc_profile->pkt_mode) { - /* Each packet accomulate single count, whereas HW - * considers each unit as Byte, so we need convert - * user pps to bps - */ - profile->commit.rate = roc_profile->commit_rate * 8; - profile->peak.rate = roc_profile->peak_rate * 8; - } else { - profile->commit.rate = roc_profile->commit_rate; - profile->peak.rate = roc_profile->peak_rate; - } + profile->commit.rate = roc_profile->commit_rate; + profile->peak.rate = roc_profile->peak_rate; profile->commit.size = roc_profile->commit_sz; profile->peak.size = roc_profile->peak_sz; profile->pkt_len_adj = roc_profile->pkt_len_adj; @@ -185,17 +226,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix, profile = (struct nix_tm_shaper_profile *)roc_profile->reserved; - if (roc_profile->pkt_mode) { - /* Each packet accomulate single count, whereas HW - * considers each unit as Byte, so we need convert - * user pps to bps - */ - profile->commit.rate = roc_profile->commit_rate * 8; - profile->peak.rate = roc_profile->peak_rate * 8; - } else { - profile->commit.rate = roc_profile->commit_rate; - profile->peak.rate = roc_profile->peak_rate; - } + profile->commit.rate = roc_profile->commit_rate; + profile->peak.rate = roc_profile->peak_rate; profile->commit.size = roc_profile->commit_sz; profile->peak.size = roc_profile->peak_sz; diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index 00604b10d3..83306248e8 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -628,8 +628,8 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node, memset(&pir, 0, sizeof(pir)); nix_tm_shaper_conf_get(profile, &cir, &pir); - if (node->pkt_mode) - adjust = 1; + if (profile && node->pkt_mode) + adjust = profile->pkt_mode_adj; else if (profile) adjust = profile->pkt_len_adj; -- 2.25.1