From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 15456A034F; Wed, 10 Nov 2021 05:32:36 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8A1904014D; Wed, 10 Nov 2021 05:32:35 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4FD5540142 for ; Wed, 10 Nov 2021 05:32:33 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1AA3Yi5c019396 for ; Tue, 9 Nov 2021 20:32:30 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=S1gcK7cYxdN286VLSmiaHHUMjwUxJM4YxTXa58cfuNU=; b=UamXWLexT5uIrW3U9DYATJHhr835EEvuxKrQaAK+HKSfeANchYAaJtqqv7qQKcZj9DUk 5cfctUsJCE/0PKpdmP1n3c2VRyS1SZtt7WWrdjoaLScyy767t5YnWW1cy0au31Tcq45X IbSeqvDZysEhWaZhkDUIABWZHs81F0UTripcX3oQigjuj5Vm22VRKyUSxluC6PiPxUh/ 9CBLn33nyCvKUwqvHS6VPtCnPJzPqc7LrYVTflsunWCRFiw4x5UE7UcehvDYkXQLpiyv DuY3zj0fa/RGaQQOcrRmlSLD5GVkX++1+uLEbx7zk5dixnwCIT8xPLmJ3A4pN6Klf9N2 eA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3c7xp41xyc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Nov 2021 20:32:30 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 9 Nov 2021 20:32:29 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 9 Nov 2021 20:32:29 -0800 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id B8FD83F7071; Tue, 9 Nov 2021 20:32:27 -0800 (PST) From: Anoob Joseph To: Jerin Jacob CC: Anoob Joseph , , Date: Wed, 10 Nov 2021 10:02:03 +0530 Message-ID: <1636518723-475-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1636517315-414-1-git-send-email-anoobj@marvell.com> References: <1636517315-414-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: sWneE0GkIZEIFZA7qbfeUahDrstGgtcH X-Proofpoint-ORIG-GUID: sWneE0GkIZEIFZA7qbfeUahDrstGgtcH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-10_01,2021-11-08_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v2] common/cnxk: fix memory leak X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The memory allocated for temporarily keeping DPTR need to be freed after operation. Also, dptr need to be aligned to 8B. Fixes: 71213a8b773c ("common/cnxk: support CPT CTX write through microcode op") Cc: schalla@marvell.com Signed-off-by: Anoob Joseph Reviewed-by: Nithin Kumar Dabilpuram Reviewed-by: Tejasree Kondoj --- v2: - Fixed commit hash in "Fixes" line drivers/common/cnxk/roc_cpt.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index 5c8c328..51cd612 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -930,12 +930,14 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, plt_err("Couldn't allocate memory for result address"); return -ENOMEM; } - dptr = plt_zmalloc(sa_len, 0); - if (!dptr) { + + dptr = plt_zmalloc(sa_len, 8); + if (dptr == NULL) { plt_err("Couldn't allocate memory for SA dptr"); plt_free(res); return -ENOMEM; } + for (i = 0; i < (sa_len / 8); i++) dptr[i] = plt_cpu_to_be_64(((uint64_t *)sa_dptr)[i]); @@ -962,6 +964,7 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, plt_delay_ms(1); plt_free(res); + plt_free(dptr); return 0; } -- 2.7.4