From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D3DD1A0503; Wed, 18 May 2022 15:02:06 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B9C1242B7B; Wed, 18 May 2022 15:01:17 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 4E9E04021E for ; Wed, 18 May 2022 15:01:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652878876; x=1684414876; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=rB3n49Qm4f8/2gsmZ18d+vTRRsZqXrOrCAGzJmgp2Ww=; b=hmgkLMp2ucfitlyfYhwAvxBZq7CeitlDzTcx95rrSzXKNIEJQZZBMBI/ r4GZxIK4wTFIGqcCmno6IKjjyloobvBtFDk4Y0lu487WVeywwu0eitDwL uclDxf0pbrSyOHqcx4U0zDgd5yQPxWe4nfDTjg6JuZ4V0KGhVuW+vwZU8 Qs1NxYJhLyH4cy6SZ51MC5LPo6eq5kLnZkwWvXLxzHI/JQCBBxtW/QPg4 XBww9FZ7QuyIbqkHPNSOEHSHkihrMZggdkRJRtyuKrkO4sUCCpGKbby0H WlW3ZgrdSVxI4GGO8fYQb0hvqjQYWn0/WRqs26KPOWPC1E3Ge8OtTKIzV A==; X-IronPort-AV: E=McAfee;i="6400,9594,10350"; a="271353800" X-IronPort-AV: E=Sophos;i="5.91,234,1647327600"; d="scan'208";a="271353800" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2022 06:00:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,234,1647327600"; d="scan'208";a="556312459" Received: from dpdk-dipei.sh.intel.com ([10.67.110.238]) by orsmga002.jf.intel.com with ESMTP; 18 May 2022 06:00:48 -0700 From: Andy Pei To: dev@dpdk.org Cc: chenbo.xia@intel.com, maxime.coquelin@redhat.com, gang.cao@intel.com, changpeng.liu@intel.com, rosen.xu@intel.com, qimaix.xiao@intel.com Subject: [PATCH v8 11/13] vdpa/ifc: add log for config space of virtio blk Date: Wed, 18 May 2022 20:13:53 +0800 Message-Id: <1652876035-70513-12-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1652876035-70513-1-git-send-email-andy.pei@intel.com> References: <1643093258-47258-2-git-send-email-andy.pei@intel.com> <1652876035-70513-1-git-send-email-andy.pei@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add some log of virtio blk device config space information at VDPA launch before qemu connects. Signed-off-by: Andy Pei --- drivers/vdpa/ifc/ifcvf_vdpa.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c index 0acfa8c..376a1af 100644 --- a/drivers/vdpa/ifc/ifcvf_vdpa.c +++ b/drivers/vdpa/ifc/ifcvf_vdpa.c @@ -1382,6 +1382,9 @@ struct rte_vdpa_dev_info dev_info[] = { struct rte_kvargs *kvlist = NULL; int ret = 0; int16_t device_id; + uint64_t capacity = 0; + uint8_t *byte; + uint32_t i; if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; @@ -1448,6 +1451,37 @@ struct rte_vdpa_dev_info dev_info[] = { internal->features = features & ~(1ULL << VIRTIO_F_IOMMU_PLATFORM); internal->features |= dev_info[IFCVF_BLK].features; + + /* cannot read 64-bit register in one attempt, + * so read byte by byte. + */ + for (i = 0; i < sizeof(internal->hw.blk_cfg->capacity); i++) { + byte = (uint8_t *)&internal->hw.blk_cfg->capacity + i; + capacity |= (uint64_t)*byte << (i * 8); + } + /* The capacity is number of sectors in 512-byte. + * So right shift 1 bit we get in K, + * another right shift 10 bits we get in M, + * right shift 10 more bits, we get in G. + * To show capacity in G, we right shift 21 bits in total. + */ + DRV_LOG(DEBUG, "capacity : %"PRIu64"G", capacity >> 21); + + DRV_LOG(DEBUG, "size_max : 0x%08x", + internal->hw.blk_cfg->size_max); + DRV_LOG(DEBUG, "seg_max : 0x%08x", + internal->hw.blk_cfg->seg_max); + DRV_LOG(DEBUG, "blk_size : 0x%08x", + internal->hw.blk_cfg->blk_size); + DRV_LOG(DEBUG, "geometry"); + DRV_LOG(DEBUG, " cylinders: %u", + internal->hw.blk_cfg->geometry.cylinders); + DRV_LOG(DEBUG, " heads : %u", + internal->hw.blk_cfg->geometry.heads); + DRV_LOG(DEBUG, " sectors : %u", + internal->hw.blk_cfg->geometry.sectors); + DRV_LOG(DEBUG, "num_queues: 0x%08x", + internal->hw.blk_cfg->num_queues); } list->internal = internal; -- 1.8.3.1