From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F13E428D0; Thu, 6 Apr 2023 02:45:23 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EE32C42BAC; Thu, 6 Apr 2023 02:45:22 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id F16B340F18 for ; Thu, 6 Apr 2023 02:45:21 +0200 (CEST) Received: by linux.microsoft.com (Postfix, from userid 1086) id 44168210DEFB; Wed, 5 Apr 2023 17:45:21 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 44168210DEFB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1680741921; bh=cEj+2X1bc/tb0SfKlg2j1xXB7Wh9mICLzC8juNL2AUc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pQJsz5aqCpkms8alwjRudwTO+naPPlJv9FYfnH5H+FDVGm9Jj9ZYadlwDQGb0mYm9 h7ece1HQOAHK/1mONx8HUeGDBMjDy/TXTTsAk/dDe9Y0+3ruFo+tAk17jGOGLWxtqN chdjJFZLSB68kwM9LJSxBR7h1FqxoAgoLPt/E3+Y= From: Tyler Retzlaff To: dev@dpdk.org Cc: bruce.richardson@intel.com, david.marchand@redhat.com, thomas@monjalon.net, mb@smartsharesystems.com, konstantin.ananyev@huawei.com, Tyler Retzlaff Subject: [PATCH v3 03/11] eal: use barrier intrinsics when compiling with msvc Date: Wed, 5 Apr 2023 17:45:11 -0700 Message-Id: <1680741919-22102-4-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1680741919-22102-1-git-send-email-roretzla@linux.microsoft.com> References: <1680558751-17931-1-git-send-email-roretzla@linux.microsoft.com> <1680741919-22102-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Inline assembly is not supported for msvc x64 instead expand rte_compiler_barrier as _ReadWriteBarrier and for rte_smp_mb _m_mfence intrinsics. Signed-off-by: Tyler Retzlaff --- lib/eal/include/generic/rte_atomic.h | 4 ++++ lib/eal/x86/include/rte_atomic.h | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h index 234b268..e973184 100644 --- a/lib/eal/include/generic/rte_atomic.h +++ b/lib/eal/include/generic/rte_atomic.h @@ -116,9 +116,13 @@ * Guarantees that operation reordering does not occur at compile time * for operations directly before and after the barrier. */ +#ifndef RTE_TOOLCHAIN_MSVC #define rte_compiler_barrier() do { \ asm volatile ("" : : : "memory"); \ } while(0) +#else +#define rte_compiler_barrier() _ReadWriteBarrier() +#endif /** * Synchronization fence between threads based on the specified memory order. diff --git a/lib/eal/x86/include/rte_atomic.h b/lib/eal/x86/include/rte_atomic.h index f2ee1a9..ca733c5 100644 --- a/lib/eal/x86/include/rte_atomic.h +++ b/lib/eal/x86/include/rte_atomic.h @@ -28,7 +28,6 @@ #define rte_rmb() _mm_lfence() #define rte_smp_wmb() rte_compiler_barrier() - #define rte_smp_rmb() rte_compiler_barrier() /* @@ -66,11 +65,15 @@ static __rte_always_inline void rte_smp_mb(void) { +#ifndef RTE_TOOLCHAIN_MSVC #ifdef RTE_ARCH_I686 asm volatile("lock addl $0, -128(%%esp); " ::: "memory"); #else asm volatile("lock addl $0, -128(%%rsp); " ::: "memory"); #endif +#else + _mm_mfence(); +#endif } #define rte_io_mb() rte_mb() -- 1.8.3.1