From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5FDF74296F; Mon, 17 Apr 2023 18:10:57 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5B5E542D0E; Mon, 17 Apr 2023 18:10:49 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id B55C942BB1 for ; Mon, 17 Apr 2023 18:10:44 +0200 (CEST) Received: by linux.microsoft.com (Postfix, from userid 1086) id EE59021C1E42; Mon, 17 Apr 2023 09:10:43 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com EE59021C1E42 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1681747843; bh=7MuyWLqPrgllACGrADXQqvjc3As35FjdHAPbIRz7i3w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yuo3zL0/A7Ue0+ZyzZXV1x5JituGnDwArqT82axs3fpNBtNY7nQJ0ip0JV6sszG4t Jl7pZe4ue2nzqOtC7c/8mas+MSAxBCZ8FtWrm09Xk0f5xszVHNi/8BowV66uJHIVhj 9+Z5MpiqLBpiRxu4uFk9MfL7U1j+VOA+M6pGUnd4= From: Tyler Retzlaff To: dev@dpdk.org Cc: bruce.richardson@intel.com, david.marchand@redhat.com, thomas@monjalon.net, mb@smartsharesystems.com, konstantin.ananyev@huawei.com, Tyler Retzlaff Subject: [PATCH v7 03/14] eal: use barrier intrinsics Date: Mon, 17 Apr 2023 09:10:27 -0700 Message-Id: <1681747838-12778-4-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1681747838-12778-1-git-send-email-roretzla@linux.microsoft.com> References: <1680558751-17931-1-git-send-email-roretzla@linux.microsoft.com> <1681747838-12778-1-git-send-email-roretzla@linux.microsoft.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Inline assembly is not supported for MSVC x64 instead expand rte_compiler_barrier as _ReadWriteBarrier and for rte_smp_mb _m_mfence intrinsics. Signed-off-by: Tyler Retzlaff Acked-by: Bruce Richardson Acked-by: Konstantin Ananyev Acked-by: Morten Brørup --- lib/eal/include/generic/rte_atomic.h | 4 ++++ lib/eal/x86/include/rte_atomic.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h index 234b268..e973184 100644 --- a/lib/eal/include/generic/rte_atomic.h +++ b/lib/eal/include/generic/rte_atomic.h @@ -116,9 +116,13 @@ * Guarantees that operation reordering does not occur at compile time * for operations directly before and after the barrier. */ +#ifndef RTE_TOOLCHAIN_MSVC #define rte_compiler_barrier() do { \ asm volatile ("" : : : "memory"); \ } while(0) +#else +#define rte_compiler_barrier() _ReadWriteBarrier() +#endif /** * Synchronization fence between threads based on the specified memory order. diff --git a/lib/eal/x86/include/rte_atomic.h b/lib/eal/x86/include/rte_atomic.h index f2ee1a9..569d3ab 100644 --- a/lib/eal/x86/include/rte_atomic.h +++ b/lib/eal/x86/include/rte_atomic.h @@ -66,11 +66,15 @@ static __rte_always_inline void rte_smp_mb(void) { +#ifndef RTE_TOOLCHAIN_MSVC #ifdef RTE_ARCH_I686 asm volatile("lock addl $0, -128(%%esp); " ::: "memory"); #else asm volatile("lock addl $0, -128(%%rsp); " ::: "memory"); #endif +#else + _mm_mfence(); +#endif } #define rte_io_mb() rte_mb() -- 1.8.3.1