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From: Tyler Retzlaff <roretzla@linux.microsoft.com>
To: dev@dpdk.org
Cc: Bruce Richardson <bruce.richardson@intel.com>,
Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,
Ciara Power <ciara.power@intel.com>, thomas@monjalon.net,
david.marchand@redhat.com, mb@smartsharesystems.com,
Tyler Retzlaff <roretzla@linux.microsoft.com>
Subject: [PATCH v11 04/16] eal: use cpuid and cpuidex intrinsics
Date: Fri, 11 Aug 2023 12:20:46 -0700
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Inline assembly is not supported for MSVC x64 instead use __cpuid
and __cpuidex intrinsics.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
lib/eal/x86/rte_cpuflags.c | 6 +++++-
lib/eal/x86/rte_cpuid.h | 7 +++++++
lib/eal/x86/rte_cycles.c | 36 ++++++++++++++++++++++++++++++++++++
lib/eal/x86/rte_hypervisor.c | 4 ++++
4 files changed, 52 insertions(+), 1 deletion(-)
diff --git a/lib/eal/x86/rte_cpuflags.c b/lib/eal/x86/rte_cpuflags.c
index d6b5182..8a30f79 100644
--- a/lib/eal/x86/rte_cpuflags.c
+++ b/lib/eal/x86/rte_cpuflags.c
@@ -165,9 +165,13 @@ struct feature_entry {
if (maxleaf < feat->leaf)
return 0;
- __cpuid_count(feat->leaf, feat->subleaf,
+#ifdef RTE_TOOLCHAIN_MSVC
+ __cpuidex(regs, feat->leaf, feat->subleaf);
+#else
+ __cpuid_count(feat->leaf, feat->subleaf,
regs[RTE_REG_EAX], regs[RTE_REG_EBX],
regs[RTE_REG_ECX], regs[RTE_REG_EDX]);
+#endif
/* check if the feature is enabled */
return (regs[feat->reg] >> feat->bit) & 1;
diff --git a/lib/eal/x86/rte_cpuid.h b/lib/eal/x86/rte_cpuid.h
index b773ad9..c6abaad 100644
--- a/lib/eal/x86/rte_cpuid.h
+++ b/lib/eal/x86/rte_cpuid.h
@@ -5,7 +5,9 @@
#ifndef RTE_CPUID_H
#define RTE_CPUID_H
+#ifndef RTE_TOOLCHAIN_MSVC
#include <cpuid.h>
+#endif
enum cpu_register_t {
RTE_REG_EAX = 0,
@@ -16,4 +18,9 @@ enum cpu_register_t {
typedef uint32_t cpuid_registers_t[4];
+#ifdef RTE_TOOLCHAIN_MSVC
+int
+__get_cpuid_max(unsigned int e, unsigned int *s);
+#endif
+
#endif /* RTE_CPUID_H */
diff --git a/lib/eal/x86/rte_cycles.c b/lib/eal/x86/rte_cycles.c
index 0e695ca..69ed59b 100644
--- a/lib/eal/x86/rte_cycles.c
+++ b/lib/eal/x86/rte_cycles.c
@@ -4,7 +4,11 @@
#include <fcntl.h>
#include <unistd.h>
+#ifdef RTE_TOOLCHAIN_MSVC
+#define bit_AVX (1 << 28)
+#else
#include <cpuid.h>
+#endif
#include "eal_private.h"
@@ -82,9 +86,25 @@
return 0;
}
+#ifdef RTE_TOOLCHAIN_MSVC
+int
+__get_cpuid_max(unsigned int e, unsigned int *s)
+{
+ uint32_t cpuinfo[4];
+
+ __cpuid(cpuinfo, e);
+ if (s)
+ *s = cpuinfo[1];
+ return cpuinfo[0];
+}
+#endif
+
uint64_t
get_tsc_freq_arch(void)
{
+#ifdef RTE_TOOLCHAIN_MSVC
+ int cpuinfo[4];
+#endif
uint64_t tsc_hz = 0;
uint32_t a, b, c, d, maxleaf;
uint8_t mult, model;
@@ -97,14 +117,30 @@
maxleaf = __get_cpuid_max(0, NULL);
if (maxleaf >= 0x15) {
+#ifdef RTE_TOOLCHAIN_MSVC
+ __cpuid(cpuinfo, 0x15);
+ a = cpuinfo[0];
+ b = cpuinfo[1];
+ c = cpuinfo[2];
+ d = cpuinfo[3];
+#else
__cpuid(0x15, a, b, c, d);
+#endif
/* EBX : TSC/Crystal ratio, ECX : Crystal Hz */
if (b && c)
return c * (b / a);
}
+#ifdef RTE_TOOLCHAIN_MSVC
+ __cpuid(cpuinfo, 0x1);
+ a = cpuinfo[0];
+ b = cpuinfo[1];
+ c = cpuinfo[2];
+ d = cpuinfo[3];
+#else
__cpuid(0x1, a, b, c, d);
+#endif
model = rte_cpu_get_model(a);
if (check_model_wsm_nhm(model))
diff --git a/lib/eal/x86/rte_hypervisor.c b/lib/eal/x86/rte_hypervisor.c
index c38cfc0..04fe767 100644
--- a/lib/eal/x86/rte_hypervisor.c
+++ b/lib/eal/x86/rte_hypervisor.c
@@ -23,9 +23,13 @@ enum rte_hypervisor
if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_HYPERVISOR))
return RTE_HYPERVISOR_NONE;
+#ifdef RTE_TOOLCHAIN_MSVC
+ __cpuid(regs, HYPERVISOR_INFO_LEAF);
+#else
__cpuid(HYPERVISOR_INFO_LEAF,
regs[RTE_REG_EAX], regs[RTE_REG_EBX],
regs[RTE_REG_ECX], regs[RTE_REG_EDX]);
+#endif
for (reg = 1; reg < 4; reg++)
memcpy(name + (reg - 1) * 4, ®s[reg], 4);
name[12] = '\0';
--
1.8.3.1