From: Thomas Monjalon <thomas@monjalon.net>
To: Maxime Coquelin <maxime.coquelin@redhat.com>,
bruce.richardson@intel.com, jerinj@marvell.com,
andrew.rybchenko@oktetlabs.ru, hemant.agrawal@nxp.com,
nipun.gupta@nxp.com, g.singh@nxp.com, radhac@marvell.com,
vburru@marvell.com
Cc: Cheng Jiang <Cheng1.jiang@intel.com>,
dev@dpdk.org, chenbo.xia@intel.com, dev@dpdk.org,
jiayu.hu@intel.com, yvonnex.yang@intel.com, yinan.wang@intel.com,
alexr@nvidia.com, shahafs@nvidia.com
Subject: Re: [dpdk-dev] [PATCH] examples/vhost: fix ioat ring space in callbacks
Date: Wed, 07 Apr 2021 10:43:36 +0200 [thread overview]
Message-ID: <1700633.VhrhA6iQC3@thomas> (raw)
In-Reply-To: <2267082.chWHW8dCnR@thomas>
+Cc more people to start a discussion about a potential DMA API.
If you think it is interesting, we can start a fresh discussion thread.
07/04/2021 10:26, Thomas Monjalon:
> 07/04/2021 09:47, Maxime Coquelin:
> >
> > On 3/17/21 6:40 AM, Cheng Jiang wrote:
> > > We use ioat ring space for determining if ioat callbacks can enqueue a
> > > packet to ioat device. But there is one slot can't be used in ioat
> > > ring due to the ioat driver design, so we need to reduce one slot in
> > > ioat ring to prevent ring size mismatch in ioat callbacks.
[...]
> > > --- a/examples/vhost/ioat.c
> > > +++ b/examples/vhost/ioat.c
> > > @@ -113,7 +113,7 @@ open_ioat(const char *value)
> > > goto out;
> > > }
> > > rte_rawdev_start(dev_id);
> > > - cb_tracker[dev_id].ioat_space = IOAT_RING_SIZE;
> > > + cb_tracker[dev_id].ioat_space = IOAT_RING_SIZE - 1;
> >
> > That really comforts me in thinking we need a generic abstraction for
> > DMA devices. How is the application developer supposed to know that
> > the DMA driver has such weird limitations?
>
> Having a generic DMA API may be interesting.
> Do you know any other HW candidate for such an API?
> Do you think rte_memcpy can be used as a SW driver?
next prev parent reply other threads:[~2021-04-07 8:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-17 5:40 Cheng Jiang
2021-03-17 6:58 ` Hu, Jiayu
2021-04-07 7:47 ` Maxime Coquelin
2021-04-07 7:54 ` Hu, Jiayu
2021-04-13 8:50 ` Maxime Coquelin
2021-04-13 9:55 ` Jiang, Cheng1
2021-04-07 8:26 ` Thomas Monjalon
2021-04-07 8:43 ` Thomas Monjalon [this message]
2021-04-18 15:10 ` Liang Ma
2021-04-07 8:48 ` Maxime Coquelin
2021-04-28 2:09 ` Xia, Chenbo
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