[PATCH 00/14] use C11 alignas and normalize type alignment

[PATCH 00/14] use C11 alignas and normalize type alignment

[Tyler Retzlaff]

This series normalizes type and object alignment by doing the following.

Fill in expansion of existing __rte_aligned, __rte_cache_aligned and
__rte_cache_min_aligned macros for MSVC.

Where __rte_aligned, __rte_cache_aligned and __rte_cache_min_aligned
are used to align *types* move them to a location on the type definition
that both GCC and MSVC accept for both C and C++ compilation.

Where __rte_aligned, __rte_cache_aligned or __rte_cache_min_aligned
are used to align *objects* replace their usage with standard C11 alignas.

I've elected to put the series forward without introducing a new macro
similar to __rte_alignas. Assuming the convention of a lower case macro
starting with __rte is intended to be internal only and providing it
would only permit unintended use by applications.

Tyler Retzlaff (14):
  eal: use C11 alignas
  stack: use C11 alignas
  sched: use C11 alignas
  ring: remove unnecessary explicit alignment
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: remove unnecessary explicit alignment
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  eal: redefine macro to be integer literal for MSVC

 lib/acl/acl_run.h                    |  4 ++--
 lib/distributor/rte_distributor.c    |  2 +-
 lib/dmadev/rte_dmadev_core.h         |  4 ++--
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         |  2 +-
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  9 ++++++---
 lib/ethdev/rte_ethdev.h              |  4 ++--
 lib/eventdev/rte_eventdev.h          |  8 ++++----
 lib/hash/rte_thash.h                 |  8 ++++----
 lib/mbuf/rte_mbuf_core.h             |  2 +-
 lib/net/net_crc_avx512.c             | 12 ++++++------
 lib/net/net_crc_neon.c               | 10 +++++-----
 lib/net/net_crc_sse.c                | 16 ++++++++--------
 lib/net/rte_arp.h                    |  8 ++++----
 lib/net/rte_ether.h                  |  8 ++++----
 lib/pipeline/rte_table_action.c      | 24 ++++++++++++------------
 lib/ring/rte_ring_core.h             |  4 ++--
 lib/sched/rte_sched.c                |  2 +-
 lib/sched/rte_sched_common.h         |  2 --
 lib/stack/rte_stack.h                |  2 +-
 24 files changed, 78 insertions(+), 77 deletions(-)

-- 
1.8.3.1

[PATCH 01/14] eal: use C11 alignas

[Tyler Retzlaff]

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/arm/include/rte_vect.h       | 4 ++--
 lib/eal/include/generic/rte_atomic.h | 4 ++--
 lib/eal/include/rte_common.h         | 2 +-
 lib/eal/loongarch/include/rte_vect.h | 8 ++++----
 lib/eal/ppc/include/rte_vect.h       | 4 ++--
 lib/eal/riscv/include/rte_vect.h     | 4 ++--
 lib/eal/x86/include/rte_vect.h       | 4 ++--
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index d7d6390..8367b96 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -65,7 +65,7 @@
  * Force alignment
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
-- 
1.8.3.1

[PATCH 02/14] stack: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/stack/rte_stack.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..277fc27 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -42,7 +42,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
-- 
1.8.3.1

[PATCH 03/14] sched: use C11 alignas

[Tyler Retzlaff]

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/sched/rte_sched.c        | 2 +-
 lib/sched/rte_sched_common.h | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..2ce7baa 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -193,7 +193,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH 04/14] ring: remove unnecessary explicit alignment

[Tyler Retzlaff]

Remove explicit alignment with __rte_aligned(8) from
RTE_ATOMIC(uint64_t) raw fields in the absence of packing the fields
should be naturally aligned to 8.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ring/rte_ring_core.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..619b69f 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -78,7 +78,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +94,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
-- 
1.8.3.1

[PATCH 05/14] pipeline: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/pipeline/rte_table_action.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH 06/14] net: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/net/net_crc_avx512.c | 12 ++++++------
 lib/net/net_crc_neon.c   | 10 +++++-----
 lib/net/net_crc_sse.c    | 16 ++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..c65bf54 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -20,8 +20,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +30,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +93,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..9966d09 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -19,8 +19,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +96,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +148,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..37ac248 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -18,8 +18,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +96,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +118,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +175,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +212,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index ce073ea..f4c5af4 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -57,9 +57,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -276,11 +276,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH 07/14] mbuf: remove unnecessary explicit alignment

[Tyler Retzlaff]

Remove explicit alignment with __rte_aligned(sizeof(T)) on buf_iova
field in the absence of packing the field should be correctly aligned.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/mbuf/rte_mbuf_core.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..eea2ea5 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
-- 
1.8.3.1

[PATCH 08/14] hash: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/hash/rte_thash.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH 09/14] eventdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eventdev/rte_eventdev.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index ec9b024..ff143c7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1078,7 +1078,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1118,19 +1118,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
-- 
1.8.3.1

[PATCH 10/14] ethdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ethdev/rte_ethdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index 21e3a21..f7ce047 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
-- 
1.8.3.1

[PATCH 11/14] dmadev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index 0647856..1ba2c1f 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_aligned(128) rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_aligned(128);
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
-- 
1.8.3.1

[PATCH 12/14] distributor: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/distributor/rte_distributor.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index 2ecb95c..8672a05 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -477,7 +477,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH 13/14] acl: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/acl/acl_run.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
-- 
1.8.3.1

[PATCH 14/14] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..441f1a0 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == 16, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

Re: [PATCH 11/14] dmadev: use C11 alignas

[fengchengwen]

[-- Attachment #1: Type: text/plain, Size: 1587 bytes --]

Acked-by: Chengwen Feng <fengchengwen@huawei.com>

On 2024/2/14 9:26, Tyler Retzlaff wrote:
> * Move __rte_aligned from the end of {struct,union} definitions to
>    be between {struct,union} and tag.
>
>    The placement between {struct,union} and the tag allows the desired
>    alignment to be imparted on the type regardless of the toolchain being
>    used for all of GCC, LLVM, MSVC compilers building both C and C++.
>
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
>
> Signed-off-by: Tyler Retzlaff<roretzla@linux.microsoft.com>
> ---
>   lib/dmadev/rte_dmadev_core.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
> index 0647856..1ba2c1f 100644
> --- a/lib/dmadev/rte_dmadev_core.h
> +++ b/lib/dmadev/rte_dmadev_core.h
> @@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
>    * The 'dev_private' field was placed in the first cache line to optimize
>    * performance because the PMD mainly depends on this field.
>    */
> -struct rte_dma_fp_object {
> +struct __rte_aligned(128) rte_dma_fp_object {
>   	/** PMD-specific private data. The driver should copy
>   	 * rte_dma_dev.data->dev_private to this field during initialization.
>   	 */
> @@ -73,7 +73,7 @@ struct rte_dma_fp_object {
>   	rte_dma_completed_t        completed;
>   	rte_dma_completed_status_t completed_status;
>   	rte_dma_burst_capacity_t   burst_capacity;
> -} __rte_aligned(128);
> +};
>   
>   extern struct rte_dma_fp_object *rte_dma_fp_objs;
>   

[-- Attachment #2: Type: text/html, Size: 2129 bytes --]

[PATCH v2 00/14] use C11 alignas and normalize type alignment

[Tyler Retzlaff]

This series normalizes type and object alignment by doing the following.

Fill in expansion of existing __rte_aligned, __rte_cache_aligned and
__rte_cache_min_aligned macros for MSVC.

Where __rte_aligned, __rte_cache_aligned and __rte_cache_min_aligned
are used to align *types* move them to a location on the type definition
that both GCC and MSVC accept for both C and C++ compilation.

Where __rte_aligned, __rte_cache_aligned or __rte_cache_min_aligned
are used to align *objects* replace their usage with standard C11 alignas.

I've elected to put the series forward without introducing a new macro
similar to __rte_alignas. Assuming the convention of a lower case macro
starting with __rte is intended to be internal only and providing it
would only permit unintended use by applications.

v2:
    * add missing #include <stdalign.h> for alignas macro.

Tyler Retzlaff (14):
  eal: use C11 alignas
  stack: use C11 alignas
  sched: use C11 alignas
  ring: remove unnecessary explicit alignment
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: remove unnecessary explicit alignment
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  eal: redefine macro to be integer literal for MSVC

 lib/acl/acl_run.h                    |  4 ++--
 lib/distributor/rte_distributor.c    |  3 ++-
 lib/dmadev/rte_dmadev_core.h         |  4 ++--
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         |  2 +-
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  9 ++++++---
 lib/ethdev/rte_ethdev.h              |  4 ++--
 lib/eventdev/rte_eventdev.h          |  8 ++++----
 lib/hash/rte_thash.h                 |  8 ++++----
 lib/mbuf/rte_mbuf_core.h             |  2 +-
 lib/net/net_crc_avx512.c             | 14 ++++++++------
 lib/net/net_crc_neon.c               | 11 ++++++-----
 lib/net/net_crc_sse.c                | 17 +++++++++--------
 lib/net/rte_arp.h                    |  8 ++++----
 lib/net/rte_ether.h                  |  8 ++++----
 lib/pipeline/rte_table_action.c      | 24 ++++++++++++------------
 lib/ring/rte_ring_core.h             |  4 ++--
 lib/sched/rte_sched.c                |  3 ++-
 lib/sched/rte_sched_common.h         |  2 --
 lib/stack/rte_stack.h                |  4 +++-
 24 files changed, 86 insertions(+), 77 deletions(-)

-- 
1.8.3.1

[PATCH v2 01/14] eal: use C11 alignas

[Tyler Retzlaff]

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/arm/include/rte_vect.h       | 4 ++--
 lib/eal/include/generic/rte_atomic.h | 4 ++--
 lib/eal/include/rte_common.h         | 2 +-
 lib/eal/loongarch/include/rte_vect.h | 8 ++++----
 lib/eal/ppc/include/rte_vect.h       | 4 ++--
 lib/eal/riscv/include/rte_vect.h     | 4 ++--
 lib/eal/x86/include/rte_vect.h       | 4 ++--
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index d7d6390..8367b96 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -65,7 +65,7 @@
  * Force alignment
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
-- 
1.8.3.1

[PATCH v2 02/14] stack: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/stack/rte_stack.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..573e15c 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
-- 
1.8.3.1

[PATCH v2 03/14] sched: use C11 alignas

[Tyler Retzlaff]

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/sched/rte_sched.c        | 3 ++-
 lib/sched/rte_sched_common.h | 2 --
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..41ac2ac 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v2 04/14] ring: remove unnecessary explicit alignment

[Tyler Retzlaff]

Remove explicit alignment with __rte_aligned(8) from
RTE_ATOMIC(uint64_t) raw fields in the absence of packing the fields
should be naturally aligned to 8.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ring/rte_ring_core.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..619b69f 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -78,7 +78,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +94,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
-- 
1.8.3.1

[PATCH v2 05/14] pipeline: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/pipeline/rte_table_action.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v2 06/14] net: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index ce073ea..f4c5af4 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -57,9 +57,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -276,11 +276,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v2 07/14] mbuf: remove unnecessary explicit alignment

[Tyler Retzlaff]

Remove explicit alignment with __rte_aligned(sizeof(T)) on buf_iova
field in the absence of packing the field should be correctly aligned.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/mbuf/rte_mbuf_core.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..eea2ea5 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
-- 
1.8.3.1

[PATCH v2 08/14] hash: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/hash/rte_thash.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v2 09/14] eventdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eventdev/rte_eventdev.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index ec9b024..ff143c7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1078,7 +1078,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1118,19 +1118,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
-- 
1.8.3.1

[PATCH v2 10/14] ethdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ethdev/rte_ethdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index 21e3a21..f7ce047 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
-- 
1.8.3.1

[PATCH v2 11/14] dmadev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index 0647856..1ba2c1f 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_aligned(128) rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_aligned(128);
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
-- 
1.8.3.1

[PATCH v2 12/14] distributor: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/distributor/rte_distributor.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index 2ecb95c..826640a 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v2 13/14] acl: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/acl/acl_run.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
-- 
1.8.3.1

[PATCH v2 14/14] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..441f1a0 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == 16, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v3 00/39] use C11 alignas and normalize type alignment

[Tyler Retzlaff]

This series normalizes type and object alignment by doing the following.

Fill in expansion of existing __rte_aligned, __rte_cache_aligned and
__rte_cache_min_aligned macros for MSVC.

Where __rte_aligned, __rte_cache_aligned and __rte_cache_min_aligned
are used to align *types* move them to a location on the type definition
that both GCC and MSVC accept for both C and C++ compilation.

Where __rte_aligned, __rte_cache_aligned or __rte_cache_min_aligned
are used to align *objects* replace their usage with standard C11 alignas.

I've elected to put the series forward without introducing a new macro
similar to __rte_alignas. Assuming the convention of a lower case macro
starting with __rte is intended to be internal only and providing it
would only permit unintended use by applications.

v3:
    * add missing patches for __rte_cache_aligned and
      __rte_cache_min_aligned
v2:
    * add missing #include <stdalign.h> for alignas macro.

Tyler Retzlaff (39):
  eal: use C11 alignas
  eal: redefine macro to be integer literal for MSVC
  stack: use C11 alignas
  sched: use C11 alignas
  ring: use C11 alignas
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: remove unnecessary explicit alignment
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  vhost: use C11 alignas
  timer: use C11 alignas
  table: use C11 alignas
  reorder: use C11 alignas
  regexdev: use C11 alignas
  rcu: use C11 alignas
  power: use C11 alignas
  rawdev: use C11 alignas
  port: use C11 alignas
  pdcp: use C11 alignas
  node: use C11 alignas
  mldev: use C11 alignas
  mempool: use C11 alignas
  member: use C11 alignas
  lpm: use C11 alignas
  ipsec: use C11 alignas
  jobstats: use C11 alignas
  bpf: use C11 alignas
  compressdev: use C11 alignas
  cryptodev: use C11 alignas
  dispatcher: use C11 alignas
  fib: use C11 alignas
  gpudev: use C11 alignas
  graph: use C11 alignas
  ip_frag: use C11 alignas

 lib/acl/acl_run.h                          |  4 ++--
 lib/acl/acl_run_altivec.h                  |  6 ++++--
 lib/acl/acl_run_neon.h                     |  6 ++++--
 lib/bpf/bpf_pkt.c                          |  4 ++--
 lib/compressdev/rte_comp.h                 |  4 ++--
 lib/compressdev/rte_compressdev_internal.h |  8 +++----
 lib/cryptodev/cryptodev_pmd.h              |  8 +++----
 lib/cryptodev/rte_cryptodev_core.h         |  4 ++--
 lib/dispatcher/rte_dispatcher.c            |  4 ++--
 lib/distributor/distributor_private.h      | 34 ++++++++++++++++--------------
 lib/distributor/rte_distributor.c          |  5 +++--
 lib/dmadev/rte_dmadev_core.h               |  4 ++--
 lib/dmadev/rte_dmadev_pmd.h                |  8 +++----
 lib/eal/arm/include/rte_vect.h             |  4 ++--
 lib/eal/common/malloc_elem.h               |  4 ++--
 lib/eal/common/malloc_heap.h               |  4 ++--
 lib/eal/common/rte_keepalive.c             |  3 ++-
 lib/eal/common/rte_random.c                |  4 ++--
 lib/eal/common/rte_service.c               |  8 +++----
 lib/eal/include/generic/rte_atomic.h       |  4 ++--
 lib/eal/include/rte_common.h               | 12 +++++------
 lib/eal/loongarch/include/rte_vect.h       |  8 +++----
 lib/eal/ppc/include/rte_vect.h             |  4 ++--
 lib/eal/riscv/include/rte_vect.h           |  4 ++--
 lib/eal/x86/include/rte_vect.h             |  9 +++++---
 lib/eal/x86/rte_power_intrinsics.c         | 10 +++++----
 lib/ethdev/ethdev_driver.h                 |  8 +++----
 lib/ethdev/rte_ethdev.h                    | 16 +++++++-------
 lib/ethdev/rte_ethdev_core.h               |  4 ++--
 lib/eventdev/event_timer_adapter_pmd.h     |  4 ++--
 lib/eventdev/eventdev_pmd.h                |  8 +++----
 lib/eventdev/rte_event_crypto_adapter.c    | 16 +++++++-------
 lib/eventdev/rte_event_dma_adapter.c       | 16 +++++++-------
 lib/eventdev/rte_event_eth_rx_adapter.c    |  8 +++----
 lib/eventdev/rte_event_eth_tx_adapter.c    |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c     |  9 ++++----
 lib/eventdev/rte_event_timer_adapter.h     |  8 +++----
 lib/eventdev/rte_eventdev.h                |  8 +++----
 lib/eventdev/rte_eventdev_core.h           |  4 ++--
 lib/fib/dir24_8.h                          |  4 +++-
 lib/fib/trie.h                             |  4 +++-
 lib/gpudev/gpudev_driver.h                 |  4 ++--
 lib/graph/graph_private.h                  |  4 ++--
 lib/graph/graph_stats.c                    |  4 ++--
 lib/graph/rte_graph.h                      |  4 ++--
 lib/graph/rte_graph_worker_common.h        | 17 +++++++++------
 lib/hash/rte_cuckoo_hash.h                 | 16 ++++++++------
 lib/hash/rte_thash.c                       |  4 +++-
 lib/hash/rte_thash.h                       |  8 +++----
 lib/ip_frag/ip_reassembly.h                |  8 +++----
 lib/ipsec/rte_ipsec.h                      |  4 ++--
 lib/ipsec/sa.h                             |  4 ++--
 lib/jobstats/rte_jobstats.h                |  8 +++----
 lib/lpm/rte_lpm.h                          |  5 +++--
 lib/lpm/rte_lpm6.c                         |  8 +++----
 lib/mbuf/rte_mbuf_core.h                   |  6 +++---
 lib/member/rte_member.h                    |  8 +++----
 lib/member/rte_member_ht.h                 |  4 ++--
 lib/member/rte_member_sketch.c             |  4 ++--
 lib/mempool/rte_mempool.h                  | 27 ++++++++++++------------
 lib/mldev/rte_mldev.h                      |  4 ++--
 lib/mldev/rte_mldev_core.h                 |  4 ++--
 lib/net/net_crc_avx512.c                   | 14 ++++++------
 lib/net/net_crc_neon.c                     | 11 +++++-----
 lib/net/net_crc_sse.c                      | 17 ++++++++-------
 lib/net/rte_arp.h                          |  8 +++----
 lib/net/rte_ether.h                        |  8 +++----
 lib/node/node_private.h                    |  4 ++--
 lib/node/pkt_cls.c                         |  4 +++-
 lib/pdcp/rte_pdcp.h                        |  4 ++--
 lib/pipeline/rte_pipeline.c                |  4 ++--
 lib/pipeline/rte_port_in_action.c          |  3 ++-
 lib/pipeline/rte_swx_ipsec.c               |  4 +++-
 lib/pipeline/rte_table_action.c            | 24 ++++++++++-----------
 lib/port/rte_port_frag.c                   |  4 ++--
 lib/power/power_acpi_cpufreq.c             |  4 ++--
 lib/power/power_amd_pstate_cpufreq.c       |  4 ++--
 lib/power/power_cppc_cpufreq.c             |  4 ++--
 lib/power/power_intel_uncore.c             |  4 ++--
 lib/power/power_pstate_cpufreq.c           |  4 ++--
 lib/power/rte_power_pmd_mgmt.c             |  4 ++--
 lib/rawdev/rte_rawdev.h                    |  4 ++--
 lib/rcu/rte_rcu_qsbr.h                     | 16 ++++++++------
 lib/regexdev/rte_regexdev_core.h           |  8 +++----
 lib/reorder/rte_reorder.c                  |  8 +++----
 lib/ring/rte_ring_core.h                   | 16 ++++++++------
 lib/ring/rte_ring_peek_zc.h                |  4 ++--
 lib/sched/rte_sched.c                      | 21 +++++++++---------
 lib/sched/rte_sched_common.h               |  2 --
 lib/stack/rte_stack.h                      | 16 ++++++++------
 lib/table/rte_swx_table_learner.c          |  4 ++--
 lib/table/rte_table_acl.c                  |  3 ++-
 lib/table/rte_table_array.c                |  7 +++---
 lib/table/rte_table_hash_cuckoo.c          |  4 +++-
 lib/table/rte_table_hash_ext.c             |  3 ++-
 lib/table/rte_table_hash_key16.c           |  4 +++-
 lib/table/rte_table_hash_key32.c           |  4 +++-
 lib/table/rte_table_hash_key8.c            |  4 +++-
 lib/table/rte_table_hash_lru.c             |  3 ++-
 lib/table/rte_table_lpm.c                  |  3 ++-
 lib/table/rte_table_lpm_ipv6.c             |  3 ++-
 lib/timer/rte_timer.c                      |  4 ++--
 lib/vhost/vhost.h                          |  8 +++----
 lib/vhost/vhost_crypto.c                   |  4 ++--
 104 files changed, 396 insertions(+), 343 deletions(-)

-- 
1.8.3.1

[PATCH v3 01/39] eal: use C11 alignas

[Tyler Retzlaff]

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/common/malloc_elem.h         |  4 ++--
 lib/eal/common/malloc_heap.h         |  4 ++--
 lib/eal/common/rte_keepalive.c       |  3 ++-
 lib/eal/common/rte_random.c          |  4 ++--
 lib/eal/common/rte_service.c         |  8 ++++----
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         | 12 +++++-------
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  4 ++--
 lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
 13 files changed, 37 insertions(+), 36 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
index 952ce73..c7ff671 100644
--- a/lib/eal/common/malloc_elem.h
+++ b/lib/eal/common/malloc_elem.h
@@ -20,7 +20,7 @@ enum elem_state {
 	ELEM_PAD  /* element is a padding-only header */
 };
 
-struct malloc_elem {
+struct __rte_cache_aligned malloc_elem {
 	struct malloc_heap *heap;
 	struct malloc_elem *volatile prev;
 	/**< points to prev elem in memseg */
@@ -48,7 +48,7 @@ struct malloc_elem {
 	size_t user_size;
 	uint64_t asan_cookie[2]; /* must be next to header_cookie */
 #endif
-} __rte_cache_aligned;
+};
 
 static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
 
diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
index 8f3ab57..0c49588 100644
--- a/lib/eal/common/malloc_heap.h
+++ b/lib/eal/common/malloc_heap.h
@@ -21,7 +21,7 @@
 /**
  * Structure to hold malloc heap
  */
-struct malloc_heap {
+struct __rte_cache_aligned malloc_heap {
 	rte_spinlock_t lock;
 	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
 	struct malloc_elem *volatile first;
@@ -31,7 +31,7 @@ struct malloc_heap {
 	unsigned int socket_id;
 	size_t total_size;
 	char name[RTE_HEAP_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 void *
 malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
index f6db973..391c1be 100644
--- a/lib/eal/common/rte_keepalive.c
+++ b/lib/eal/common/rte_keepalive.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2015-2016 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <inttypes.h>
 
 #include <rte_common.h>
@@ -19,7 +20,7 @@ struct rte_keepalive {
 		/*
 		 * Each element must be cache aligned to prevent false sharing.
 		 */
-		enum rte_keepalive_state core_state __rte_cache_aligned;
+		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
 	} live_data[RTE_KEEPALIVE_MAXCORES];
 
 	/** Last-seen-alive timestamps */
diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
index 7709b8f..90e91b3 100644
--- a/lib/eal/common/rte_random.c
+++ b/lib/eal/common/rte_random.c
@@ -13,14 +13,14 @@
 #include <rte_lcore.h>
 #include <rte_random.h>
 
-struct rte_rand_state {
+struct __rte_cache_aligned rte_rand_state {
 	uint64_t z1;
 	uint64_t z2;
 	uint64_t z3;
 	uint64_t z4;
 	uint64_t z5;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 /* One instance each for every lcore id-equipped thread, and one
  * additional instance to be shared by all others threads (i.e., all
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index d959c91..5637993 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -32,7 +32,7 @@
 #define RUNSTATE_RUNNING 1
 
 /* internal representation of a service */
-struct rte_service_spec_impl {
+struct __rte_cache_aligned rte_service_spec_impl {
 	/* public part of the struct */
 	struct rte_service_spec spec;
 
@@ -53,7 +53,7 @@ struct rte_service_spec_impl {
 	 * on currently.
 	 */
 	RTE_ATOMIC(uint32_t) num_mapped_cores;
-} __rte_cache_aligned;
+};
 
 struct service_stats {
 	RTE_ATOMIC(uint64_t) calls;
@@ -61,7 +61,7 @@ struct service_stats {
 };
 
 /* the internal values of a service core */
-struct core_state {
+struct __rte_cache_aligned core_state {
 	/* map of services IDs are run on this core */
 	uint64_t service_mask;
 	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
@@ -71,7 +71,7 @@ struct core_state {
 	RTE_ATOMIC(uint64_t) loops;
 	RTE_ATOMIC(uint64_t) cycles;
 	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
-} __rte_cache_aligned;
+};
 
 static uint32_t rte_service_count;
 static struct rte_service_spec_impl *rte_services;
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index d7d6390..ac90951 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -12,6 +12,8 @@
  * for DPDK.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -65,7 +67,7 @@
  * Force alignment
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
@@ -529,18 +531,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
 #define RTE_CACHE_LINE_MIN_SIZE 64
 
 /** Force alignment to cache line. */
-#ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_cache_aligned
-#else
 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-#endif
 
 /** Force minimum cache line alignment. */
 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
 
 #define _RTE_CACHE_GUARD_HELPER2(unique) \
-	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) \
+	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
 #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
 /**
  * Empty cache lines, to guard against false sharing-like effects
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 532a2e6..6d9b642 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2020 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_lcore.h>
 #include <rte_rtm.h>
@@ -12,10 +14,10 @@
 /*
  * Per-lcore structure holding current status of C0.2 sleeps.
  */
-static struct power_wait_status {
+static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
 	rte_spinlock_t lock;
 	volatile void *monitor_addr; /**< NULL if not currently sleeping */
-} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
+} wait_status[RTE_MAX_LCORE];
 
 /*
  * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
@@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
 #endif
 }
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	void (*mmonitor)(volatile void *addr);
 	void (*mwait)(const uint64_t timeout);
-} __rte_cache_aligned power_monitor_ops;
+} power_monitor_ops;
 
 static inline void
 __umwait_wakeup(volatile void *addr)
-- 
1.8.3.1

[PATCH v3 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..441f1a0 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == 16, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v3 03/39] stack: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/stack/rte_stack.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..8ff0659 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
@@ -52,11 +54,11 @@ struct rte_stack_lf_list {
  */
 struct rte_stack_lf {
 	/** LIFO list of elements */
-	struct rte_stack_lf_list used __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list used;
 	/** LIFO list of free elements */
-	struct rte_stack_lf_list free __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list free;
 	/** LIFO elements */
-	struct rte_stack_lf_elem elems[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_elem elems[];
 };
 
 /* Structure containing the LIFO, its current length, and a lock for mutual
@@ -71,9 +73,9 @@ struct rte_stack_std {
 /* The RTE stack structure contains the LIFO structure itself, plus metadata
  * such as its name and memzone pointer.
  */
-struct rte_stack {
+struct __rte_cache_aligned rte_stack {
 	/** Name of the stack. */
-	char name[RTE_STACK_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_STACK_NAMESIZE];
 	/** Memzone containing the rte_stack structure. */
 	const struct rte_memzone *memzone;
 	uint32_t capacity; /**< Usable size of the stack. */
@@ -82,7 +84,7 @@ struct rte_stack {
 		struct rte_stack_lf stack_lf; /**< Lock-free LIFO structure. */
 		struct rte_stack_std stack_std;	/**< LIFO structure. */
 	};
-} __rte_cache_aligned;
+};
 
 /**
  * The stack uses lock-free push and pop functions. This flag is only
-- 
1.8.3.1

[PATCH v3 04/39] sched: use C11 alignas

[Tyler Retzlaff]

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@ struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@ struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@ struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@ struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@ struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@ struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v3 05/39] ring: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

* Remove explicit alignment with __rte_aligned(8) from
  RTE_ATOMIC(uint64_t) raw fields in the absence of packing the fields
  should be naturally aligned to 8.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ring/rte_ring_core.h    | 16 +++++++++-------
 lib/ring/rte_ring_peek_zc.h |  4 ++--
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..6cb2a91 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -19,6 +19,8 @@
  * instead.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -78,7 +80,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
@@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
  * a problem.
  */
 struct rte_ring {
-	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
 	/**< Name of the ring. */
 	int flags;               /**< Flags supplied at creation. */
 	const struct rte_memzone *memzone;
@@ -129,20 +131,20 @@ struct rte_ring {
 	RTE_CACHE_GUARD;
 
 	/** Ring producer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail prod;
 		struct rte_ring_hts_headtail hts_prod;
 		struct rte_ring_rts_headtail rts_prod;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 
 	/** Ring consumer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail cons;
 		struct rte_ring_hts_headtail hts_cons;
 		struct rte_ring_rts_headtail rts_cons;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 };
diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
index 8fb279c..0b5e34b 100644
--- a/lib/ring/rte_ring_peek_zc.h
+++ b/lib/ring/rte_ring_peek_zc.h
@@ -79,7 +79,7 @@
  * This structure contains the pointers and length of the space
  * reserved on the ring storage.
  */
-struct rte_ring_zc_data {
+struct __rte_cache_aligned rte_ring_zc_data {
 	/* Pointer to the first space in the ring */
 	void *ptr1;
 	/* Pointer to the second space in the ring if there is wrap-around.
@@ -92,7 +92,7 @@ struct rte_ring_zc_data {
 	 * will give the number of elements available at ptr2.
 	 */
 	unsigned int n1;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
-- 
1.8.3.1

[PATCH v3 06/39] pipeline: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/pipeline/rte_pipeline.c       |  4 ++--
 lib/pipeline/rte_port_in_action.c |  3 ++-
 lib/pipeline/rte_swx_ipsec.c      |  4 +++-
 lib/pipeline/rte_table_action.c   | 24 ++++++++++++------------
 4 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index c9ed903..62a3005 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -104,7 +104,7 @@ struct rte_table {
 
 #define RTE_PIPELINE_MAX_NAME_SZ                           124
 
-struct rte_pipeline {
+struct __rte_cache_aligned rte_pipeline {
 	/* Input parameters */
 	char name[RTE_PIPELINE_MAX_NAME_SZ];
 	int socket_id;
@@ -132,7 +132,7 @@ struct rte_pipeline {
 	uint64_t pkts_mask;
 	uint64_t n_pkts_ah_drop;
 	uint64_t pkts_drop_mask;
-} __rte_cache_aligned;
+};
 
 static inline uint32_t
 rte_mask_get_next(uint64_t mask, uint32_t pos)
diff --git a/lib/pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
index 5818973..bbacaff 100644
--- a/lib/pipeline/rte_port_in_action.c
+++ b/lib/pipeline/rte_port_in_action.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2018 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -282,7 +283,7 @@ struct rte_port_in_action_profile *
 struct rte_port_in_action {
 	struct ap_config cfg;
 	struct ap_data data;
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static __rte_always_inline void *
diff --git a/lib/pipeline/rte_swx_ipsec.c b/lib/pipeline/rte_swx_ipsec.c
index 28576c2..76b853f 100644
--- a/lib/pipeline/rte_swx_ipsec.c
+++ b/lib/pipeline/rte_swx_ipsec.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2022 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
@@ -154,7 +156,7 @@ struct rte_swx_ipsec {
 	/*
 	 * Table memory.
 	 */
-	uint8_t memory[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[];
 };
 
 static inline struct ipsec_sa *
diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v3 07/39] net: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index ce073ea..f4c5af4 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -57,9 +57,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -276,11 +276,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v3 08/39] mbuf: remove unnecessary explicit alignment

[Tyler Retzlaff]

Remove explicit alignment with __rte_aligned(sizeof(T)) on buf_iova
field in the absence of packing the field should be correctly aligned.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/mbuf/rte_mbuf_core.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..7369e3e 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -463,7 +463,7 @@ enum {
 /**
  * The generic rte_mbuf, containing a packet mbuf.
  */
-struct rte_mbuf {
+struct __rte_cache_aligned rte_mbuf {
 	RTE_MARKER cacheline0;
 
 	void *buf_addr;           /**< Virtual address of segment buffer. */
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
@@ -662,7 +662,7 @@ struct rte_mbuf {
 	uint16_t timesync;
 
 	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * Function typedef of callback to free externally attached buffer.
-- 
1.8.3.1

[PATCH v3 09/39] hash: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/hash/rte_cuckoo_hash.h | 16 +++++++++-------
 lib/hash/rte_thash.c       |  4 +++-
 lib/hash/rte_thash.h       |  8 ++++----
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.h b/lib/hash/rte_cuckoo_hash.h
index 8ea793c..a528f1d 100644
--- a/lib/hash/rte_cuckoo_hash.h
+++ b/lib/hash/rte_cuckoo_hash.h
@@ -11,6 +11,8 @@
 #ifndef _RTE_CUCKOO_HASH_H_
 #define _RTE_CUCKOO_HASH_H_
 
+#include <stdalign.h>
+
 #if defined(RTE_ARCH_X86)
 #include "rte_cmp_x86.h"
 #endif
@@ -117,10 +119,10 @@ enum cmp_jump_table_case {
 
 #define RTE_HASH_TSX_MAX_RETRY  10
 
-struct lcore_cache {
+struct __rte_cache_aligned lcore_cache {
 	unsigned len; /**< Cache len */
 	uint32_t objs[LCORE_CACHE_SIZE]; /**< Cache objects */
-} __rte_cache_aligned;
+};
 
 /* Structure that stores key-value pair */
 struct rte_hash_key {
@@ -141,7 +143,7 @@ enum rte_hash_sig_compare_function {
 };
 
 /** Bucket structure */
-struct rte_hash_bucket {
+struct __rte_cache_aligned rte_hash_bucket {
 	uint16_t sig_current[RTE_HASH_BUCKET_ENTRIES];
 
 	RTE_ATOMIC(uint32_t) key_idx[RTE_HASH_BUCKET_ENTRIES];
@@ -149,10 +151,10 @@ struct rte_hash_bucket {
 	uint8_t flag[RTE_HASH_BUCKET_ENTRIES];
 
 	void *next;
-} __rte_cache_aligned;
+};
 
 /** A hash table structure. */
-struct rte_hash {
+struct __rte_cache_aligned rte_hash {
 	char name[RTE_HASH_NAMESIZE];   /**< Name of the hash. */
 	uint32_t entries;               /**< Total table entries. */
 	uint32_t num_buckets;           /**< Number of buckets in table. */
@@ -170,7 +172,7 @@ struct rte_hash {
 
 	/* Fields used in lookup */
 
-	uint32_t key_len __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t key_len;
 	/**< Length of hash key. */
 	uint8_t hw_trans_mem_support;
 	/**< If hardware transactional memory is used. */
@@ -220,7 +222,7 @@ struct rte_hash {
 	uint32_t *ext_bkt_to_free;
 	RTE_ATOMIC(uint32_t) *tbl_chng_cnt;
 	/**< Indicates if the hash table changed from last read. */
-} __rte_cache_aligned;
+};
 
 struct queue_node {
 	struct rte_hash_bucket *bkt; /* Current bucket on the bfs search */
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index e8de071..6464fd3 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2021 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <sys/queue.h>
 
 #include <rte_thash.h>
@@ -80,7 +82,7 @@ struct rte_thash_subtuple_helper {
 	uint32_t	tuple_offset;	/** < Offset in bits of the subtuple */
 	uint32_t	tuple_len;	/** < Length in bits of the subtuple */
 	uint32_t	lsb_msk;	/** < (1 << reta_sz_log) - 1 */
-	__extension__ uint32_t	compl_table[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint32_t	compl_table[0];
 	/** < Complementary table */
 };
 
diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v3 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eventdev/event_timer_adapter_pmd.h  |  4 ++--
 lib/eventdev/eventdev_pmd.h             |  8 ++++----
 lib/eventdev/rte_event_crypto_adapter.c | 16 ++++++++--------
 lib/eventdev/rte_event_dma_adapter.c    | 16 ++++++++--------
 lib/eventdev/rte_event_eth_rx_adapter.c |  8 ++++----
 lib/eventdev/rte_event_eth_tx_adapter.c |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c  |  9 +++++----
 lib/eventdev/rte_event_timer_adapter.h  |  8 ++++----
 lib/eventdev/rte_eventdev.h             |  8 ++++----
 lib/eventdev/rte_eventdev_core.h        |  4 ++--
 10 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/lib/eventdev/event_timer_adapter_pmd.h b/lib/eventdev/event_timer_adapter_pmd.h
index 65b421b..cd5127f 100644
--- a/lib/eventdev/event_timer_adapter_pmd.h
+++ b/lib/eventdev/event_timer_adapter_pmd.h
@@ -86,7 +86,7 @@ struct event_timer_adapter_ops {
  * @internal Adapter data; structure to be placed in shared memory to be
  * accessible by various processes in a multi-process configuration.
  */
-struct rte_event_timer_adapter_data {
+struct __rte_cache_aligned rte_event_timer_adapter_data {
 	uint8_t id;
 	/**< Event timer adapter ID */
 	uint8_t event_dev_id;
@@ -110,7 +110,7 @@ struct rte_event_timer_adapter_data {
 
 	uint8_t started : 1;
 	/**< Flag to indicate adapter started. */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index c415624..3934d8e 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -107,7 +107,7 @@ struct rte_eventdev_global {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_eventdev_data {
+struct __rte_cache_aligned rte_eventdev_data {
 	int socket_id;
 	/**< Socket ID where memory is allocated */
 	uint8_t dev_id;
@@ -146,10 +146,10 @@ struct rte_eventdev_data {
 
 	uint64_t reserved_64s[4]; /**< Reserved for future fields */
 	void *reserved_ptrs[4];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each event device. */
-struct rte_eventdev {
+struct __rte_cache_aligned rte_eventdev {
 	struct rte_eventdev_data *data;
 	/**< Pointer to device data */
 	struct eventdev_ops *dev_ops;
@@ -189,7 +189,7 @@ struct rte_eventdev {
 
 	uint64_t reserved_64s[3]; /**< Reserved for future fields */
 	void *reserved_ptrs[3];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 extern struct rte_eventdev *rte_eventdevs;
 /** @internal The pool of rte_eventdev structures. */
diff --git a/lib/eventdev/rte_event_crypto_adapter.c b/lib/eventdev/rte_event_crypto_adapter.c
index d46595d..6bc2769 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -42,7 +42,7 @@
 
 #define ECA_ADAPTER_ARRAY "crypto_adapter_array"
 
-struct crypto_ops_circular_buffer {
+struct __rte_cache_aligned crypto_ops_circular_buffer {
 	/* index of head element in circular buffer */
 	uint16_t head;
 	/* index of tail element in circular buffer */
@@ -53,9 +53,9 @@ struct crypto_ops_circular_buffer {
 	uint16_t size;
 	/* Pointer to hold rte_crypto_ops for batching */
 	struct rte_crypto_op **op_buffer;
-} __rte_cache_aligned;
+};
 
-struct event_crypto_adapter {
+struct __rte_cache_aligned event_crypto_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 	/* Event port identifier */
@@ -98,10 +98,10 @@ struct event_crypto_adapter {
 	uint16_t nb_qps;
 	/* Adapter mode */
 	enum rte_event_crypto_adapter_mode mode;
-} __rte_cache_aligned;
+};
 
 /* Per crypto device information */
-struct crypto_device_info {
+struct __rte_cache_aligned crypto_device_info {
 	/* Pointer to cryptodev */
 	struct rte_cryptodev *dev;
 	/* Pointer to queue pair info */
@@ -118,15 +118,15 @@ struct crypto_device_info {
 	 * be invoked if not already invoked
 	 */
 	uint16_t num_qpairs;
-} __rte_cache_aligned;
+};
 
 /* Per queue pair information */
-struct crypto_queue_pair_info {
+struct __rte_cache_aligned crypto_queue_pair_info {
 	/* Set to indicate queue pair is enabled */
 	bool qp_enabled;
 	/* Circular buffer for batching crypto ops to cdev */
 	struct crypto_ops_circular_buffer cbuf;
-} __rte_cache_aligned;
+};
 
 static struct event_crypto_adapter **event_crypto_adapter;
 
diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c
index 4196164..24dff55 100644
--- a/lib/eventdev/rte_event_dma_adapter.c
+++ b/lib/eventdev/rte_event_dma_adapter.c
@@ -26,7 +26,7 @@
 	} while (0)
 
 /* DMA ops circular buffer */
-struct dma_ops_circular_buffer {
+struct __rte_cache_aligned dma_ops_circular_buffer {
 	/* Index of head element */
 	uint16_t head;
 
@@ -41,19 +41,19 @@ struct dma_ops_circular_buffer {
 
 	/* Pointer to hold rte_event_dma_adapter_op for processing */
 	struct rte_event_dma_adapter_op **op_buffer;
-} __rte_cache_aligned;
+};
 
 /* Vchan information */
-struct dma_vchan_info {
+struct __rte_cache_aligned dma_vchan_info {
 	/* Set to indicate vchan queue is enabled */
 	bool vq_enabled;
 
 	/* Circular buffer for batching DMA ops to dma_dev */
 	struct dma_ops_circular_buffer dma_buf;
-} __rte_cache_aligned;
+};
 
 /* DMA device information */
-struct dma_device_info {
+struct __rte_cache_aligned dma_device_info {
 	/* Pointer to vchan queue info */
 	struct dma_vchan_info *vchanq;
 
@@ -81,9 +81,9 @@ struct dma_device_info {
 	 * transfer uses a hardware mechanism
 	 */
 	uint8_t internal_event_port;
-} __rte_cache_aligned;
+};
 
-struct event_dma_adapter {
+struct __rte_cache_aligned event_dma_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 
@@ -145,7 +145,7 @@ struct event_dma_adapter {
 
 	/* Per instance stats structure */
 	struct rte_event_dma_adapter_stats dma_stats;
-} __rte_cache_aligned;
+};
 
 static struct event_dma_adapter **event_dma_adapter;
 
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c
index 1b83a55..3ee20d9 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -72,7 +72,7 @@ struct eth_rx_poll_entry {
 	uint16_t eth_rx_qid;
 };
 
-struct eth_rx_vector_data {
+struct __rte_cache_aligned eth_rx_vector_data {
 	TAILQ_ENTRY(eth_rx_vector_data) next;
 	uint16_t port;
 	uint16_t queue;
@@ -82,7 +82,7 @@ struct eth_rx_vector_data {
 	uint64_t vector_timeout_ticks;
 	struct rte_mempool *vector_pool;
 	struct rte_event_vector *vector_ev;
-} __rte_cache_aligned;
+};
 
 TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
 
@@ -103,7 +103,7 @@ struct eth_event_enqueue_buffer {
 	uint16_t last_mask;
 };
 
-struct event_eth_rx_adapter {
+struct __rte_cache_aligned event_eth_rx_adapter {
 	/* RSS key */
 	uint8_t rss_key_be[RSS_KEY_SIZE];
 	/* Event device identifier */
@@ -188,7 +188,7 @@ struct event_eth_rx_adapter {
 	uint8_t rxa_started;
 	/* Adapter ID */
 	uint8_t id;
-} __rte_cache_aligned;
+};
 
 /* Per eth device */
 struct eth_device_info {
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index 56435be..67fff8b 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -109,7 +109,7 @@ struct txa_service_queue_info {
 };
 
 /* PMD private structure */
-struct txa_service_data {
+struct __rte_cache_aligned txa_service_data {
 	/* Max mbufs processed in any service function invocation */
 	uint32_t max_nb_tx;
 	/* Number of Tx queues in adapter */
@@ -144,7 +144,7 @@ struct txa_service_data {
 	int64_t service_id;
 	/* Memory allocation name */
 	char mem_name[TXA_MEM_NAME_LEN];
-} __rte_cache_aligned;
+};
 
 /* Per eth device structure */
 struct txa_service_ethdev {
diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
index e6d3492..5d3e37f 100644
--- a/lib/eventdev/rte_event_timer_adapter.c
+++ b/lib/eventdev/rte_event_timer_adapter.c
@@ -4,6 +4,7 @@
  */
 
 #include <ctype.h>
+#include <stdalign.h>
 #include <string.h>
 #include <inttypes.h>
 #include <stdbool.h>
@@ -512,11 +513,11 @@ struct rte_event_timer_adapter *
 
 #define EXP_TIM_BUF_SZ 128
 
-struct event_buffer {
+struct __rte_cache_aligned event_buffer {
 	size_t head;
 	size_t tail;
 	struct rte_event events[EVENT_BUFFER_SZ];
-} __rte_cache_aligned;
+};
 
 static inline bool
 event_buffer_full(struct event_buffer *bufp)
@@ -632,9 +633,9 @@ struct swtim {
 	/* Identifier of timer data instance */
 	uint32_t timer_data_id;
 	/* Track which cores have actually armed a timer */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		RTE_ATOMIC(uint16_t) v;
-	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
+	} in_use[RTE_MAX_LCORE];
 	/* Track which cores' timer lists should be polled */
 	RTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];
 	/* The number of lists that should be polled */
diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h
index c133dec..0bd1b30 100644
--- a/lib/eventdev/rte_event_timer_adapter.h
+++ b/lib/eventdev/rte_event_timer_adapter.h
@@ -473,7 +473,7 @@ enum rte_event_timer_state {
  * The generic *rte_event_timer* structure to hold the event timer attributes
  * for arm and cancel operations.
  */
-struct rte_event_timer {
+struct __rte_cache_aligned rte_event_timer {
 	struct rte_event ev;
 	/**<
 	 * Expiry event attributes.  On successful event timer timeout,
@@ -504,7 +504,7 @@ struct rte_event_timer {
 	/**< Memory to store user specific metadata.
 	 * The event timer adapter implementation should not modify this area.
 	 */
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*rte_event_timer_arm_burst_t)(
 		const struct rte_event_timer_adapter *adapter,
@@ -526,7 +526,7 @@ typedef uint16_t (*rte_event_timer_cancel_burst_t)(
 /**
  * @internal Data structure associated with each event timer adapter.
  */
-struct rte_event_timer_adapter {
+struct __rte_cache_aligned rte_event_timer_adapter {
 	rte_event_timer_arm_burst_t arm_burst;
 	/**< Pointer to driver arm_burst function. */
 	rte_event_timer_arm_tmo_tick_burst_t arm_tmo_tick_burst;
@@ -540,7 +540,7 @@ struct rte_event_timer_adapter {
 
 	uint8_t allocated : 1;
 	/**< Flag to indicate that this adapter has been allocated */
-} __rte_cache_aligned;
+};
 
 #define ADAPTER_VALID_OR_ERR_RET(adapter, retval) do {		\
 	if (adapter == NULL || !adapter->allocated)		\
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index ec9b024..ff143c7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1078,7 +1078,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1118,19 +1118,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
diff --git a/lib/eventdev/rte_eventdev_core.h b/lib/eventdev/rte_eventdev_core.h
index 5b40551..fc8e155 100644
--- a/lib/eventdev/rte_eventdev_core.h
+++ b/lib/eventdev/rte_eventdev_core.h
@@ -49,7 +49,7 @@ typedef uint16_t (*event_dma_adapter_enqueue_t)(void *port, struct rte_event ev[
 typedef int (*event_profile_switch_t)(void *port, uint8_t profile);
 /**< @internal Switch active link profile on the event port. */
 
-struct rte_event_fp_ops {
+struct __rte_cache_aligned rte_event_fp_ops {
 	void **data;
 	/**< points to array of internal port data pointers */
 	event_enqueue_t enqueue;
@@ -77,7 +77,7 @@ struct rte_event_fp_ops {
 	event_profile_switch_t profile_switch;
 	/**< PMD Event switch profile function. */
 	uintptr_t reserved[4];
-} __rte_cache_aligned;
+};
 
 extern struct rte_event_fp_ops rte_event_fp_ops[RTE_EVENT_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v3 11/39] ethdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ethdev/ethdev_driver.h   |  8 ++++----
 lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
 lib/ethdev/rte_ethdev_core.h |  4 ++--
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index b482cd1..2edad71 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_eth_dev {
+struct __rte_cache_aligned rte_eth_dev {
 	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
 	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
 
@@ -89,7 +89,7 @@ struct rte_eth_dev {
 
 	enum rte_eth_dev_state state; /**< Flag indicating the port state */
 	void *security_ctx; /**< Context for security ops */
-} __rte_cache_aligned;
+};
 
 struct rte_eth_dev_sriov;
 struct rte_eth_dev_owner;
@@ -100,7 +100,7 @@ struct rte_eth_dev {
  * device. This structure is safe to place in shared memory to be common
  * among different processes in a multi-process configuration.
  */
-struct rte_eth_dev_data {
+struct __rte_cache_aligned rte_eth_dev_data {
 	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
 
 	void **rx_queues; /**< Array of pointers to Rx queues */
@@ -186,7 +186,7 @@ struct rte_eth_dev_data {
 	uint16_t backer_port_id;
 
 	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index 21e3a21..b7eca2f 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
@@ -1835,7 +1835,7 @@ struct rte_eth_dev_info {
  * Ethernet device Rx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_rxq_info {
+struct __rte_cache_min_aligned rte_eth_rxq_info {
 	struct rte_mempool *mp;     /**< mempool used by that queue. */
 	struct rte_eth_rxconf conf; /**< queue config parameters. */
 	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
@@ -1849,17 +1849,17 @@ struct rte_eth_rxq_info {
 	 * Value 0 means that the threshold monitoring is disabled.
 	 */
 	uint8_t avail_thresh;
-} __rte_cache_min_aligned;
+};
 
 /**
  * Ethernet device Tx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_txq_info {
+struct __rte_cache_min_aligned rte_eth_txq_info {
 	struct rte_eth_txconf conf; /**< queue config parameters. */
 	uint16_t nb_desc;           /**< configured number of TXDs. */
 	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
-} __rte_cache_min_aligned;
+};
 
 /**
  * @warning
@@ -1869,7 +1869,7 @@ struct rte_eth_txq_info {
  * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
  * them into Rx mbuf ring.
  */
-struct rte_eth_recycle_rxq_info {
+struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
 	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
 	struct rte_mempool *mp;     /**< mempool of Rx queue. */
 	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
@@ -1883,7 +1883,7 @@ struct rte_eth_recycle_rxq_info {
 	 * Value 0 means that PMD drivers have no requirement for this.
 	 */
 	uint16_t refill_requirement;
-} __rte_cache_min_aligned;
+};
 
 /* Generic Burst mode flag definition, values can be ORed. */
 
diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
index 4bfaf79..fdfc68f 100644
--- a/lib/ethdev/rte_ethdev_core.h
+++ b/lib/ethdev/rte_ethdev_core.h
@@ -81,7 +81,7 @@ struct rte_ethdev_qdata {
  * On 64-bit systems contents of this structure occupy exactly two 64B lines.
  * On 32-bit systems contents of this structure fits into one 64B line.
  */
-struct rte_eth_fp_ops {
+struct __rte_cache_aligned rte_eth_fp_ops {
 
 	/**@{*/
 	/**
@@ -119,7 +119,7 @@ struct rte_eth_fp_ops {
 	uintptr_t reserved2[2];
 	/**@}*/
 
-} __rte_cache_aligned;
+};
 
 extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
 
-- 
1.8.3.1

[PATCH v3 12/39] dmadev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 lib/dmadev/rte_dmadev_pmd.h  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index 0647856..1ba2c1f 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_aligned(128) rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_aligned(128);
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
diff --git a/lib/dmadev/rte_dmadev_pmd.h b/lib/dmadev/rte_dmadev_pmd.h
index 7f354f6..5872908 100644
--- a/lib/dmadev/rte_dmadev_pmd.h
+++ b/lib/dmadev/rte_dmadev_pmd.h
@@ -94,7 +94,7 @@ struct rte_dma_dev_ops {
  *
  * @see struct rte_dma_dev::data
  */
-struct rte_dma_dev_data {
+struct __rte_cache_aligned rte_dma_dev_data {
 	char dev_name[RTE_DEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	int16_t dev_id; /**< Device [external] identifier. */
 	int16_t numa_node; /**< Local NUMA memory ID. -1 if unknown. */
@@ -103,7 +103,7 @@ struct rte_dma_dev_data {
 	__extension__
 	uint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */
 	uint64_t reserved[2]; /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /**
  * Possible states of a DMA device.
@@ -122,7 +122,7 @@ enum rte_dma_dev_state {
  * @internal
  * The generic data structure associated with each DMA device.
  */
-struct rte_dma_dev {
+struct __rte_cache_aligned rte_dma_dev {
 	/** Device info which supplied during device initialization. */
 	struct rte_device *device;
 	struct rte_dma_dev_data *data; /**< Pointer to shared device data. */
@@ -132,7 +132,7 @@ struct rte_dma_dev {
 	const struct rte_dma_dev_ops *dev_ops;
 	enum rte_dma_dev_state state; /**< Flag indicating the device state. */
 	uint64_t reserved[2]; /**< Reserved for future fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v3 13/39] distributor: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/distributor/distributor_private.h | 34 ++++++++++++++++++----------------
 lib/distributor/rte_distributor.c     |  5 +++--
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/lib/distributor/distributor_private.h b/lib/distributor/distributor_private.h
index dfeb9b5..07c2c05 100644
--- a/lib/distributor/distributor_private.h
+++ b/lib/distributor/distributor_private.h
@@ -5,6 +5,8 @@
 #ifndef _DIST_PRIV_H_
 #define _DIST_PRIV_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE distributor
@@ -51,10 +53,10 @@
  * the next cache line to worker 0, we pad this out to three cache lines.
  * Only 64-bits of the memory is actually used though.
  */
-union rte_distributor_buffer_single {
+union __rte_cache_aligned rte_distributor_buffer_single {
 	volatile RTE_ATOMIC(int64_t) bufptr64;
 	char pad[RTE_CACHE_LINE_SIZE*3];
-} __rte_cache_aligned;
+};
 
 /*
  * Transfer up to 8 mbufs at a time to/from workers, and
@@ -62,12 +64,12 @@
  */
 #define RTE_DIST_BURST_SIZE 8
 
-struct rte_distributor_backlog {
+struct __rte_cache_aligned rte_distributor_backlog {
 	unsigned int start;
 	unsigned int count;
-	int64_t pkts[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pkts[RTE_DIST_BURST_SIZE];
 	uint16_t *tags; /* will point to second cacheline of inflights */
-} __rte_cache_aligned;
+};
 
 
 struct rte_distributor_returned_pkts {
@@ -113,17 +115,17 @@ enum rte_distributor_match_function {
  * There is a separate cacheline for returns in the burst API.
  */
 struct rte_distributor_buffer {
-	volatile RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= outgoing to worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE];
+		/* <= outgoing to worker */
 
-	int64_t pad1 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad1;    /* <= one cache line  */
 
-	volatile RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= incoming from worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE];
+		/* <= incoming from worker */
 
-	int64_t pad2 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad2;    /* <= one cache line  */
 
-	int count __rte_cache_aligned;       /* <= number of current mbufs */
+	alignas(RTE_CACHE_LINE_SIZE) int count;       /* <= number of current mbufs */
 };
 
 struct rte_distributor {
@@ -138,11 +140,11 @@ struct rte_distributor {
 	 * on the worker core. Second cache line are the backlog
 	 * that are going to go to the worker core.
 	 */
-	uint16_t in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t
+		in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2];
 
-	struct rte_distributor_backlog backlog[RTE_DISTRIB_MAX_WORKERS]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_distributor_backlog
+		backlog[RTE_DISTRIB_MAX_WORKERS];
 
 	struct rte_distributor_buffer bufs[RTE_DISTRIB_MAX_WORKERS];
 
diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index 2ecb95c..b901a4e 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -447,7 +448,7 @@
 	struct rte_mbuf *next_mb = NULL;
 	int64_t next_value = 0;
 	uint16_t new_tag = 0;
-	uint16_t flows[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t flows[RTE_DIST_BURST_SIZE];
 	unsigned int i, j, w, wid, matching_required;
 
 	if (d->alg_type == RTE_DIST_ALG_SINGLE) {
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v3 14/39] acl: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/acl/acl_run.h         | 4 ++--
 lib/acl/acl_run_altivec.h | 6 ++++--
 lib/acl/acl_run_neon.h    | 6 ++++--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 3c30466..2d398ff 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -3,15 +3,17 @@
  * Copyright (C) IBM Corporation 2016.
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _altivec_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t xmm_ones_16;
 	rte_xmm_t range_base;
-} altivec_acl_const __rte_cache_aligned = {
+} altivec_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
index 69d1b6d..63074f8 100644
--- a/lib/acl/acl_run_neon.h
+++ b/lib/acl/acl_run_neon.h
@@ -2,14 +2,16 @@
  * Copyright(c) 2015 Cavium, Inc
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _neon_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t range_base;
-} neon_acl_const __rte_cache_aligned = {
+} neon_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
-- 
1.8.3.1

[PATCH v3 15/39] vhost: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/vhost/vhost.h        | 8 ++++----
 lib/vhost/vhost_crypto.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index 0b13374..4d11f56 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -271,7 +271,7 @@ struct vhost_async {
 /**
  * Structure contains variables relevant to RX/TX virtqueues.
  */
-struct vhost_virtqueue {
+struct __rte_cache_aligned vhost_virtqueue {
 	union {
 		struct vring_desc	*desc;
 		struct vring_packed_desc   *desc_packed;
@@ -349,7 +349,7 @@ struct vhost_virtqueue {
 	struct virtqueue_stats	stats;
 
 	RTE_ATOMIC(bool) irq_pending;
-} __rte_cache_aligned;
+};
 
 /* Virtio device status as per Virtio specification */
 #define VIRTIO_DEVICE_STATUS_RESET		0x00
@@ -477,7 +477,7 @@ struct inflight_mem_info {
  * Device structure contains all configuration information relating
  * to the device.
  */
-struct virtio_net {
+struct __rte_cache_aligned virtio_net {
 	/* Frontend (QEMU) memory and memory region information */
 	struct rte_vhost_memory	*mem;
 	uint64_t		features;
@@ -536,7 +536,7 @@ struct virtio_net {
 	struct rte_vhost_user_extern_ops extern_ops;
 
 	struct vhost_backend_ops *backend_ops;
-} __rte_cache_aligned;
+};
 
 static inline void
 vq_assert_lock__(struct virtio_net *dev, struct vhost_virtqueue *vq, const char *func)
diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
index 3704fbb..eb4a158 100644
--- a/lib/vhost/vhost_crypto.c
+++ b/lib/vhost/vhost_crypto.c
@@ -190,7 +190,7 @@ static int get_iv_len(enum rte_crypto_cipher_algorithm algo)
  * one DPDK crypto device that deals with all crypto workloads. It is declared
  * here and defined in vhost_crypto.c
  */
-struct vhost_crypto {
+struct __rte_cache_aligned vhost_crypto {
 	/** Used to lookup DPDK Cryptodev Session based on VIRTIO crypto
 	 *  session ID.
 	 */
@@ -213,7 +213,7 @@ struct vhost_crypto {
 	struct virtio_net *dev;
 
 	uint8_t option;
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_writeback_data {
 	uint8_t *src;
-- 
1.8.3.1

[PATCH v3 16/39] timer: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/timer/rte_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c
index 53ed221..bb8b6a6 100644
--- a/lib/timer/rte_timer.c
+++ b/lib/timer/rte_timer.c
@@ -24,7 +24,7 @@
 /**
  * Per-lcore info for timers.
  */
-struct priv_timer {
+struct __rte_cache_aligned priv_timer {
 	struct rte_timer pending_head;  /**< dummy timer instance to head up list */
 	rte_spinlock_t list_lock;       /**< lock to protect list access */
 
@@ -44,7 +44,7 @@ struct priv_timer {
 	/** per-lcore statistics */
 	struct rte_timer_debug_stats stats;
 #endif
-} __rte_cache_aligned;
+};
 
 #define FL_ALLOCATED	(1 << 0)
 struct rte_timer_data {
-- 
1.8.3.1

[PATCH v3 17/39] table: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/table/rte_swx_table_learner.c | 4 ++--
 lib/table/rte_table_acl.c         | 3 ++-
 lib/table/rte_table_array.c       | 7 ++++---
 lib/table/rte_table_hash_cuckoo.c | 4 +++-
 lib/table/rte_table_hash_ext.c    | 3 ++-
 lib/table/rte_table_hash_key16.c  | 4 +++-
 lib/table/rte_table_hash_key32.c  | 4 +++-
 lib/table/rte_table_hash_key8.c   | 4 +++-
 lib/table/rte_table_hash_lru.c    | 3 ++-
 lib/table/rte_table_lpm.c         | 3 ++-
 lib/table/rte_table_lpm_ipv6.c    | 3 ++-
 11 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lib/table/rte_swx_table_learner.c b/lib/table/rte_swx_table_learner.c
index 2b5e6bd..55a3645 100644
--- a/lib/table/rte_swx_table_learner.c
+++ b/lib/table/rte_swx_table_learner.c
@@ -145,13 +145,13 @@ struct table_params {
 	size_t total_size;
 };
 
-struct table {
+struct __rte_cache_aligned table {
 	/* Table parameters. */
 	struct table_params params;
 
 	/* Table buckets. */
 	uint8_t buckets[];
-} __rte_cache_aligned;
+};
 
 /* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
  * significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
diff --git a/lib/table/rte_table_acl.c b/lib/table/rte_table_acl.c
index 83411d2..2764cda 100644
--- a/lib/table/rte_table_acl.c
+++ b/lib/table/rte_table_acl.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_acl {
 	uint8_t *acl_rule_memory; /* Memory to store the rules */
 
 	/* Memory to store the action table and stack of free entries */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 
diff --git a/lib/table/rte_table_array.c b/lib/table/rte_table_array.c
index 80bc2a7..31a17d5 100644
--- a/lib/table/rte_table_array.c
+++ b/lib/table/rte_table_array.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -27,7 +28,7 @@
 
 #endif
 
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
 	struct rte_table_stats stats;
 
 	/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
 	uint32_t entry_pos_mask;
 
 	/* Internal table */
-	uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
 
 static void *
 rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
diff --git a/lib/table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
index 0f4900c..d3b60f3 100644
--- a/lib/table/rte_table_hash_cuckoo.c
+++ b/lib/table/rte_table_hash_cuckoo.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -42,7 +44,7 @@ struct rte_table_hash {
 	struct rte_hash *h_table;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
index 2148d83..61e3c79 100644
--- a/lib/table/rte_table_hash_ext.c
+++ b/lib/table/rte_table_hash_ext.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -99,7 +100,7 @@ struct rte_table_hash {
 	uint32_t *bkt_ext_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
index 7734aef..2af34a5 100644
--- a/lib/table/rte_table_hash_key16.c
+++ b/lib/table/rte_table_hash_key16.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
index fcb4348..06e5cf4 100644
--- a/lib/table/rte_table_hash_key32.c
+++ b/lib/table/rte_table_hash_key32.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
index bbe6562..2ab8e1b 100644
--- a/lib/table/rte_table_hash_key8.c
+++ b/lib/table/rte_table_hash_key8.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -79,7 +81,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
index cb4f329..8604a64 100644
--- a/lib/table/rte_table_hash_lru.c
+++ b/lib/table/rte_table_hash_lru.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -76,7 +77,7 @@ struct rte_table_hash {
 	uint32_t *key_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
index b9cff25..978d7e5 100644
--- a/lib/table/rte_table_lpm.c
+++ b/lib/table/rte_table_lpm.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_lpm {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
diff --git a/lib/table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
index e4e823a..1d54f83 100644
--- a/lib/table/rte_table_lpm_ipv6.c
+++ b/lib/table/rte_table_lpm_ipv6.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
-- 
1.8.3.1

[PATCH v3 18/39] reorder: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/reorder/rte_reorder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
index ff81544..905db6c 100644
--- a/lib/reorder/rte_reorder.c
+++ b/lib/reorder/rte_reorder.c
@@ -36,16 +36,16 @@
 int rte_reorder_seqn_dynfield_offset = -1;
 
 /* A generic circular buffer */
-struct cir_buffer {
+struct __rte_cache_aligned cir_buffer {
 	unsigned int size;   /**< Number of entries that can be stored */
 	unsigned int mask;   /**< [buffer_size - 1]: used for wrap-around */
 	unsigned int head;   /**< insertion point in buffer */
 	unsigned int tail;   /**< extraction point in buffer */
 	struct rte_mbuf **entries;
-} __rte_cache_aligned;
+};
 
 /* The reorder buffer data structure itself */
-struct rte_reorder_buffer {
+struct __rte_cache_aligned rte_reorder_buffer {
 	char name[RTE_REORDER_NAMESIZE];
 	uint32_t min_seqn;  /**< Lowest seq. number that can be in the buffer */
 	unsigned int memsize; /**< memory area size of reorder buffer */
@@ -53,7 +53,7 @@ struct rte_reorder_buffer {
 
 	struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */
 	struct cir_buffer order_buf; /**< buffer used to reorder entries */
-} __rte_cache_aligned;
+};
 
 static void
 rte_reorder_free_mbufs(struct rte_reorder_buffer *b);
-- 
1.8.3.1

[PATCH v3 19/39] regexdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/regexdev/rte_regexdev_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
index 15ba712..32eef6e 100644
--- a/lib/regexdev/rte_regexdev_core.h
+++ b/lib/regexdev/rte_regexdev_core.h
@@ -144,13 +144,13 @@ enum rte_regexdev_state {
  * This structure is safe to place in shared memory to be common among different
  * processes in a multi-process configuration.
  */
-struct rte_regexdev_data {
+struct __rte_cache_aligned rte_regexdev_data {
 	void *dev_private; /**< PMD-specific private data. */
 	char dev_name[RTE_REGEXDEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	uint16_t dev_id; /**< Device [external]  identifier. */
 	struct rte_regexdev_config dev_conf; /**< RegEx configuration. */
 	uint8_t dev_started : 1; /**< Device started to work. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
@@ -162,7 +162,7 @@ struct rte_regexdev_data {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_regexdev {
+struct __rte_cache_aligned rte_regexdev {
 	regexdev_enqueue_t enqueue;
 	regexdev_dequeue_t dequeue;
 	const struct rte_regexdev_ops *dev_ops;
@@ -170,7 +170,7 @@ struct rte_regexdev {
 	struct rte_device *device; /**< Backing device */
 	enum rte_regexdev_state state; /**< The device state. */
 	struct rte_regexdev_data *data;  /**< Pointer to device data. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v3 20/39] rcu: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/rcu/rte_rcu_qsbr.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
index 23c9f89..f6e6ab3 100644
--- a/lib/rcu/rte_rcu_qsbr.h
+++ b/lib/rcu/rte_rcu_qsbr.h
@@ -21,6 +21,8 @@
  * entered quiescent state.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -69,7 +71,7 @@
 #define RTE_QSBR_THRID_INVALID 0xffffffff
 
 /* Worker thread counter */
-struct rte_rcu_qsbr_cnt {
+struct __rte_cache_aligned rte_rcu_qsbr_cnt {
 	RTE_ATOMIC(uint64_t) cnt;
 	/**< Quiescent state counter. Value 0 indicates the thread is offline
 	 *   64b counter is used to avoid adding more code to address
@@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt {
 	 */
 	RTE_ATOMIC(uint32_t) lock_cnt;
 	/**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */
-} __rte_cache_aligned;
+};
 
 #define __RTE_QSBR_CNT_THR_OFFLINE 0
 #define __RTE_QSBR_CNT_INIT 1
@@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt {
  * 1) Quiescent state counter array
  * 2) Register thread ID array
  */
-struct rte_rcu_qsbr {
-	RTE_ATOMIC(uint64_t) token __rte_cache_aligned;
+struct __rte_cache_aligned rte_rcu_qsbr {
+	alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token;
 	/**< Counter to allow for multiple concurrent quiescent state queries */
 	RTE_ATOMIC(uint64_t) acked_token;
 	/**< Least token acked by all the threads in the last call to
 	 *   rte_rcu_qsbr_check API.
 	 */
 
-	uint32_t num_elems __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems;
 	/**< Number of elements in the thread ID array */
 	RTE_ATOMIC(uint32_t) num_threads;
 	/**< Number of threads currently using this QS variable */
 	uint32_t max_threads;
 	/**< Maximum number of threads using this QS variable */
 
-	struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0];
 	/**< Quiescent state counter array of 'max_threads' elements */
 
 	/**< Registered thread IDs are stored in a bitmap array,
 	 *   after the quiescent state counter array.
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Call back function called to free the resources.
-- 
1.8.3.1

[PATCH v3 21/39] power: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/power/power_acpi_cpufreq.c       | 4 ++--
 lib/power/power_amd_pstate_cpufreq.c | 4 ++--
 lib/power/power_cppc_cpufreq.c       | 4 ++--
 lib/power/power_intel_uncore.c       | 4 ++--
 lib/power/power_pstate_cpufreq.c     | 4 ++--
 lib/power/rte_power_pmd_mgmt.c       | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
index f8d978d..81996e1 100644
--- a/lib/power/power_acpi_cpufreq.c
+++ b/lib/power/power_acpi_cpufreq.c
@@ -41,7 +41,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct acpi_power_info {
+struct __rte_cache_aligned acpi_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -51,7 +51,7 @@ struct acpi_power_info {
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
-} __rte_cache_aligned;
+};
 
 static struct acpi_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
index 028f844..090a0d9 100644
--- a/lib/power/power_amd_pstate_cpufreq.c
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -45,7 +45,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct amd_pstate_power_info {
+struct __rte_cache_aligned amd_pstate_power_info {
 	uint32_t lcore_id;                   /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -58,7 +58,7 @@ struct amd_pstate_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c
index 3ddf39b..32aaacb 100644
--- a/lib/power/power_cppc_cpufreq.c
+++ b/lib/power/power_cppc_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct cppc_power_info {
+struct __rte_cache_aligned cppc_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -61,7 +61,7 @@ struct cppc_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_intel_uncore.c b/lib/power/power_intel_uncore.c
index 3ce8fcc..9c152e4 100644
--- a/lib/power/power_intel_uncore.c
+++ b/lib/power/power_intel_uncore.c
@@ -29,7 +29,7 @@
 		"/sys/devices/system/cpu/intel_uncore_frequency/package_%02u_die_%02u/initial_min_freq_khz"
 
 
-struct uncore_power_info {
+struct __rte_cache_aligned uncore_power_info {
 	unsigned int die;                  /* Core die id */
 	unsigned int pkg;                  /* Package id */
 	uint32_t freqs[MAX_UNCORE_FREQS];  /* Frequency array */
@@ -41,7 +41,7 @@ struct uncore_power_info {
 	uint32_t org_max_freq;             /* Original max freq of uncore */
 	uint32_t init_max_freq;            /* System max uncore freq */
 	uint32_t init_min_freq;            /* System min uncore freq */
-} __rte_cache_aligned;
+};
 
 static struct uncore_power_info uncore_info[RTE_MAX_NUMA_NODES][MAX_NUMA_DIE];
 
diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
index 73138dc..2343121 100644
--- a/lib/power/power_pstate_cpufreq.c
+++ b/lib/power/power_pstate_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 	POWER_UNKNOWN
 };
 
-struct pstate_power_info {
+struct __rte_cache_aligned pstate_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -64,7 +64,7 @@ struct pstate_power_info {
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint16_t priority_core;              /**< High Performance core */
-} __rte_cache_aligned;
+};
 
 
 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index 591fc69..b1c18a5 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -55,7 +55,7 @@ struct queue_list_entry {
 	const struct rte_eth_rxtx_callback *cb;
 };
 
-struct pmd_core_cfg {
+struct __rte_cache_aligned pmd_core_cfg {
 	TAILQ_HEAD(queue_list_head, queue_list_entry) head;
 	/**< List of queues associated with this lcore */
 	size_t n_queues;
@@ -68,7 +68,7 @@ struct pmd_core_cfg {
 	/**< Number of queues ready to enter power optimized state */
 	uint64_t sleep_target;
 	/**< Prevent a queue from triggering sleep multiple times */
-} __rte_cache_aligned;
+};
 static struct pmd_core_cfg lcore_cfgs[RTE_MAX_LCORE];
 
 static inline bool
-- 
1.8.3.1

[PATCH v3 22/39] rawdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/rawdev/rte_rawdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
index 7d5764d..640037b 100644
--- a/lib/rawdev/rte_rawdev.h
+++ b/lib/rawdev/rte_rawdev.h
@@ -279,7 +279,7 @@
  * It is a placeholder for PMD specific data, encapsulating only information
  * related to framework.
  */
-struct rte_rawdev {
+struct __rte_cache_aligned rte_rawdev {
 	/**< Socket ID where memory is allocated */
 	int socket_id;
 	/**< Device ID for this instance */
@@ -300,7 +300,7 @@ struct rte_rawdev {
 	rte_rawdev_obj_t dev_private;
 	/**< Device name */
 	char name[RTE_RAWDEV_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 /** @internal The pool of rte_rawdev structures. */
 extern struct rte_rawdev *rte_rawdevs;
-- 
1.8.3.1

[PATCH v3 23/39] port: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/port/rte_port_frag.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index 883601a..0940f94 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -34,7 +34,7 @@
 			struct rte_mempool *pool_direct,
 			struct rte_mempool *pool_indirect);
 
-struct rte_port_ring_reader_frag {
+struct __rte_cache_aligned rte_port_ring_reader_frag {
 	struct rte_port_in_stats stats;
 
 	/* Input parameters */
@@ -53,7 +53,7 @@ struct rte_port_ring_reader_frag {
 	uint32_t pos_frags;
 
 	frag_op f_frag;
-} __rte_cache_aligned;
+};
 
 static void *
 rte_port_ring_reader_frag_create(void *params, int socket_id, int is_ipv4)
-- 
1.8.3.1

[PATCH v3 24/39] pdcp: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/pdcp/rte_pdcp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/pdcp/rte_pdcp.h b/lib/pdcp/rte_pdcp.h
index dd8b6e4..f74524f 100644
--- a/lib/pdcp/rte_pdcp.h
+++ b/lib/pdcp/rte_pdcp.h
@@ -49,7 +49,7 @@ typedef uint16_t (*rte_pdcp_post_p_t)(const struct rte_pdcp_entity *entity,
  * A PDCP entity is associated either to the control plane or the user plane
  * depending on which radio bearer it is carrying data for.
  */
-struct rte_pdcp_entity {
+struct __rte_cache_aligned rte_pdcp_entity {
 	/** Entity specific pre-process handle. */
 	rte_pdcp_pre_p_t pre_process;
 	/** Entity specific post-process handle. */
@@ -66,7 +66,7 @@ struct rte_pdcp_entity {
 	 * hold additionally 'max_pkt_cache' number of packets.
 	 */
 	uint32_t max_pkt_cache;
-} __rte_cache_aligned;
+};
 
 /**
  * Callback function type for t-Reordering timer start, set during PDCP entity establish.
-- 
1.8.3.1

[PATCH v3 25/39] node: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/node/node_private.h | 4 ++--
 lib/node/pkt_cls.c      | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/node/node_private.h b/lib/node/node_private.h
index 73563e4..195ac23 100644
--- a/lib/node/node_private.h
+++ b/lib/node/node_private.h
@@ -49,9 +49,9 @@ struct node_mbuf_priv1 {
 /**
  * Node mbuf private area 2.
  */
-struct node_mbuf_priv2 {
+struct __rte_cache_aligned node_mbuf_priv2 {
 	uint64_t priv_data;
-} __rte_cache_aligned;
+};
 
 #define NODE_MBUF_PRIV2_SIZE sizeof(struct node_mbuf_priv2)
 
diff --git a/lib/node/pkt_cls.c b/lib/node/pkt_cls.c
index a8302b8..9d21b7f 100644
--- a/lib/node/pkt_cls.c
+++ b/lib/node/pkt_cls.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2020 Marvell.
  */
 
+#include <stdalign.h>
+
 #include <rte_graph.h>
 #include <rte_graph_worker.h>
 
@@ -9,7 +11,7 @@
 #include "node_private.h"
 
 /* Next node for each ptype, default is '0' is "pkt_drop" */
-static const uint8_t p_nxt[256] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint8_t p_nxt[256] = {
 	[RTE_PTYPE_L3_IPV4] = PKT_CLS_NEXT_IP4_LOOKUP,
 
 	[RTE_PTYPE_L3_IPV4_EXT] = PKT_CLS_NEXT_IP4_LOOKUP,
-- 
1.8.3.1

[PATCH v3 26/39] mldev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/mldev/rte_mldev.h      | 4 ++--
 lib/mldev/rte_mldev_core.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/mldev/rte_mldev.h b/lib/mldev/rte_mldev.h
index 5cf6f05..457dc01 100644
--- a/lib/mldev/rte_mldev.h
+++ b/lib/mldev/rte_mldev.h
@@ -421,7 +421,7 @@ struct rte_ml_buff_seg {
  * This structure contains data related to performing an ML operation on the buffers using
  * the model specified through model_id.
  */
-struct rte_ml_op {
+struct __rte_cache_aligned rte_ml_op {
 	uint16_t model_id;
 	/**< Model ID to be used for the operation. */
 	uint16_t nb_batches;
@@ -469,7 +469,7 @@ struct rte_ml_op {
 	 * dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-} __rte_cache_aligned;
+};
 
 /* Enqueue/Dequeue operations */
 
diff --git a/lib/mldev/rte_mldev_core.h b/lib/mldev/rte_mldev_core.h
index 2279b1d..b3bd281 100644
--- a/lib/mldev/rte_mldev_core.h
+++ b/lib/mldev/rte_mldev_core.h
@@ -626,7 +626,7 @@ struct rte_ml_dev_data {
  *
  * The data structure associated with each ML device.
  */
-struct rte_ml_dev {
+struct __rte_cache_aligned rte_ml_dev {
 	/** Pointer to PMD enqueue function. */
 	mldev_enqueue_t enqueue_burst;
 
@@ -647,7 +647,7 @@ struct rte_ml_dev {
 
 	/** Flag indicating the device is attached. */
 	__extension__ uint8_t attached : 1;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v3 27/39] mempool: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index 6fa4d48..23fd5c8 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -34,6 +34,7 @@
  * user cache created with rte_mempool_cache_create().
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <inttypes.h>
@@ -66,7 +67,7 @@
  * captured since they can be calculated from other stats.
  * For example: put_cache_objs = put_objs - put_common_pool_objs.
  */
-struct rte_mempool_debug_stats {
+struct __rte_cache_aligned rte_mempool_debug_stats {
 	uint64_t put_bulk;             /**< Number of puts. */
 	uint64_t put_objs;             /**< Number of objects successfully put. */
 	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
@@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
 	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
 	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 #endif
 
 /**
  * A structure that stores a per-core object cache.
  */
-struct rte_mempool_cache {
+struct __rte_cache_aligned rte_mempool_cache {
 	uint32_t size;	      /**< Size of the cache */
 	uint32_t flushthresh; /**< Threshold before we flush excess elements */
 	uint32_t len;	      /**< Current cache count */
@@ -109,8 +110,8 @@ struct rte_mempool_cache {
 	 * Cache is allocated to this size to allow it to overflow in certain
 	 * cases to avoid needless emptying of cache.
 	 */
-	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
+};
 
 /**
  * A structure that stores the size of mempool elements.
@@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
  * The structure is cache-line aligned to avoid ABI breakages in
  * a number of cases when something small is added.
  */
-struct rte_mempool_info {
+struct __rte_cache_aligned rte_mempool_info {
 	/** Number of objects in the contiguous block */
 	unsigned int contig_block_size;
-} __rte_cache_aligned;
+};
 
 /**
  * The RTE mempool structure.
  */
-struct rte_mempool {
+struct __rte_cache_aligned rte_mempool {
 	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
 	union {
 		void *pool_data;         /**< Ring or pool to store objects. */
@@ -268,7 +269,7 @@ struct rte_mempool {
 	 */
 	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
 #endif
-}  __rte_cache_aligned;
+};
 
 /** Spreading among memory channels not required. */
 #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
@@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
 
 
 /** Structure defining mempool operations structure */
-struct rte_mempool_ops {
+struct __rte_cache_aligned rte_mempool_ops {
 	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
 	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
 	rte_mempool_free_t free;         /**< Free the external pool. */
@@ -713,7 +714,7 @@ struct rte_mempool_ops {
 	 * Dequeue a number of contiguous object blocks.
 	 */
 	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
-} __rte_cache_aligned;
+};
 
 #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
 
@@ -726,14 +727,14 @@ struct rte_mempool_ops {
  * any function pointers stored directly in the mempool struct would not be.
  * This results in us simply having "ops_index" in the mempool struct.
  */
-struct rte_mempool_ops_table {
+struct __rte_cache_aligned rte_mempool_ops_table {
 	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
 	uint32_t num_ops;      /**< Number of used ops structs in the table. */
 	/**
 	 * Storage for all possible ops structs.
 	 */
 	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
-} __rte_cache_aligned;
+};
 
 /** Array of registered ops structs. */
 extern struct rte_mempool_ops_table rte_mempool_ops_table;
-- 
1.8.3.1

[PATCH v3 28/39] member: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/member/rte_member.h        | 8 ++++----
 lib/member/rte_member_ht.h     | 4 ++--
 lib/member/rte_member_sketch.c | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/member/rte_member.h b/lib/member/rte_member.h
index 3278bbb..aec192e 100644
--- a/lib/member/rte_member.h
+++ b/lib/member/rte_member.h
@@ -139,7 +139,7 @@ typedef void (*sketch_delete_fn_t)(const struct rte_member_setsum *ss,
 				   const void *key);
 
 /** @internal setsummary structure. */
-struct rte_member_setsum {
+struct __rte_cache_aligned rte_member_setsum {
 	enum rte_member_setsum_type type; /* Type of the set summary. */
 	uint32_t key_len;		/* Length of key. */
 	uint32_t prim_hash_seed;	/* Primary hash function seed. */
@@ -185,14 +185,14 @@ struct rte_member_setsum {
 #ifdef RTE_ARCH_X86
 	bool use_avx512;
 #endif
-} __rte_cache_aligned;
+};
 
 /**
  * Parameters used when create the set summary table. Currently user can
  * specify two types of setsummary: HT based and vBF. For HT based, user can
  * specify cache or non-cache mode. Here is a table to describe some differences
  */
-struct rte_member_parameters {
+struct __rte_cache_aligned rte_member_parameters {
 	const char *name;			/**< Name of the hash. */
 
 	/**
@@ -326,7 +326,7 @@ struct rte_member_parameters {
 	uint32_t extra_flag;
 
 	int socket_id;			/**< NUMA Socket ID for memory. */
-} __rte_cache_aligned;
+};
 
 /**
  * Find an existing set-summary and return a pointer to it.
diff --git a/lib/member/rte_member_ht.h b/lib/member/rte_member_ht.h
index 9e24ccd..c9673e3 100644
--- a/lib/member/rte_member_ht.h
+++ b/lib/member/rte_member_ht.h
@@ -15,10 +15,10 @@
 typedef uint16_t member_sig_t;			/* signature size is 16 bit */
 
 /* The bucket struct for ht setsum */
-struct member_ht_bucket {
+struct __rte_cache_aligned member_ht_bucket {
 	member_sig_t sigs[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte signature */
 	member_set_t sets[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte set */
-} __rte_cache_aligned;
+};
 
 int
 rte_member_create_ht(struct rte_member_setsum *ss,
diff --git a/lib/member/rte_member_sketch.c b/lib/member/rte_member_sketch.c
index e006e83..15af678 100644
--- a/lib/member/rte_member_sketch.c
+++ b/lib/member/rte_member_sketch.c
@@ -23,7 +23,7 @@
 #include "rte_member_sketch_avx512.h"
 #endif /* CC_AVX512_SUPPORT */
 
-struct sketch_runtime {
+struct __rte_cache_aligned sketch_runtime {
 	uint64_t pkt_cnt;
 	uint32_t until_next;
 	int converged;
@@ -31,7 +31,7 @@ struct sketch_runtime {
 	struct node *report_array;
 	void *key_slots;
 	struct rte_ring *free_key_slots;
-} __rte_cache_aligned;
+};
 
 /*
  * Geometric sampling to calculate how many packets needs to be
-- 
1.8.3.1

[PATCH v3 29/39] lpm: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/lpm/rte_lpm.h  | 5 +++--
 lib/lpm/rte_lpm6.c | 8 ++++----
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index f57977b..f311fd9 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -11,6 +11,7 @@
  * RTE Longest Prefix Match (LPM)
  */
 
+#include <stdalign.h>
 #include <errno.h>
 #include <stdint.h>
 
@@ -118,8 +119,8 @@ struct rte_lpm_config {
 /** @internal LPM structure. */
 struct rte_lpm {
 	/* LPM Tables. */
-	struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 	struct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */
 };
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 271bc48..ed5970c 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -98,16 +98,16 @@ struct rte_lpm6 {
 
 	/* LPM Tables. */
 	struct rte_hash *rules_tbl; /**< LPM rules. */
-	struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 
 	uint32_t *tbl8_pool; /**< pool of indexes of free tbl8s */
 	uint32_t tbl8_pool_pos; /**< current position in the tbl8 pool */
 
 	struct rte_lpm_tbl8_hdr *tbl8_hdrs; /* array of tbl8 headers */
 
-	struct rte_lpm6_tbl_entry tbl8[0]
-			__rte_cache_aligned; /**< LPM tbl8 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl8[0];
+			/**< LPM tbl8 table. */
 };
 
 /*
-- 
1.8.3.1

[PATCH v3 30/39] ipsec: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ipsec/rte_ipsec.h | 4 ++--
 lib/ipsec/sa.h        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index 44cecab..f15f6f2 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
  * - pointer to security/crypto session, plus other related data
  * - session/device specific functions to prepare/process IPsec packets.
  */
-struct rte_ipsec_session {
+struct __rte_cache_aligned rte_ipsec_session {
 	/**
 	 * SA that session belongs to.
 	 * Note that multiple sessions can belong to the same SA.
@@ -77,7 +77,7 @@ struct rte_ipsec_session {
 	};
 	/** functions to prepare/process IPsec packets */
 	struct rte_ipsec_sa_pkt_func pkt_func;
-} __rte_cache_aligned;
+};
 
 /**
  * Checks that inside given rte_ipsec_session crypto/security fields
diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
index 4b30bea..2560d33 100644
--- a/lib/ipsec/sa.h
+++ b/lib/ipsec/sa.h
@@ -75,7 +75,7 @@ enum sa_algo_type	{
 	ALGO_TYPE_MAX
 };
 
-struct rte_ipsec_sa {
+struct __rte_cache_aligned rte_ipsec_sa {
 
 	uint64_t type;     /* type of given SA */
 	uint64_t udata;    /* user defined */
@@ -141,7 +141,7 @@ struct rte_ipsec_sa {
 		} errors;
 	} statistics;
 
-} __rte_cache_aligned;
+};
 
 int
 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
-- 
1.8.3.1

[PATCH v3 31/39] jobstats: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/jobstats/rte_jobstats.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/jobstats/rte_jobstats.h b/lib/jobstats/rte_jobstats.h
index 45b460e..bdd85fe 100644
--- a/lib/jobstats/rte_jobstats.h
+++ b/lib/jobstats/rte_jobstats.h
@@ -32,7 +32,7 @@
 typedef void (*rte_job_update_period_cb_t)(struct rte_jobstats *job,
 		int64_t job_result);
 
-struct rte_jobstats {
+struct __rte_cache_aligned rte_jobstats {
 	uint64_t period;
 	/**< Estimated period of execution. */
 
@@ -65,9 +65,9 @@ struct rte_jobstats {
 
 	struct rte_jobstats_context *context;
 	/**< Job stats context object that is executing this job. */
-} __rte_cache_aligned;
+};
 
-struct rte_jobstats_context {
+struct __rte_cache_aligned rte_jobstats_context {
 	/** Variable holding time at different points:
 	 * -# loop start time if loop was started but no job executed yet.
 	 * -# job start time if job is currently executing.
@@ -111,7 +111,7 @@ struct rte_jobstats_context {
 
 	uint64_t loop_cnt;
 	/**< Total count of executed loops with at least one executed job. */
-} __rte_cache_aligned;
+};
 
 /**
  * Initialize given context object with default values.
-- 
1.8.3.1

[PATCH v3 32/39] bpf: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/bpf/bpf_pkt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
index 793a75d..aaca935 100644
--- a/lib/bpf/bpf_pkt.c
+++ b/lib/bpf/bpf_pkt.c
@@ -23,7 +23,7 @@
  * information about installed BPF rx/tx callback
  */
 
-struct bpf_eth_cbi {
+struct __rte_cache_aligned bpf_eth_cbi {
 	/* used by both data & control path */
 	RTE_ATOMIC(uint32_t) use;    /*usage counter */
 	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
@@ -33,7 +33,7 @@ struct bpf_eth_cbi {
 	LIST_ENTRY(bpf_eth_cbi) link;
 	uint16_t port;
 	uint16_t queue;
-} __rte_cache_aligned;
+};
 
 /*
  * Odd number means that callback is used by datapath.
-- 
1.8.3.1

[PATCH v3 33/39] compressdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/compressdev/rte_comp.h                 | 4 ++--
 lib/compressdev/rte_compressdev_internal.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
index 3606ebf..830a240 100644
--- a/lib/compressdev/rte_comp.h
+++ b/lib/compressdev/rte_comp.h
@@ -356,7 +356,7 @@ struct rte_comp_xform {
  * Comp operations are enqueued and dequeued in comp PMDs using the
  * rte_compressdev_enqueue_burst() / rte_compressdev_dequeue_burst() APIs
  */
-struct rte_comp_op {
+struct __rte_cache_aligned rte_comp_op {
 	enum rte_comp_op_type op_type;
 	union {
 		void *private_xform;
@@ -478,7 +478,7 @@ struct rte_comp_op {
 	 * will be set to RTE_COMP_OP_STATUS_SUCCESS after operation
 	 * is successfully processed by a PMD
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Creates an operation pool
diff --git a/lib/compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
index 01b7764..8a626d3 100644
--- a/lib/compressdev/rte_compressdev_internal.h
+++ b/lib/compressdev/rte_compressdev_internal.h
@@ -69,7 +69,7 @@ typedef uint16_t (*compressdev_enqueue_pkt_burst_t)(void *qp,
 		struct rte_comp_op **ops, uint16_t nb_ops);
 
 /** The data structure associated with each comp device. */
-struct rte_compressdev {
+struct __rte_cache_aligned rte_compressdev {
 	compressdev_dequeue_pkt_burst_t dequeue_burst;
 	/**< Pointer to PMD receive function */
 	compressdev_enqueue_pkt_burst_t enqueue_burst;
@@ -87,7 +87,7 @@ struct rte_compressdev {
 	__extension__
 	uint8_t attached : 1;
 	/**< Flag indicating the device is attached */
-} __rte_cache_aligned;
+};
 
 /**
  *
@@ -96,7 +96,7 @@ struct rte_compressdev {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_compressdev_data {
+struct __rte_cache_aligned rte_compressdev_data {
 	uint8_t dev_id;
 	/**< Compress device identifier */
 	int socket_id;
@@ -115,7 +115,7 @@ struct rte_compressdev_data {
 
 	void *dev_private;
 	/**< PMD-specific private data */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
-- 
1.8.3.1

[PATCH v3 34/39] cryptodev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/cryptodev/cryptodev_pmd.h      | 8 ++++----
 lib/cryptodev/rte_cryptodev_core.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 0732b35..6229ad4 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -61,7 +61,7 @@ struct rte_cryptodev_pmd_init_params {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_cryptodev_data {
+struct __rte_cache_aligned rte_cryptodev_data {
 	/** Device ID for this instance */
 	uint8_t dev_id;
 	/** Socket ID where memory is allocated */
@@ -82,10 +82,10 @@ struct rte_cryptodev_data {
 
 	/** PMD-specific private data */
 	void *dev_private;
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
+struct __rte_cache_aligned rte_cryptodev {
 	/** Pointer to PMD dequeue function. */
 	dequeue_pkt_burst_t dequeue_burst;
 	/** Pointer to PMD enqueue function. */
@@ -117,7 +117,7 @@ struct rte_cryptodev {
 	struct rte_cryptodev_cb_rcu *enq_cbs;
 	/** User application callback for post dequeue processing */
 	struct rte_cryptodev_cb_rcu *deq_cbs;
-} __rte_cache_aligned;
+};
 
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index 5de89d0..8d7e58d 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -40,7 +40,7 @@ struct rte_cryptodev_qpdata {
 	struct rte_cryptodev_cb_rcu *deq_cb;
 };
 
-struct rte_crypto_fp_ops {
+struct __rte_cache_aligned rte_crypto_fp_ops {
 	/** PMD enqueue burst function. */
 	enqueue_pkt_burst_t enqueue_burst;
 	/** PMD dequeue burst function. */
@@ -49,7 +49,7 @@ struct rte_crypto_fp_ops {
 	struct rte_cryptodev_qpdata qp;
 	/** Reserved for future ops. */
 	uintptr_t reserved[3];
-} __rte_cache_aligned;
+};
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v3 35/39] dispatcher: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/dispatcher/rte_dispatcher.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index 95dd41b..4061a73 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -41,14 +41,14 @@ struct rte_dispatcher_finalizer {
 	void *finalize_data;
 };
 
-struct rte_dispatcher_lcore {
+struct __rte_cache_aligned rte_dispatcher_lcore {
 	uint8_t num_ports;
 	uint16_t num_handlers;
 	int32_t prio_count;
 	struct rte_dispatcher_lcore_port ports[EVD_MAX_PORTS_PER_LCORE];
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
-} __rte_cache_aligned;
+};
 
 struct rte_dispatcher {
 	uint8_t event_dev_id;
-- 
1.8.3.1

[PATCH v3 36/39] fib: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@ struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@ struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t
-- 
1.8.3.1

[PATCH v3 37/39] gpudev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/gpudev/gpudev_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h
index 0b1e7f2..37b6ae3 100644
--- a/lib/gpudev/gpudev_driver.h
+++ b/lib/gpudev/gpudev_driver.h
@@ -72,7 +72,7 @@ struct rte_gpu_mpshared {
 	RTE_ATOMIC(uint16_t) process_refcnt; /* Updated by this library. */
 };
 
-struct rte_gpu {
+struct __rte_cache_aligned rte_gpu {
 	/* Backing device. */
 	struct rte_device *device;
 	/* Data shared between processes. */
@@ -85,7 +85,7 @@ struct rte_gpu {
 	enum rte_gpu_state process_state; /* Updated by this library. */
 	/* Driver-specific private data for the running process. */
 	void *process_private;
-} __rte_cache_aligned;
+};
 
 __rte_internal
 struct rte_gpu *rte_gpu_get_by_name(const char *name);
-- 
1.8.3.1

[PATCH v3 38/39] graph: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/graph/graph_private.h           |  4 ++--
 lib/graph/graph_stats.c             |  4 ++--
 lib/graph/rte_graph.h               |  4 ++--
 lib/graph/rte_graph_worker_common.h | 17 ++++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/graph/graph_private.h b/lib/graph/graph_private.h
index fb88d4b..7e4d9f8 100644
--- a/lib/graph/graph_private.h
+++ b/lib/graph/graph_private.h
@@ -71,11 +71,11 @@ struct node {
  * Structure that holds the graph scheduling workqueue node stream.
  * Used for mcore dispatch model.
  */
-struct graph_mcore_dispatch_wq_node {
+struct __rte_cache_aligned graph_mcore_dispatch_wq_node {
 	rte_graph_off_t node_off;
 	uint16_t nb_objs;
 	void *objs[RTE_GRAPH_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/graph/graph_stats.c b/lib/graph/graph_stats.c
index cc32245..2fb808b 100644
--- a/lib/graph/graph_stats.c
+++ b/lib/graph/graph_stats.c
@@ -28,7 +28,7 @@ struct cluster_node {
 	struct rte_node *nodes[];
 };
 
-struct rte_graph_cluster_stats {
+struct __rte_cache_aligned rte_graph_cluster_stats {
 	/* Header */
 	rte_graph_cluster_stats_cb_t fn;
 	uint32_t cluster_node_size; /* Size of struct cluster_node */
@@ -38,7 +38,7 @@ struct rte_graph_cluster_stats {
 	size_t sz;
 
 	struct cluster_node clusters[];
-} __rte_cache_aligned;
+};
 
 #define boarder_model_dispatch()                                                              \
 	fprintf(f, "+-------------------------------+---------------+--------" \
diff --git a/lib/graph/rte_graph.h b/lib/graph/rte_graph.h
index 2d37d5e..ecfec20 100644
--- a/lib/graph/rte_graph.h
+++ b/lib/graph/rte_graph.h
@@ -200,7 +200,7 @@ struct rte_graph_cluster_stats_param {
  *
  * @see struct rte_graph_cluster_stats_param::fn
  */
-struct rte_graph_cluster_node_stats {
+struct __rte_cache_aligned rte_graph_cluster_node_stats {
 	uint64_t ts;	    /**< Current timestamp. */
 	uint64_t calls;	    /**< Current number of calls made. */
 	uint64_t objs;      /**< Current number of objs processed. */
@@ -225,7 +225,7 @@ struct rte_graph_cluster_node_stats {
 	rte_node_t id;	/**< Node identifier of stats. */
 	uint64_t hz;	/**< Cycles per seconds. */
 	char name[RTE_NODE_NAMESIZE];	/**< Name of the node. */
-} __rte_cache_aligned;
+};
 
 /**
  * Create Graph.
diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_worker_common.h
index 4045a7a..36d864e 100644
--- a/lib/graph/rte_graph_worker_common.h
+++ b/lib/graph/rte_graph_worker_common.h
@@ -12,6 +12,8 @@
  * process, enqueue and move streams of objects to the next nodes.
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_cycles.h>
 #include <rte_prefetch.h>
@@ -43,7 +45,7 @@
  *
  * Data structure to hold graph data.
  */
-struct rte_graph {
+struct __rte_cache_aligned rte_graph {
 	/* Fast path area. */
 	uint32_t tail;		     /**< Tail of circular buffer. */
 	uint32_t head;		     /**< Head of circular buffer. */
@@ -57,7 +59,8 @@ struct rte_graph {
 	union {
 		/* Fast schedule area for mcore dispatch model */
 		struct {
-			struct rte_graph_rq_head *rq __rte_cache_aligned; /* The run-queue */
+			alignas(RTE_CACHE_LINE_SIZE) struct rte_graph_rq_head *rq;
+				/* The run-queue */
 			struct rte_graph_rq_head rq_head; /* The head for run-queue list */
 
 			unsigned int lcore_id;  /**< The graph running Lcore. */
@@ -77,14 +80,14 @@ struct rte_graph {
 	uint64_t nb_pkt_to_capture;
 	char pcap_filename[RTE_GRAPH_PCAP_FILE_SZ];  /**< Pcap filename. */
 	uint64_t fence;			/**< Fence. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
  *
  * Data structure to hold node data.
  */
-struct rte_node {
+struct __rte_cache_aligned rte_node {
 	/* Slow path area  */
 	uint64_t fence;		/**< Fence. */
 	rte_graph_off_t next;	/**< Index to next node. */
@@ -109,7 +112,7 @@ struct rte_node {
 	};
 	/* Fast path area  */
 #define RTE_NODE_CTX_SZ 16
-	uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Context. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t ctx[RTE_NODE_CTX_SZ]; /**< Node Context. */
 	uint16_t size;		/**< Total number of objects available. */
 	uint16_t idx;		/**< Number of objects used. */
 	rte_graph_off_t off;	/**< Offset of node in the graph reel. */
@@ -124,8 +127,8 @@ struct rte_node {
 			rte_node_process_t process; /**< Process function. */
 			uint64_t process_u64;
 		};
-	struct rte_node *nodes[] __rte_cache_min_aligned; /**< Next nodes. */
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) struct rte_node *nodes[]; /**< Next nodes. */
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v3 39/39] ip_frag: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/ip_frag/ip_reassembly.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
index a9f97ae..5443c73 100644
--- a/lib/ip_frag/ip_reassembly.h
+++ b/lib/ip_frag/ip_reassembly.h
@@ -47,7 +47,7 @@ struct ip_frag_key {
  * Fragmented packet to reassemble.
  * First two entries in the frags[] array are for the last and first fragments.
  */
-struct ip_frag_pkt {
+struct __rte_cache_aligned ip_frag_pkt {
 	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
 	struct ip_frag_key key;                /* fragmentation key */
 	uint64_t start;                        /* creation timestamp */
@@ -55,20 +55,20 @@ struct ip_frag_pkt {
 	uint32_t frag_size;                    /* size of fragments received */
 	uint32_t last_idx;                     /* index of next entry to fill */
 	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
-} __rte_cache_aligned;
+};
 
  /* fragments tailq */
 RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
 
 /* fragmentation table statistics */
-struct ip_frag_tbl_stat {
+struct __rte_cache_aligned ip_frag_tbl_stat {
 	uint64_t find_num;     /* total # of find/insert attempts. */
 	uint64_t add_num;      /* # of add ops. */
 	uint64_t del_num;      /* # of del ops. */
 	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
 	uint64_t fail_total;   /* total # of add failures. */
 	uint64_t fail_nospace; /* # of 'no space' add failures. */
-} __rte_cache_aligned;
+};
 
 /* fragmentation table */
 struct rte_ip_frag_tbl {
-- 
1.8.3.1

RE: [PATCH v3 39/39] ip_frag: use C11 alignas

[Morten Brørup]

> From: Tyler Retzlaff [mailto:roretzla@linux.microsoft.com]
> Sent: Wednesday, 14 February 2024 08.06
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain
> being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---

Series-acked-by: Morten Brørup <mb@smartsharesystems.com>

Re: [PATCH v3 15/39] vhost: use C11 alignas

[Maxime Coquelin]

On 2/14/24 08:05, Tyler Retzlaff wrote:
> * Move __rte_aligned from the end of {struct,union} definitions to
>    be between {struct,union} and tag.
> 
>    The placement between {struct,union} and the tag allows the desired
>    alignment to be imparted on the type regardless of the toolchain being
>    used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---
>   lib/vhost/vhost.h        | 8 ++++----
>   lib/vhost/vhost_crypto.c | 4 ++--
>   2 files changed, 6 insertions(+), 6 deletions(-)
> 

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v3 08/39] mbuf: remove unnecessary explicit alignment

[David Marchand]

On Wed, Feb 14, 2024 at 8:07 AM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> Remove explicit alignment with __rte_aligned(sizeof(T)) on buf_iova
> field in the absence of packing the field should be correctly aligned.
>
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---
>  lib/mbuf/rte_mbuf_core.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> index 5688683..7369e3e 100644
> --- a/lib/mbuf/rte_mbuf_core.h
> +++ b/lib/mbuf/rte_mbuf_core.h
> @@ -463,7 +463,7 @@ enum {
>  /**
>   * The generic rte_mbuf, containing a packet mbuf.
>   */
> -struct rte_mbuf {
> +struct __rte_cache_aligned rte_mbuf {
>         RTE_MARKER cacheline0;
>
>         void *buf_addr;           /**< Virtual address of segment buffer. */
> @@ -476,7 +476,7 @@ struct rte_mbuf {
>          * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
>          * working on vector drivers easier.
>          */
> -       rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> +       rte_iova_t buf_iova;
>  #else

Before the change, for 32bits build:

struct rte_mbuf {
    RTE_MARKER                 cacheline0;           /*     0     0 */
    void *                     buf_addr;             /*     0     4 */

    /* XXX 4 bytes hole, try to pack */

    rte_iova_t                 buf_iova
__attribute__((__aligned__(8))); /*     8     8 */
    RTE_MARKER64               rearm_data;           /*    16     0 */
...

After the change:

struct rte_mbuf {
    RTE_MARKER                 cacheline0;           /*     0     0 */
    void *                     buf_addr;             /*     0     4 */
    rte_iova_t                 buf_iova;             /*     4     8 */
    RTE_MARKER64               rearm_data;           /*    12     0 */
...

So it looks like uint64_t is not naturally aligned on 8 bytes for x86
32 bits, which explains the current explicit constraint (and comment
in the header).
See also 586ec205bcbb ("mbuf: fix 64-bit address alignment in 32-bit builds").


This results in a cascading offset changes triggering multiple build
errors in vectorised code:

In file included from
../../../git/pub/dpdk.org/main/lib/eal/x86/include/rte_vect.h:16,
                 from
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:5:
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
In function ‘idpf_singleq_rearm_common’:
../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
error: size of unnamed array is negative
  509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
2*!!(condition)]))
      |                                                       ^
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:68:17:
note: in expansion of macro ‘RTE_BUILD_BUG_ON’
   68 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=
      |                 ^~~~~~~~~~~~~~~~
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
In function ‘_idpf_singleq_recv_raw_pkts_avx512’:
../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
error: size of unnamed array is negative
  509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
2*!!(condition)]))
      |                                                       ^
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:461:17:
note: in expansion of macro ‘RTE_BUILD_BUG_ON’
  461 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf,
rearm_data) !=
      |                 ^~~~~~~~~~~~~~~~
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
In function ‘_idpf_splitq_recv_raw_pkts_avx512’:
../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
error: size of unnamed array is negative
  509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
2*!!(condition)]))
      |                                                       ^
../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:921:17:
note: in expansion of macro ‘RTE_BUILD_BUG_ON’
  921 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf,
rearm_data) !=
      |                 ^~~~~~~~~~~~~~~~


-- 
David Marchand

Re: [PATCH v3 08/39] mbuf: remove unnecessary explicit alignment

[Tyler Retzlaff]

On Wed, Feb 14, 2024 at 02:12:17PM +0100, David Marchand wrote:
> On Wed, Feb 14, 2024 at 8:07 AM Tyler Retzlaff
> <roretzla@linux.microsoft.com> wrote:
> >
> > Remove explicit alignment with __rte_aligned(sizeof(T)) on buf_iova
> > field in the absence of packing the field should be correctly aligned.
> >
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > ---
> >  lib/mbuf/rte_mbuf_core.h | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> > index 5688683..7369e3e 100644
> > --- a/lib/mbuf/rte_mbuf_core.h
> > +++ b/lib/mbuf/rte_mbuf_core.h
> > @@ -463,7 +463,7 @@ enum {
> >  /**
> >   * The generic rte_mbuf, containing a packet mbuf.
> >   */
> > -struct rte_mbuf {
> > +struct __rte_cache_aligned rte_mbuf {
> >         RTE_MARKER cacheline0;
> >
> >         void *buf_addr;           /**< Virtual address of segment buffer. */
> > @@ -476,7 +476,7 @@ struct rte_mbuf {
> >          * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
> >          * working on vector drivers easier.
> >          */
> > -       rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> > +       rte_iova_t buf_iova;
> >  #else
> 
> Before the change, for 32bits build:
> 
> struct rte_mbuf {
>     RTE_MARKER                 cacheline0;           /*     0     0 */
>     void *                     buf_addr;             /*     0     4 */
> 
>     /* XXX 4 bytes hole, try to pack */
> 
>     rte_iova_t                 buf_iova
> __attribute__((__aligned__(8))); /*     8     8 */
>     RTE_MARKER64               rearm_data;           /*    16     0 */
> ...
> 
> After the change:
> 
> struct rte_mbuf {
>     RTE_MARKER                 cacheline0;           /*     0     0 */
>     void *                     buf_addr;             /*     0     4 */
>     rte_iova_t                 buf_iova;             /*     4     8 */
>     RTE_MARKER64               rearm_data;           /*    12     0 */
> ...
> 
> So it looks like uint64_t is not naturally aligned on 8 bytes for x86
> 32 bits, which explains the current explicit constraint (and comment
> in the header).

How I love x86, I forgot that uint64_t can be 4 byte aligned on x86.

I've done this in 3 places I will restore them all. I wonder why my test
builds didn't build bug out (something separate I better investigate).

Thanks for calling it out!

> See also 586ec205bcbb ("mbuf: fix 64-bit address alignment in 32-bit builds").
> 
> 
> This results in a cascading offset changes triggering multiple build
> errors in vectorised code:
> 
> In file included from
> ../../../git/pub/dpdk.org/main/lib/eal/x86/include/rte_vect.h:16,
>                  from
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:5:
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
> In function ‘idpf_singleq_rearm_common’:
> ../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
> error: size of unnamed array is negative
>   509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
> 2*!!(condition)]))
>       |                                                       ^
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:68:17:
> note: in expansion of macro ‘RTE_BUILD_BUG_ON’
>    68 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=
>       |                 ^~~~~~~~~~~~~~~~
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
> In function ‘_idpf_singleq_recv_raw_pkts_avx512’:
> ../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
> error: size of unnamed array is negative
>   509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
> 2*!!(condition)]))
>       |                                                       ^
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:461:17:
> note: in expansion of macro ‘RTE_BUILD_BUG_ON’
>   461 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf,
> rearm_data) !=
>       |                 ^~~~~~~~~~~~~~~~
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:
> In function ‘_idpf_splitq_recv_raw_pkts_avx512’:
> ../../../git/pub/dpdk.org/main/lib/eal/include/rte_common.h:509:55:
> error: size of unnamed array is negative
>   509 | #define RTE_BUILD_BUG_ON(condition) ((void)sizeof(char[1 -
> 2*!!(condition)]))
>       |                                                       ^
> ../../../git/pub/dpdk.org/main/drivers/common/idpf/idpf_common_rxtx_avx512.c:921:17:
> note: in expansion of macro ‘RTE_BUILD_BUG_ON’
>   921 |                 RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf,
> rearm_data) !=
>       |                 ^~~~~~~~~~~~~~~~
> 
> 
> -- 
> David Marchand

[PATCH v4 00/39] use C11 alignas and normalize type alignment

[Tyler Retzlaff]

This series normalizes type and object alignment by doing the following.

Fill in expansion of existing __rte_aligned, __rte_cache_aligned and
__rte_cache_min_aligned macros for MSVC.

Where __rte_aligned, __rte_cache_aligned and __rte_cache_min_aligned
are used to align *types* move them to a location on the type definition
that both GCC and MSVC accept for both C and C++ compilation.

Where __rte_aligned, __rte_cache_aligned or __rte_cache_min_aligned
are used to align *objects* replace their usage with standard C11 alignas.

I've elected to put the series forward without introducing a new macro
similar to __rte_alignas. Assuming the convention of a lower case macro
starting with __rte is intended to be internal only and providing it
would only permit unintended use by applications.

v4:
    * restore explicit alignment of 8-byte integers in mbuf and
      ring patches, natural alignment may be 4-bytes on 32-bit
      targets.
v3:
    * add missing patches for __rte_cache_aligned and
      __rte_cache_min_aligned
v2:
    * add missing #include <stdalign.h> for alignas macro.

Tyler Retzlaff (39):
  eal: use C11 alignas
  eal: redefine macro to be integer literal for MSVC
  stack: use C11 alignas
  sched: use C11 alignas
  ring: use C11 alignas
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: use C11 alignas
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  vhost: use C11 alignas
  timer: use C11 alignas
  table: use C11 alignas
  reorder: use C11 alignas
  regexdev: use C11 alignas
  rcu: use C11 alignas
  power: use C11 alignas
  rawdev: use C11 alignas
  port: use C11 alignas
  pdcp: use C11 alignas
  node: use C11 alignas
  mldev: use C11 alignas
  mempool: use C11 alignas
  member: use C11 alignas
  lpm: use C11 alignas
  ipsec: use C11 alignas
  jobstats: use C11 alignas
  bpf: use C11 alignas
  compressdev: use C11 alignas
  cryptodev: use C11 alignas
  dispatcher: use C11 alignas
  fib: use C11 alignas
  gpudev: use C11 alignas
  graph: use C11 alignas
  ip_frag: use C11 alignas

 lib/acl/acl_run.h                          |  4 ++--
 lib/acl/acl_run_altivec.h                  |  6 ++++--
 lib/acl/acl_run_neon.h                     |  6 ++++--
 lib/bpf/bpf_pkt.c                          |  4 ++--
 lib/compressdev/rte_comp.h                 |  4 ++--
 lib/compressdev/rte_compressdev_internal.h |  8 +++----
 lib/cryptodev/cryptodev_pmd.h              |  8 +++----
 lib/cryptodev/rte_cryptodev_core.h         |  4 ++--
 lib/dispatcher/rte_dispatcher.c            |  4 ++--
 lib/distributor/distributor_private.h      | 34 ++++++++++++++++--------------
 lib/distributor/rte_distributor.c          |  5 +++--
 lib/dmadev/rte_dmadev_core.h               |  4 ++--
 lib/dmadev/rte_dmadev_pmd.h                |  8 +++----
 lib/eal/arm/include/rte_vect.h             |  4 ++--
 lib/eal/common/malloc_elem.h               |  4 ++--
 lib/eal/common/malloc_heap.h               |  4 ++--
 lib/eal/common/rte_keepalive.c             |  3 ++-
 lib/eal/common/rte_random.c                |  4 ++--
 lib/eal/common/rte_service.c               |  8 +++----
 lib/eal/include/generic/rte_atomic.h       |  4 ++--
 lib/eal/include/rte_common.h               | 12 +++++------
 lib/eal/loongarch/include/rte_vect.h       |  8 +++----
 lib/eal/ppc/include/rte_vect.h             |  4 ++--
 lib/eal/riscv/include/rte_vect.h           |  4 ++--
 lib/eal/x86/include/rte_vect.h             |  9 +++++---
 lib/eal/x86/rte_power_intrinsics.c         | 10 +++++----
 lib/ethdev/ethdev_driver.h                 |  8 +++----
 lib/ethdev/rte_ethdev.h                    | 16 +++++++-------
 lib/ethdev/rte_ethdev_core.h               |  4 ++--
 lib/eventdev/event_timer_adapter_pmd.h     |  4 ++--
 lib/eventdev/eventdev_pmd.h                |  8 +++----
 lib/eventdev/rte_event_crypto_adapter.c    | 16 +++++++-------
 lib/eventdev/rte_event_dma_adapter.c       | 16 +++++++-------
 lib/eventdev/rte_event_eth_rx_adapter.c    |  8 +++----
 lib/eventdev/rte_event_eth_tx_adapter.c    |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c     |  9 ++++----
 lib/eventdev/rte_event_timer_adapter.h     |  8 +++----
 lib/eventdev/rte_eventdev.h                |  8 +++----
 lib/eventdev/rte_eventdev_core.h           |  4 ++--
 lib/fib/dir24_8.h                          |  4 +++-
 lib/fib/trie.h                             |  4 +++-
 lib/gpudev/gpudev_driver.h                 |  4 ++--
 lib/graph/graph_private.h                  |  4 ++--
 lib/graph/graph_stats.c                    |  4 ++--
 lib/graph/rte_graph.h                      |  4 ++--
 lib/graph/rte_graph_worker_common.h        | 17 +++++++++------
 lib/hash/rte_cuckoo_hash.h                 | 16 ++++++++------
 lib/hash/rte_thash.c                       |  4 +++-
 lib/hash/rte_thash.h                       |  8 +++----
 lib/ip_frag/ip_reassembly.h                |  8 +++----
 lib/ipsec/rte_ipsec.h                      |  4 ++--
 lib/ipsec/sa.h                             |  4 ++--
 lib/jobstats/rte_jobstats.h                |  8 +++----
 lib/lpm/rte_lpm.h                          |  5 +++--
 lib/lpm/rte_lpm6.c                         |  8 +++----
 lib/mbuf/rte_mbuf_core.h                   |  6 +++---
 lib/member/rte_member.h                    |  8 +++----
 lib/member/rte_member_ht.h                 |  4 ++--
 lib/member/rte_member_sketch.c             |  4 ++--
 lib/mempool/rte_mempool.h                  | 27 ++++++++++++------------
 lib/mldev/rte_mldev.h                      |  4 ++--
 lib/mldev/rte_mldev_core.h                 |  4 ++--
 lib/net/net_crc_avx512.c                   | 14 ++++++------
 lib/net/net_crc_neon.c                     | 11 +++++-----
 lib/net/net_crc_sse.c                      | 17 ++++++++-------
 lib/net/rte_arp.h                          |  8 +++----
 lib/net/rte_ether.h                        |  8 +++----
 lib/node/node_private.h                    |  4 ++--
 lib/node/pkt_cls.c                         |  4 +++-
 lib/pdcp/rte_pdcp.h                        |  4 ++--
 lib/pipeline/rte_pipeline.c                |  4 ++--
 lib/pipeline/rte_port_in_action.c          |  3 ++-
 lib/pipeline/rte_swx_ipsec.c               |  4 +++-
 lib/pipeline/rte_table_action.c            | 24 ++++++++++-----------
 lib/port/rte_port_frag.c                   |  4 ++--
 lib/power/power_acpi_cpufreq.c             |  4 ++--
 lib/power/power_amd_pstate_cpufreq.c       |  4 ++--
 lib/power/power_cppc_cpufreq.c             |  4 ++--
 lib/power/power_intel_uncore.c             |  4 ++--
 lib/power/power_pstate_cpufreq.c           |  4 ++--
 lib/power/rte_power_pmd_mgmt.c             |  4 ++--
 lib/rawdev/rte_rawdev.h                    |  4 ++--
 lib/rcu/rte_rcu_qsbr.h                     | 16 ++++++++------
 lib/regexdev/rte_regexdev_core.h           |  8 +++----
 lib/reorder/rte_reorder.c                  |  8 +++----
 lib/ring/rte_ring_core.h                   | 16 ++++++++------
 lib/ring/rte_ring_peek_zc.h                |  4 ++--
 lib/sched/rte_sched.c                      | 21 +++++++++---------
 lib/sched/rte_sched_common.h               |  2 --
 lib/stack/rte_stack.h                      | 16 ++++++++------
 lib/table/rte_swx_table_learner.c          |  4 ++--
 lib/table/rte_table_acl.c                  |  3 ++-
 lib/table/rte_table_array.c                |  7 +++---
 lib/table/rte_table_hash_cuckoo.c          |  4 +++-
 lib/table/rte_table_hash_ext.c             |  3 ++-
 lib/table/rte_table_hash_key16.c           |  4 +++-
 lib/table/rte_table_hash_key32.c           |  4 +++-
 lib/table/rte_table_hash_key8.c            |  4 +++-
 lib/table/rte_table_hash_lru.c             |  3 ++-
 lib/table/rte_table_lpm.c                  |  3 ++-
 lib/table/rte_table_lpm_ipv6.c             |  3 ++-
 lib/timer/rte_timer.c                      |  4 ++--
 lib/vhost/vhost.h                          |  8 +++----
 lib/vhost/vhost_crypto.c                   |  4 ++--
 104 files changed, 396 insertions(+), 343 deletions(-)

-- 
1.8.3.1

[PATCH v4 01/39] eal: use C11 alignas

[Tyler Retzlaff]

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/common/malloc_elem.h         |  4 ++--
 lib/eal/common/malloc_heap.h         |  4 ++--
 lib/eal/common/rte_keepalive.c       |  3 ++-
 lib/eal/common/rte_random.c          |  4 ++--
 lib/eal/common/rte_service.c         |  8 ++++----
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         | 12 +++++-------
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  4 ++--
 lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
 13 files changed, 37 insertions(+), 36 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
index 952ce73..c7ff671 100644
--- a/lib/eal/common/malloc_elem.h
+++ b/lib/eal/common/malloc_elem.h
@@ -20,7 +20,7 @@ enum elem_state {
 	ELEM_PAD  /* element is a padding-only header */
 };
 
-struct malloc_elem {
+struct __rte_cache_aligned malloc_elem {
 	struct malloc_heap *heap;
 	struct malloc_elem *volatile prev;
 	/**< points to prev elem in memseg */
@@ -48,7 +48,7 @@ struct malloc_elem {
 	size_t user_size;
 	uint64_t asan_cookie[2]; /* must be next to header_cookie */
 #endif
-} __rte_cache_aligned;
+};
 
 static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
 
diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
index 8f3ab57..0c49588 100644
--- a/lib/eal/common/malloc_heap.h
+++ b/lib/eal/common/malloc_heap.h
@@ -21,7 +21,7 @@
 /**
  * Structure to hold malloc heap
  */
-struct malloc_heap {
+struct __rte_cache_aligned malloc_heap {
 	rte_spinlock_t lock;
 	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
 	struct malloc_elem *volatile first;
@@ -31,7 +31,7 @@ struct malloc_heap {
 	unsigned int socket_id;
 	size_t total_size;
 	char name[RTE_HEAP_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 void *
 malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
index f6db973..391c1be 100644
--- a/lib/eal/common/rte_keepalive.c
+++ b/lib/eal/common/rte_keepalive.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2015-2016 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <inttypes.h>
 
 #include <rte_common.h>
@@ -19,7 +20,7 @@ struct rte_keepalive {
 		/*
 		 * Each element must be cache aligned to prevent false sharing.
 		 */
-		enum rte_keepalive_state core_state __rte_cache_aligned;
+		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
 	} live_data[RTE_KEEPALIVE_MAXCORES];
 
 	/** Last-seen-alive timestamps */
diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
index 7709b8f..90e91b3 100644
--- a/lib/eal/common/rte_random.c
+++ b/lib/eal/common/rte_random.c
@@ -13,14 +13,14 @@
 #include <rte_lcore.h>
 #include <rte_random.h>
 
-struct rte_rand_state {
+struct __rte_cache_aligned rte_rand_state {
 	uint64_t z1;
 	uint64_t z2;
 	uint64_t z3;
 	uint64_t z4;
 	uint64_t z5;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 /* One instance each for every lcore id-equipped thread, and one
  * additional instance to be shared by all others threads (i.e., all
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index d959c91..5637993 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -32,7 +32,7 @@
 #define RUNSTATE_RUNNING 1
 
 /* internal representation of a service */
-struct rte_service_spec_impl {
+struct __rte_cache_aligned rte_service_spec_impl {
 	/* public part of the struct */
 	struct rte_service_spec spec;
 
@@ -53,7 +53,7 @@ struct rte_service_spec_impl {
 	 * on currently.
 	 */
 	RTE_ATOMIC(uint32_t) num_mapped_cores;
-} __rte_cache_aligned;
+};
 
 struct service_stats {
 	RTE_ATOMIC(uint64_t) calls;
@@ -61,7 +61,7 @@ struct service_stats {
 };
 
 /* the internal values of a service core */
-struct core_state {
+struct __rte_cache_aligned core_state {
 	/* map of services IDs are run on this core */
 	uint64_t service_mask;
 	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
@@ -71,7 +71,7 @@ struct core_state {
 	RTE_ATOMIC(uint64_t) loops;
 	RTE_ATOMIC(uint64_t) cycles;
 	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
-} __rte_cache_aligned;
+};
 
 static uint32_t rte_service_count;
 static struct rte_service_spec_impl *rte_services;
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index d7d6390..ac90951 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -12,6 +12,8 @@
  * for DPDK.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -65,7 +67,7 @@
  * Force alignment
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
@@ -529,18 +531,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
 #define RTE_CACHE_LINE_MIN_SIZE 64
 
 /** Force alignment to cache line. */
-#ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_cache_aligned
-#else
 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-#endif
 
 /** Force minimum cache line alignment. */
 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
 
 #define _RTE_CACHE_GUARD_HELPER2(unique) \
-	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) \
+	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
 #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
 /**
  * Empty cache lines, to guard against false sharing-like effects
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 532a2e6..6d9b642 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2020 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_lcore.h>
 #include <rte_rtm.h>
@@ -12,10 +14,10 @@
 /*
  * Per-lcore structure holding current status of C0.2 sleeps.
  */
-static struct power_wait_status {
+static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
 	rte_spinlock_t lock;
 	volatile void *monitor_addr; /**< NULL if not currently sleeping */
-} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
+} wait_status[RTE_MAX_LCORE];
 
 /*
  * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
@@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
 #endif
 }
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	void (*mmonitor)(volatile void *addr);
 	void (*mwait)(const uint64_t timeout);
-} __rte_cache_aligned power_monitor_ops;
+} power_monitor_ops;
 
 static inline void
 __umwait_wakeup(volatile void *addr)
-- 
1.8.3.1

[PATCH v4 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..441f1a0 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == 16, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v4 03/39] stack: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/stack/rte_stack.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..8ff0659 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
@@ -52,11 +54,11 @@ struct rte_stack_lf_list {
  */
 struct rte_stack_lf {
 	/** LIFO list of elements */
-	struct rte_stack_lf_list used __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list used;
 	/** LIFO list of free elements */
-	struct rte_stack_lf_list free __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list free;
 	/** LIFO elements */
-	struct rte_stack_lf_elem elems[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_elem elems[];
 };
 
 /* Structure containing the LIFO, its current length, and a lock for mutual
@@ -71,9 +73,9 @@ struct rte_stack_std {
 /* The RTE stack structure contains the LIFO structure itself, plus metadata
  * such as its name and memzone pointer.
  */
-struct rte_stack {
+struct __rte_cache_aligned rte_stack {
 	/** Name of the stack. */
-	char name[RTE_STACK_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_STACK_NAMESIZE];
 	/** Memzone containing the rte_stack structure. */
 	const struct rte_memzone *memzone;
 	uint32_t capacity; /**< Usable size of the stack. */
@@ -82,7 +84,7 @@ struct rte_stack {
 		struct rte_stack_lf stack_lf; /**< Lock-free LIFO structure. */
 		struct rte_stack_std stack_std;	/**< LIFO structure. */
 	};
-} __rte_cache_aligned;
+};
 
 /**
  * The stack uses lock-free push and pop functions. This flag is only
-- 
1.8.3.1

[PATCH v4 04/39] sched: use C11 alignas

[Tyler Retzlaff]

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@ struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@ struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@ struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@ struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@ struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@ struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v4 05/39] ring: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ring/rte_ring_core.h    | 16 +++++++++-------
 lib/ring/rte_ring_peek_zc.h |  4 ++--
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..497d535 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -19,6 +19,8 @@
  * instead.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -78,7 +80,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(8) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(8) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
@@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
  * a problem.
  */
 struct rte_ring {
-	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
 	/**< Name of the ring. */
 	int flags;               /**< Flags supplied at creation. */
 	const struct rte_memzone *memzone;
@@ -129,20 +131,20 @@ struct rte_ring {
 	RTE_CACHE_GUARD;
 
 	/** Ring producer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail prod;
 		struct rte_ring_hts_headtail hts_prod;
 		struct rte_ring_rts_headtail rts_prod;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 
 	/** Ring consumer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail cons;
 		struct rte_ring_hts_headtail hts_cons;
 		struct rte_ring_rts_headtail rts_cons;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 };
diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
index 8fb279c..0b5e34b 100644
--- a/lib/ring/rte_ring_peek_zc.h
+++ b/lib/ring/rte_ring_peek_zc.h
@@ -79,7 +79,7 @@
  * This structure contains the pointers and length of the space
  * reserved on the ring storage.
  */
-struct rte_ring_zc_data {
+struct __rte_cache_aligned rte_ring_zc_data {
 	/* Pointer to the first space in the ring */
 	void *ptr1;
 	/* Pointer to the second space in the ring if there is wrap-around.
@@ -92,7 +92,7 @@ struct rte_ring_zc_data {
 	 * will give the number of elements available at ptr2.
 	 */
 	unsigned int n1;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
-- 
1.8.3.1

[PATCH v4 06/39] pipeline: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pipeline/rte_pipeline.c       |  4 ++--
 lib/pipeline/rte_port_in_action.c |  3 ++-
 lib/pipeline/rte_swx_ipsec.c      |  4 +++-
 lib/pipeline/rte_table_action.c   | 24 ++++++++++++------------
 4 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index c9ed903..62a3005 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -104,7 +104,7 @@ struct rte_table {
 
 #define RTE_PIPELINE_MAX_NAME_SZ                           124
 
-struct rte_pipeline {
+struct __rte_cache_aligned rte_pipeline {
 	/* Input parameters */
 	char name[RTE_PIPELINE_MAX_NAME_SZ];
 	int socket_id;
@@ -132,7 +132,7 @@ struct rte_pipeline {
 	uint64_t pkts_mask;
 	uint64_t n_pkts_ah_drop;
 	uint64_t pkts_drop_mask;
-} __rte_cache_aligned;
+};
 
 static inline uint32_t
 rte_mask_get_next(uint64_t mask, uint32_t pos)
diff --git a/lib/pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
index 5818973..bbacaff 100644
--- a/lib/pipeline/rte_port_in_action.c
+++ b/lib/pipeline/rte_port_in_action.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2018 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -282,7 +283,7 @@ struct rte_port_in_action_profile *
 struct rte_port_in_action {
 	struct ap_config cfg;
 	struct ap_data data;
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static __rte_always_inline void *
diff --git a/lib/pipeline/rte_swx_ipsec.c b/lib/pipeline/rte_swx_ipsec.c
index 28576c2..76b853f 100644
--- a/lib/pipeline/rte_swx_ipsec.c
+++ b/lib/pipeline/rte_swx_ipsec.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2022 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
@@ -154,7 +156,7 @@ struct rte_swx_ipsec {
 	/*
 	 * Table memory.
 	 */
-	uint8_t memory[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[];
 };
 
 static inline struct ipsec_sa *
diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v4 07/39] net: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index ce073ea..f4c5af4 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -57,9 +57,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -276,11 +276,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v4 08/39] mbuf: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mbuf/rte_mbuf_core.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..917a811 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -463,7 +463,7 @@ enum {
 /**
  * The generic rte_mbuf, containing a packet mbuf.
  */
-struct rte_mbuf {
+struct __rte_cache_aligned rte_mbuf {
 	RTE_MARKER cacheline0;
 
 	void *buf_addr;           /**< Virtual address of segment buffer. */
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
@@ -662,7 +662,7 @@ struct rte_mbuf {
 	uint16_t timesync;
 
 	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * Function typedef of callback to free externally attached buffer.
-- 
1.8.3.1

[PATCH v4 09/39] hash: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/hash/rte_cuckoo_hash.h | 16 +++++++++-------
 lib/hash/rte_thash.c       |  4 +++-
 lib/hash/rte_thash.h       |  8 ++++----
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.h b/lib/hash/rte_cuckoo_hash.h
index 8ea793c..a528f1d 100644
--- a/lib/hash/rte_cuckoo_hash.h
+++ b/lib/hash/rte_cuckoo_hash.h
@@ -11,6 +11,8 @@
 #ifndef _RTE_CUCKOO_HASH_H_
 #define _RTE_CUCKOO_HASH_H_
 
+#include <stdalign.h>
+
 #if defined(RTE_ARCH_X86)
 #include "rte_cmp_x86.h"
 #endif
@@ -117,10 +119,10 @@ enum cmp_jump_table_case {
 
 #define RTE_HASH_TSX_MAX_RETRY  10
 
-struct lcore_cache {
+struct __rte_cache_aligned lcore_cache {
 	unsigned len; /**< Cache len */
 	uint32_t objs[LCORE_CACHE_SIZE]; /**< Cache objects */
-} __rte_cache_aligned;
+};
 
 /* Structure that stores key-value pair */
 struct rte_hash_key {
@@ -141,7 +143,7 @@ enum rte_hash_sig_compare_function {
 };
 
 /** Bucket structure */
-struct rte_hash_bucket {
+struct __rte_cache_aligned rte_hash_bucket {
 	uint16_t sig_current[RTE_HASH_BUCKET_ENTRIES];
 
 	RTE_ATOMIC(uint32_t) key_idx[RTE_HASH_BUCKET_ENTRIES];
@@ -149,10 +151,10 @@ struct rte_hash_bucket {
 	uint8_t flag[RTE_HASH_BUCKET_ENTRIES];
 
 	void *next;
-} __rte_cache_aligned;
+};
 
 /** A hash table structure. */
-struct rte_hash {
+struct __rte_cache_aligned rte_hash {
 	char name[RTE_HASH_NAMESIZE];   /**< Name of the hash. */
 	uint32_t entries;               /**< Total table entries. */
 	uint32_t num_buckets;           /**< Number of buckets in table. */
@@ -170,7 +172,7 @@ struct rte_hash {
 
 	/* Fields used in lookup */
 
-	uint32_t key_len __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t key_len;
 	/**< Length of hash key. */
 	uint8_t hw_trans_mem_support;
 	/**< If hardware transactional memory is used. */
@@ -220,7 +222,7 @@ struct rte_hash {
 	uint32_t *ext_bkt_to_free;
 	RTE_ATOMIC(uint32_t) *tbl_chng_cnt;
 	/**< Indicates if the hash table changed from last read. */
-} __rte_cache_aligned;
+};
 
 struct queue_node {
 	struct rte_hash_bucket *bkt; /* Current bucket on the bfs search */
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index e8de071..6464fd3 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2021 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <sys/queue.h>
 
 #include <rte_thash.h>
@@ -80,7 +82,7 @@ struct rte_thash_subtuple_helper {
 	uint32_t	tuple_offset;	/** < Offset in bits of the subtuple */
 	uint32_t	tuple_len;	/** < Length in bits of the subtuple */
 	uint32_t	lsb_msk;	/** < (1 << reta_sz_log) - 1 */
-	__extension__ uint32_t	compl_table[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint32_t	compl_table[0];
 	/** < Complementary table */
 };
 
diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v4 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eventdev/event_timer_adapter_pmd.h  |  4 ++--
 lib/eventdev/eventdev_pmd.h             |  8 ++++----
 lib/eventdev/rte_event_crypto_adapter.c | 16 ++++++++--------
 lib/eventdev/rte_event_dma_adapter.c    | 16 ++++++++--------
 lib/eventdev/rte_event_eth_rx_adapter.c |  8 ++++----
 lib/eventdev/rte_event_eth_tx_adapter.c |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c  |  9 +++++----
 lib/eventdev/rte_event_timer_adapter.h  |  8 ++++----
 lib/eventdev/rte_eventdev.h             |  8 ++++----
 lib/eventdev/rte_eventdev_core.h        |  4 ++--
 10 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/lib/eventdev/event_timer_adapter_pmd.h b/lib/eventdev/event_timer_adapter_pmd.h
index 65b421b..cd5127f 100644
--- a/lib/eventdev/event_timer_adapter_pmd.h
+++ b/lib/eventdev/event_timer_adapter_pmd.h
@@ -86,7 +86,7 @@ struct event_timer_adapter_ops {
  * @internal Adapter data; structure to be placed in shared memory to be
  * accessible by various processes in a multi-process configuration.
  */
-struct rte_event_timer_adapter_data {
+struct __rte_cache_aligned rte_event_timer_adapter_data {
 	uint8_t id;
 	/**< Event timer adapter ID */
 	uint8_t event_dev_id;
@@ -110,7 +110,7 @@ struct rte_event_timer_adapter_data {
 
 	uint8_t started : 1;
 	/**< Flag to indicate adapter started. */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index c415624..3934d8e 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -107,7 +107,7 @@ struct rte_eventdev_global {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_eventdev_data {
+struct __rte_cache_aligned rte_eventdev_data {
 	int socket_id;
 	/**< Socket ID where memory is allocated */
 	uint8_t dev_id;
@@ -146,10 +146,10 @@ struct rte_eventdev_data {
 
 	uint64_t reserved_64s[4]; /**< Reserved for future fields */
 	void *reserved_ptrs[4];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each event device. */
-struct rte_eventdev {
+struct __rte_cache_aligned rte_eventdev {
 	struct rte_eventdev_data *data;
 	/**< Pointer to device data */
 	struct eventdev_ops *dev_ops;
@@ -189,7 +189,7 @@ struct rte_eventdev {
 
 	uint64_t reserved_64s[3]; /**< Reserved for future fields */
 	void *reserved_ptrs[3];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 extern struct rte_eventdev *rte_eventdevs;
 /** @internal The pool of rte_eventdev structures. */
diff --git a/lib/eventdev/rte_event_crypto_adapter.c b/lib/eventdev/rte_event_crypto_adapter.c
index d46595d..6bc2769 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -42,7 +42,7 @@
 
 #define ECA_ADAPTER_ARRAY "crypto_adapter_array"
 
-struct crypto_ops_circular_buffer {
+struct __rte_cache_aligned crypto_ops_circular_buffer {
 	/* index of head element in circular buffer */
 	uint16_t head;
 	/* index of tail element in circular buffer */
@@ -53,9 +53,9 @@ struct crypto_ops_circular_buffer {
 	uint16_t size;
 	/* Pointer to hold rte_crypto_ops for batching */
 	struct rte_crypto_op **op_buffer;
-} __rte_cache_aligned;
+};
 
-struct event_crypto_adapter {
+struct __rte_cache_aligned event_crypto_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 	/* Event port identifier */
@@ -98,10 +98,10 @@ struct event_crypto_adapter {
 	uint16_t nb_qps;
 	/* Adapter mode */
 	enum rte_event_crypto_adapter_mode mode;
-} __rte_cache_aligned;
+};
 
 /* Per crypto device information */
-struct crypto_device_info {
+struct __rte_cache_aligned crypto_device_info {
 	/* Pointer to cryptodev */
 	struct rte_cryptodev *dev;
 	/* Pointer to queue pair info */
@@ -118,15 +118,15 @@ struct crypto_device_info {
 	 * be invoked if not already invoked
 	 */
 	uint16_t num_qpairs;
-} __rte_cache_aligned;
+};
 
 /* Per queue pair information */
-struct crypto_queue_pair_info {
+struct __rte_cache_aligned crypto_queue_pair_info {
 	/* Set to indicate queue pair is enabled */
 	bool qp_enabled;
 	/* Circular buffer for batching crypto ops to cdev */
 	struct crypto_ops_circular_buffer cbuf;
-} __rte_cache_aligned;
+};
 
 static struct event_crypto_adapter **event_crypto_adapter;
 
diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c
index 4196164..24dff55 100644
--- a/lib/eventdev/rte_event_dma_adapter.c
+++ b/lib/eventdev/rte_event_dma_adapter.c
@@ -26,7 +26,7 @@
 	} while (0)
 
 /* DMA ops circular buffer */
-struct dma_ops_circular_buffer {
+struct __rte_cache_aligned dma_ops_circular_buffer {
 	/* Index of head element */
 	uint16_t head;
 
@@ -41,19 +41,19 @@ struct dma_ops_circular_buffer {
 
 	/* Pointer to hold rte_event_dma_adapter_op for processing */
 	struct rte_event_dma_adapter_op **op_buffer;
-} __rte_cache_aligned;
+};
 
 /* Vchan information */
-struct dma_vchan_info {
+struct __rte_cache_aligned dma_vchan_info {
 	/* Set to indicate vchan queue is enabled */
 	bool vq_enabled;
 
 	/* Circular buffer for batching DMA ops to dma_dev */
 	struct dma_ops_circular_buffer dma_buf;
-} __rte_cache_aligned;
+};
 
 /* DMA device information */
-struct dma_device_info {
+struct __rte_cache_aligned dma_device_info {
 	/* Pointer to vchan queue info */
 	struct dma_vchan_info *vchanq;
 
@@ -81,9 +81,9 @@ struct dma_device_info {
 	 * transfer uses a hardware mechanism
 	 */
 	uint8_t internal_event_port;
-} __rte_cache_aligned;
+};
 
-struct event_dma_adapter {
+struct __rte_cache_aligned event_dma_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 
@@ -145,7 +145,7 @@ struct event_dma_adapter {
 
 	/* Per instance stats structure */
 	struct rte_event_dma_adapter_stats dma_stats;
-} __rte_cache_aligned;
+};
 
 static struct event_dma_adapter **event_dma_adapter;
 
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c
index 1b83a55..3ee20d9 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -72,7 +72,7 @@ struct eth_rx_poll_entry {
 	uint16_t eth_rx_qid;
 };
 
-struct eth_rx_vector_data {
+struct __rte_cache_aligned eth_rx_vector_data {
 	TAILQ_ENTRY(eth_rx_vector_data) next;
 	uint16_t port;
 	uint16_t queue;
@@ -82,7 +82,7 @@ struct eth_rx_vector_data {
 	uint64_t vector_timeout_ticks;
 	struct rte_mempool *vector_pool;
 	struct rte_event_vector *vector_ev;
-} __rte_cache_aligned;
+};
 
 TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
 
@@ -103,7 +103,7 @@ struct eth_event_enqueue_buffer {
 	uint16_t last_mask;
 };
 
-struct event_eth_rx_adapter {
+struct __rte_cache_aligned event_eth_rx_adapter {
 	/* RSS key */
 	uint8_t rss_key_be[RSS_KEY_SIZE];
 	/* Event device identifier */
@@ -188,7 +188,7 @@ struct event_eth_rx_adapter {
 	uint8_t rxa_started;
 	/* Adapter ID */
 	uint8_t id;
-} __rte_cache_aligned;
+};
 
 /* Per eth device */
 struct eth_device_info {
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index 56435be..67fff8b 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -109,7 +109,7 @@ struct txa_service_queue_info {
 };
 
 /* PMD private structure */
-struct txa_service_data {
+struct __rte_cache_aligned txa_service_data {
 	/* Max mbufs processed in any service function invocation */
 	uint32_t max_nb_tx;
 	/* Number of Tx queues in adapter */
@@ -144,7 +144,7 @@ struct txa_service_data {
 	int64_t service_id;
 	/* Memory allocation name */
 	char mem_name[TXA_MEM_NAME_LEN];
-} __rte_cache_aligned;
+};
 
 /* Per eth device structure */
 struct txa_service_ethdev {
diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
index e6d3492..5d3e37f 100644
--- a/lib/eventdev/rte_event_timer_adapter.c
+++ b/lib/eventdev/rte_event_timer_adapter.c
@@ -4,6 +4,7 @@
  */
 
 #include <ctype.h>
+#include <stdalign.h>
 #include <string.h>
 #include <inttypes.h>
 #include <stdbool.h>
@@ -512,11 +513,11 @@ struct rte_event_timer_adapter *
 
 #define EXP_TIM_BUF_SZ 128
 
-struct event_buffer {
+struct __rte_cache_aligned event_buffer {
 	size_t head;
 	size_t tail;
 	struct rte_event events[EVENT_BUFFER_SZ];
-} __rte_cache_aligned;
+};
 
 static inline bool
 event_buffer_full(struct event_buffer *bufp)
@@ -632,9 +633,9 @@ struct swtim {
 	/* Identifier of timer data instance */
 	uint32_t timer_data_id;
 	/* Track which cores have actually armed a timer */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		RTE_ATOMIC(uint16_t) v;
-	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
+	} in_use[RTE_MAX_LCORE];
 	/* Track which cores' timer lists should be polled */
 	RTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];
 	/* The number of lists that should be polled */
diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h
index c133dec..0bd1b30 100644
--- a/lib/eventdev/rte_event_timer_adapter.h
+++ b/lib/eventdev/rte_event_timer_adapter.h
@@ -473,7 +473,7 @@ enum rte_event_timer_state {
  * The generic *rte_event_timer* structure to hold the event timer attributes
  * for arm and cancel operations.
  */
-struct rte_event_timer {
+struct __rte_cache_aligned rte_event_timer {
 	struct rte_event ev;
 	/**<
 	 * Expiry event attributes.  On successful event timer timeout,
@@ -504,7 +504,7 @@ struct rte_event_timer {
 	/**< Memory to store user specific metadata.
 	 * The event timer adapter implementation should not modify this area.
 	 */
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*rte_event_timer_arm_burst_t)(
 		const struct rte_event_timer_adapter *adapter,
@@ -526,7 +526,7 @@ typedef uint16_t (*rte_event_timer_cancel_burst_t)(
 /**
  * @internal Data structure associated with each event timer adapter.
  */
-struct rte_event_timer_adapter {
+struct __rte_cache_aligned rte_event_timer_adapter {
 	rte_event_timer_arm_burst_t arm_burst;
 	/**< Pointer to driver arm_burst function. */
 	rte_event_timer_arm_tmo_tick_burst_t arm_tmo_tick_burst;
@@ -540,7 +540,7 @@ struct rte_event_timer_adapter {
 
 	uint8_t allocated : 1;
 	/**< Flag to indicate that this adapter has been allocated */
-} __rte_cache_aligned;
+};
 
 #define ADAPTER_VALID_OR_ERR_RET(adapter, retval) do {		\
 	if (adapter == NULL || !adapter->allocated)		\
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index ec9b024..ff143c7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1078,7 +1078,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1118,19 +1118,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
diff --git a/lib/eventdev/rte_eventdev_core.h b/lib/eventdev/rte_eventdev_core.h
index 5b40551..fc8e155 100644
--- a/lib/eventdev/rte_eventdev_core.h
+++ b/lib/eventdev/rte_eventdev_core.h
@@ -49,7 +49,7 @@ typedef uint16_t (*event_dma_adapter_enqueue_t)(void *port, struct rte_event ev[
 typedef int (*event_profile_switch_t)(void *port, uint8_t profile);
 /**< @internal Switch active link profile on the event port. */
 
-struct rte_event_fp_ops {
+struct __rte_cache_aligned rte_event_fp_ops {
 	void **data;
 	/**< points to array of internal port data pointers */
 	event_enqueue_t enqueue;
@@ -77,7 +77,7 @@ struct rte_event_fp_ops {
 	event_profile_switch_t profile_switch;
 	/**< PMD Event switch profile function. */
 	uintptr_t reserved[4];
-} __rte_cache_aligned;
+};
 
 extern struct rte_event_fp_ops rte_event_fp_ops[RTE_EVENT_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v4 11/39] ethdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ethdev/ethdev_driver.h   |  8 ++++----
 lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
 lib/ethdev/rte_ethdev_core.h |  4 ++--
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index b482cd1..2edad71 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_eth_dev {
+struct __rte_cache_aligned rte_eth_dev {
 	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
 	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
 
@@ -89,7 +89,7 @@ struct rte_eth_dev {
 
 	enum rte_eth_dev_state state; /**< Flag indicating the port state */
 	void *security_ctx; /**< Context for security ops */
-} __rte_cache_aligned;
+};
 
 struct rte_eth_dev_sriov;
 struct rte_eth_dev_owner;
@@ -100,7 +100,7 @@ struct rte_eth_dev {
  * device. This structure is safe to place in shared memory to be common
  * among different processes in a multi-process configuration.
  */
-struct rte_eth_dev_data {
+struct __rte_cache_aligned rte_eth_dev_data {
 	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
 
 	void **rx_queues; /**< Array of pointers to Rx queues */
@@ -186,7 +186,7 @@ struct rte_eth_dev_data {
 	uint16_t backer_port_id;
 
 	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index 21e3a21..b7eca2f 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
@@ -1835,7 +1835,7 @@ struct rte_eth_dev_info {
  * Ethernet device Rx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_rxq_info {
+struct __rte_cache_min_aligned rte_eth_rxq_info {
 	struct rte_mempool *mp;     /**< mempool used by that queue. */
 	struct rte_eth_rxconf conf; /**< queue config parameters. */
 	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
@@ -1849,17 +1849,17 @@ struct rte_eth_rxq_info {
 	 * Value 0 means that the threshold monitoring is disabled.
 	 */
 	uint8_t avail_thresh;
-} __rte_cache_min_aligned;
+};
 
 /**
  * Ethernet device Tx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_txq_info {
+struct __rte_cache_min_aligned rte_eth_txq_info {
 	struct rte_eth_txconf conf; /**< queue config parameters. */
 	uint16_t nb_desc;           /**< configured number of TXDs. */
 	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
-} __rte_cache_min_aligned;
+};
 
 /**
  * @warning
@@ -1869,7 +1869,7 @@ struct rte_eth_txq_info {
  * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
  * them into Rx mbuf ring.
  */
-struct rte_eth_recycle_rxq_info {
+struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
 	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
 	struct rte_mempool *mp;     /**< mempool of Rx queue. */
 	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
@@ -1883,7 +1883,7 @@ struct rte_eth_recycle_rxq_info {
 	 * Value 0 means that PMD drivers have no requirement for this.
 	 */
 	uint16_t refill_requirement;
-} __rte_cache_min_aligned;
+};
 
 /* Generic Burst mode flag definition, values can be ORed. */
 
diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
index 4bfaf79..fdfc68f 100644
--- a/lib/ethdev/rte_ethdev_core.h
+++ b/lib/ethdev/rte_ethdev_core.h
@@ -81,7 +81,7 @@ struct rte_ethdev_qdata {
  * On 64-bit systems contents of this structure occupy exactly two 64B lines.
  * On 32-bit systems contents of this structure fits into one 64B line.
  */
-struct rte_eth_fp_ops {
+struct __rte_cache_aligned rte_eth_fp_ops {
 
 	/**@{*/
 	/**
@@ -119,7 +119,7 @@ struct rte_eth_fp_ops {
 	uintptr_t reserved2[2];
 	/**@}*/
 
-} __rte_cache_aligned;
+};
 
 extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
 
-- 
1.8.3.1

[PATCH v4 12/39] dmadev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 lib/dmadev/rte_dmadev_pmd.h  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index 0647856..1ba2c1f 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_aligned(128) rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_aligned(128);
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
diff --git a/lib/dmadev/rte_dmadev_pmd.h b/lib/dmadev/rte_dmadev_pmd.h
index 7f354f6..5872908 100644
--- a/lib/dmadev/rte_dmadev_pmd.h
+++ b/lib/dmadev/rte_dmadev_pmd.h
@@ -94,7 +94,7 @@ struct rte_dma_dev_ops {
  *
  * @see struct rte_dma_dev::data
  */
-struct rte_dma_dev_data {
+struct __rte_cache_aligned rte_dma_dev_data {
 	char dev_name[RTE_DEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	int16_t dev_id; /**< Device [external] identifier. */
 	int16_t numa_node; /**< Local NUMA memory ID. -1 if unknown. */
@@ -103,7 +103,7 @@ struct rte_dma_dev_data {
 	__extension__
 	uint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */
 	uint64_t reserved[2]; /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /**
  * Possible states of a DMA device.
@@ -122,7 +122,7 @@ enum rte_dma_dev_state {
  * @internal
  * The generic data structure associated with each DMA device.
  */
-struct rte_dma_dev {
+struct __rte_cache_aligned rte_dma_dev {
 	/** Device info which supplied during device initialization. */
 	struct rte_device *device;
 	struct rte_dma_dev_data *data; /**< Pointer to shared device data. */
@@ -132,7 +132,7 @@ struct rte_dma_dev {
 	const struct rte_dma_dev_ops *dev_ops;
 	enum rte_dma_dev_state state; /**< Flag indicating the device state. */
 	uint64_t reserved[2]; /**< Reserved for future fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v4 13/39] distributor: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/distributor/distributor_private.h | 34 ++++++++++++++++++----------------
 lib/distributor/rte_distributor.c     |  5 +++--
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/lib/distributor/distributor_private.h b/lib/distributor/distributor_private.h
index dfeb9b5..07c2c05 100644
--- a/lib/distributor/distributor_private.h
+++ b/lib/distributor/distributor_private.h
@@ -5,6 +5,8 @@
 #ifndef _DIST_PRIV_H_
 #define _DIST_PRIV_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE distributor
@@ -51,10 +53,10 @@
  * the next cache line to worker 0, we pad this out to three cache lines.
  * Only 64-bits of the memory is actually used though.
  */
-union rte_distributor_buffer_single {
+union __rte_cache_aligned rte_distributor_buffer_single {
 	volatile RTE_ATOMIC(int64_t) bufptr64;
 	char pad[RTE_CACHE_LINE_SIZE*3];
-} __rte_cache_aligned;
+};
 
 /*
  * Transfer up to 8 mbufs at a time to/from workers, and
@@ -62,12 +64,12 @@
  */
 #define RTE_DIST_BURST_SIZE 8
 
-struct rte_distributor_backlog {
+struct __rte_cache_aligned rte_distributor_backlog {
 	unsigned int start;
 	unsigned int count;
-	int64_t pkts[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pkts[RTE_DIST_BURST_SIZE];
 	uint16_t *tags; /* will point to second cacheline of inflights */
-} __rte_cache_aligned;
+};
 
 
 struct rte_distributor_returned_pkts {
@@ -113,17 +115,17 @@ enum rte_distributor_match_function {
  * There is a separate cacheline for returns in the burst API.
  */
 struct rte_distributor_buffer {
-	volatile RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= outgoing to worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE];
+		/* <= outgoing to worker */
 
-	int64_t pad1 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad1;    /* <= one cache line  */
 
-	volatile RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= incoming from worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE];
+		/* <= incoming from worker */
 
-	int64_t pad2 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad2;    /* <= one cache line  */
 
-	int count __rte_cache_aligned;       /* <= number of current mbufs */
+	alignas(RTE_CACHE_LINE_SIZE) int count;       /* <= number of current mbufs */
 };
 
 struct rte_distributor {
@@ -138,11 +140,11 @@ struct rte_distributor {
 	 * on the worker core. Second cache line are the backlog
 	 * that are going to go to the worker core.
 	 */
-	uint16_t in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t
+		in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2];
 
-	struct rte_distributor_backlog backlog[RTE_DISTRIB_MAX_WORKERS]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_distributor_backlog
+		backlog[RTE_DISTRIB_MAX_WORKERS];
 
 	struct rte_distributor_buffer bufs[RTE_DISTRIB_MAX_WORKERS];
 
diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index 2ecb95c..b901a4e 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -447,7 +448,7 @@
 	struct rte_mbuf *next_mb = NULL;
 	int64_t next_value = 0;
 	uint16_t new_tag = 0;
-	uint16_t flows[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t flows[RTE_DIST_BURST_SIZE];
 	unsigned int i, j, w, wid, matching_required;
 
 	if (d->alg_type == RTE_DIST_ALG_SINGLE) {
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v4 14/39] acl: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/acl/acl_run.h         | 4 ++--
 lib/acl/acl_run_altivec.h | 6 ++++--
 lib/acl/acl_run_neon.h    | 6 ++++--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 3c30466..2d398ff 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -3,15 +3,17 @@
  * Copyright (C) IBM Corporation 2016.
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _altivec_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t xmm_ones_16;
 	rte_xmm_t range_base;
-} altivec_acl_const __rte_cache_aligned = {
+} altivec_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
index 69d1b6d..63074f8 100644
--- a/lib/acl/acl_run_neon.h
+++ b/lib/acl/acl_run_neon.h
@@ -2,14 +2,16 @@
  * Copyright(c) 2015 Cavium, Inc
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _neon_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t range_base;
-} neon_acl_const __rte_cache_aligned = {
+} neon_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
-- 
1.8.3.1

[PATCH v4 15/39] vhost: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
 lib/vhost/vhost.h        | 8 ++++----
 lib/vhost/vhost_crypto.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index 0b13374..4d11f56 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -271,7 +271,7 @@ struct vhost_async {
 /**
  * Structure contains variables relevant to RX/TX virtqueues.
  */
-struct vhost_virtqueue {
+struct __rte_cache_aligned vhost_virtqueue {
 	union {
 		struct vring_desc	*desc;
 		struct vring_packed_desc   *desc_packed;
@@ -349,7 +349,7 @@ struct vhost_virtqueue {
 	struct virtqueue_stats	stats;
 
 	RTE_ATOMIC(bool) irq_pending;
-} __rte_cache_aligned;
+};
 
 /* Virtio device status as per Virtio specification */
 #define VIRTIO_DEVICE_STATUS_RESET		0x00
@@ -477,7 +477,7 @@ struct inflight_mem_info {
  * Device structure contains all configuration information relating
  * to the device.
  */
-struct virtio_net {
+struct __rte_cache_aligned virtio_net {
 	/* Frontend (QEMU) memory and memory region information */
 	struct rte_vhost_memory	*mem;
 	uint64_t		features;
@@ -536,7 +536,7 @@ struct virtio_net {
 	struct rte_vhost_user_extern_ops extern_ops;
 
 	struct vhost_backend_ops *backend_ops;
-} __rte_cache_aligned;
+};
 
 static inline void
 vq_assert_lock__(struct virtio_net *dev, struct vhost_virtqueue *vq, const char *func)
diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
index 3704fbb..eb4a158 100644
--- a/lib/vhost/vhost_crypto.c
+++ b/lib/vhost/vhost_crypto.c
@@ -190,7 +190,7 @@ static int get_iv_len(enum rte_crypto_cipher_algorithm algo)
  * one DPDK crypto device that deals with all crypto workloads. It is declared
  * here and defined in vhost_crypto.c
  */
-struct vhost_crypto {
+struct __rte_cache_aligned vhost_crypto {
 	/** Used to lookup DPDK Cryptodev Session based on VIRTIO crypto
 	 *  session ID.
 	 */
@@ -213,7 +213,7 @@ struct vhost_crypto {
 	struct virtio_net *dev;
 
 	uint8_t option;
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_writeback_data {
 	uint8_t *src;
-- 
1.8.3.1

[PATCH v4 16/39] timer: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/timer/rte_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c
index 53ed221..bb8b6a6 100644
--- a/lib/timer/rte_timer.c
+++ b/lib/timer/rte_timer.c
@@ -24,7 +24,7 @@
 /**
  * Per-lcore info for timers.
  */
-struct priv_timer {
+struct __rte_cache_aligned priv_timer {
 	struct rte_timer pending_head;  /**< dummy timer instance to head up list */
 	rte_spinlock_t list_lock;       /**< lock to protect list access */
 
@@ -44,7 +44,7 @@ struct priv_timer {
 	/** per-lcore statistics */
 	struct rte_timer_debug_stats stats;
 #endif
-} __rte_cache_aligned;
+};
 
 #define FL_ALLOCATED	(1 << 0)
 struct rte_timer_data {
-- 
1.8.3.1

[PATCH v4 17/39] table: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/table/rte_swx_table_learner.c | 4 ++--
 lib/table/rte_table_acl.c         | 3 ++-
 lib/table/rte_table_array.c       | 7 ++++---
 lib/table/rte_table_hash_cuckoo.c | 4 +++-
 lib/table/rte_table_hash_ext.c    | 3 ++-
 lib/table/rte_table_hash_key16.c  | 4 +++-
 lib/table/rte_table_hash_key32.c  | 4 +++-
 lib/table/rte_table_hash_key8.c   | 4 +++-
 lib/table/rte_table_hash_lru.c    | 3 ++-
 lib/table/rte_table_lpm.c         | 3 ++-
 lib/table/rte_table_lpm_ipv6.c    | 3 ++-
 11 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lib/table/rte_swx_table_learner.c b/lib/table/rte_swx_table_learner.c
index 2b5e6bd..55a3645 100644
--- a/lib/table/rte_swx_table_learner.c
+++ b/lib/table/rte_swx_table_learner.c
@@ -145,13 +145,13 @@ struct table_params {
 	size_t total_size;
 };
 
-struct table {
+struct __rte_cache_aligned table {
 	/* Table parameters. */
 	struct table_params params;
 
 	/* Table buckets. */
 	uint8_t buckets[];
-} __rte_cache_aligned;
+};
 
 /* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
  * significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
diff --git a/lib/table/rte_table_acl.c b/lib/table/rte_table_acl.c
index 83411d2..2764cda 100644
--- a/lib/table/rte_table_acl.c
+++ b/lib/table/rte_table_acl.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_acl {
 	uint8_t *acl_rule_memory; /* Memory to store the rules */
 
 	/* Memory to store the action table and stack of free entries */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 
diff --git a/lib/table/rte_table_array.c b/lib/table/rte_table_array.c
index 80bc2a7..31a17d5 100644
--- a/lib/table/rte_table_array.c
+++ b/lib/table/rte_table_array.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -27,7 +28,7 @@
 
 #endif
 
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
 	struct rte_table_stats stats;
 
 	/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
 	uint32_t entry_pos_mask;
 
 	/* Internal table */
-	uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
 
 static void *
 rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
diff --git a/lib/table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
index 0f4900c..d3b60f3 100644
--- a/lib/table/rte_table_hash_cuckoo.c
+++ b/lib/table/rte_table_hash_cuckoo.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -42,7 +44,7 @@ struct rte_table_hash {
 	struct rte_hash *h_table;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
index 2148d83..61e3c79 100644
--- a/lib/table/rte_table_hash_ext.c
+++ b/lib/table/rte_table_hash_ext.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -99,7 +100,7 @@ struct rte_table_hash {
 	uint32_t *bkt_ext_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
index 7734aef..2af34a5 100644
--- a/lib/table/rte_table_hash_key16.c
+++ b/lib/table/rte_table_hash_key16.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
index fcb4348..06e5cf4 100644
--- a/lib/table/rte_table_hash_key32.c
+++ b/lib/table/rte_table_hash_key32.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
index bbe6562..2ab8e1b 100644
--- a/lib/table/rte_table_hash_key8.c
+++ b/lib/table/rte_table_hash_key8.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -79,7 +81,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
index cb4f329..8604a64 100644
--- a/lib/table/rte_table_hash_lru.c
+++ b/lib/table/rte_table_hash_lru.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -76,7 +77,7 @@ struct rte_table_hash {
 	uint32_t *key_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
index b9cff25..978d7e5 100644
--- a/lib/table/rte_table_lpm.c
+++ b/lib/table/rte_table_lpm.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_lpm {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
diff --git a/lib/table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
index e4e823a..1d54f83 100644
--- a/lib/table/rte_table_lpm_ipv6.c
+++ b/lib/table/rte_table_lpm_ipv6.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
-- 
1.8.3.1

[PATCH v4 18/39] reorder: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/reorder/rte_reorder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
index c080b2c..ae97e1a 100644
--- a/lib/reorder/rte_reorder.c
+++ b/lib/reorder/rte_reorder.c
@@ -37,16 +37,16 @@
 int rte_reorder_seqn_dynfield_offset = -1;
 
 /* A generic circular buffer */
-struct cir_buffer {
+struct __rte_cache_aligned cir_buffer {
 	unsigned int size;   /**< Number of entries that can be stored */
 	unsigned int mask;   /**< [buffer_size - 1]: used for wrap-around */
 	unsigned int head;   /**< insertion point in buffer */
 	unsigned int tail;   /**< extraction point in buffer */
 	struct rte_mbuf **entries;
-} __rte_cache_aligned;
+};
 
 /* The reorder buffer data structure itself */
-struct rte_reorder_buffer {
+struct __rte_cache_aligned rte_reorder_buffer {
 	char name[RTE_REORDER_NAMESIZE];
 	uint32_t min_seqn;  /**< Lowest seq. number that can be in the buffer */
 	unsigned int memsize; /**< memory area size of reorder buffer */
@@ -54,7 +54,7 @@ struct rte_reorder_buffer {
 
 	struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */
 	struct cir_buffer order_buf; /**< buffer used to reorder entries */
-} __rte_cache_aligned;
+};
 
 static void
 rte_reorder_free_mbufs(struct rte_reorder_buffer *b);
-- 
1.8.3.1

[PATCH v4 19/39] regexdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/regexdev/rte_regexdev_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
index 15ba712..32eef6e 100644
--- a/lib/regexdev/rte_regexdev_core.h
+++ b/lib/regexdev/rte_regexdev_core.h
@@ -144,13 +144,13 @@ enum rte_regexdev_state {
  * This structure is safe to place in shared memory to be common among different
  * processes in a multi-process configuration.
  */
-struct rte_regexdev_data {
+struct __rte_cache_aligned rte_regexdev_data {
 	void *dev_private; /**< PMD-specific private data. */
 	char dev_name[RTE_REGEXDEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	uint16_t dev_id; /**< Device [external]  identifier. */
 	struct rte_regexdev_config dev_conf; /**< RegEx configuration. */
 	uint8_t dev_started : 1; /**< Device started to work. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
@@ -162,7 +162,7 @@ struct rte_regexdev_data {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_regexdev {
+struct __rte_cache_aligned rte_regexdev {
 	regexdev_enqueue_t enqueue;
 	regexdev_dequeue_t dequeue;
 	const struct rte_regexdev_ops *dev_ops;
@@ -170,7 +170,7 @@ struct rte_regexdev {
 	struct rte_device *device; /**< Backing device */
 	enum rte_regexdev_state state; /**< The device state. */
 	struct rte_regexdev_data *data;  /**< Pointer to device data. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v4 20/39] rcu: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rcu/rte_rcu_qsbr.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
index 23c9f89..f6e6ab3 100644
--- a/lib/rcu/rte_rcu_qsbr.h
+++ b/lib/rcu/rte_rcu_qsbr.h
@@ -21,6 +21,8 @@
  * entered quiescent state.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -69,7 +71,7 @@
 #define RTE_QSBR_THRID_INVALID 0xffffffff
 
 /* Worker thread counter */
-struct rte_rcu_qsbr_cnt {
+struct __rte_cache_aligned rte_rcu_qsbr_cnt {
 	RTE_ATOMIC(uint64_t) cnt;
 	/**< Quiescent state counter. Value 0 indicates the thread is offline
 	 *   64b counter is used to avoid adding more code to address
@@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt {
 	 */
 	RTE_ATOMIC(uint32_t) lock_cnt;
 	/**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */
-} __rte_cache_aligned;
+};
 
 #define __RTE_QSBR_CNT_THR_OFFLINE 0
 #define __RTE_QSBR_CNT_INIT 1
@@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt {
  * 1) Quiescent state counter array
  * 2) Register thread ID array
  */
-struct rte_rcu_qsbr {
-	RTE_ATOMIC(uint64_t) token __rte_cache_aligned;
+struct __rte_cache_aligned rte_rcu_qsbr {
+	alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token;
 	/**< Counter to allow for multiple concurrent quiescent state queries */
 	RTE_ATOMIC(uint64_t) acked_token;
 	/**< Least token acked by all the threads in the last call to
 	 *   rte_rcu_qsbr_check API.
 	 */
 
-	uint32_t num_elems __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems;
 	/**< Number of elements in the thread ID array */
 	RTE_ATOMIC(uint32_t) num_threads;
 	/**< Number of threads currently using this QS variable */
 	uint32_t max_threads;
 	/**< Maximum number of threads using this QS variable */
 
-	struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0];
 	/**< Quiescent state counter array of 'max_threads' elements */
 
 	/**< Registered thread IDs are stored in a bitmap array,
 	 *   after the quiescent state counter array.
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Call back function called to free the resources.
-- 
1.8.3.1

[PATCH v4 21/39] power: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/power/power_acpi_cpufreq.c       | 4 ++--
 lib/power/power_amd_pstate_cpufreq.c | 4 ++--
 lib/power/power_cppc_cpufreq.c       | 4 ++--
 lib/power/power_intel_uncore.c       | 4 ++--
 lib/power/power_pstate_cpufreq.c     | 4 ++--
 lib/power/rte_power_pmd_mgmt.c       | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
index f8d978d..81996e1 100644
--- a/lib/power/power_acpi_cpufreq.c
+++ b/lib/power/power_acpi_cpufreq.c
@@ -41,7 +41,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct acpi_power_info {
+struct __rte_cache_aligned acpi_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -51,7 +51,7 @@ struct acpi_power_info {
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
-} __rte_cache_aligned;
+};
 
 static struct acpi_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
index 028f844..090a0d9 100644
--- a/lib/power/power_amd_pstate_cpufreq.c
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -45,7 +45,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct amd_pstate_power_info {
+struct __rte_cache_aligned amd_pstate_power_info {
 	uint32_t lcore_id;                   /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -58,7 +58,7 @@ struct amd_pstate_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c
index 3ddf39b..32aaacb 100644
--- a/lib/power/power_cppc_cpufreq.c
+++ b/lib/power/power_cppc_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct cppc_power_info {
+struct __rte_cache_aligned cppc_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -61,7 +61,7 @@ struct cppc_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_intel_uncore.c b/lib/power/power_intel_uncore.c
index 3ce8fcc..9c152e4 100644
--- a/lib/power/power_intel_uncore.c
+++ b/lib/power/power_intel_uncore.c
@@ -29,7 +29,7 @@
 		"/sys/devices/system/cpu/intel_uncore_frequency/package_%02u_die_%02u/initial_min_freq_khz"
 
 
-struct uncore_power_info {
+struct __rte_cache_aligned uncore_power_info {
 	unsigned int die;                  /* Core die id */
 	unsigned int pkg;                  /* Package id */
 	uint32_t freqs[MAX_UNCORE_FREQS];  /* Frequency array */
@@ -41,7 +41,7 @@ struct uncore_power_info {
 	uint32_t org_max_freq;             /* Original max freq of uncore */
 	uint32_t init_max_freq;            /* System max uncore freq */
 	uint32_t init_min_freq;            /* System min uncore freq */
-} __rte_cache_aligned;
+};
 
 static struct uncore_power_info uncore_info[RTE_MAX_NUMA_NODES][MAX_NUMA_DIE];
 
diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
index 73138dc..2343121 100644
--- a/lib/power/power_pstate_cpufreq.c
+++ b/lib/power/power_pstate_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 	POWER_UNKNOWN
 };
 
-struct pstate_power_info {
+struct __rte_cache_aligned pstate_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -64,7 +64,7 @@ struct pstate_power_info {
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint16_t priority_core;              /**< High Performance core */
-} __rte_cache_aligned;
+};
 
 
 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index 591fc69..b1c18a5 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -55,7 +55,7 @@ struct queue_list_entry {
 	const struct rte_eth_rxtx_callback *cb;
 };
 
-struct pmd_core_cfg {
+struct __rte_cache_aligned pmd_core_cfg {
 	TAILQ_HEAD(queue_list_head, queue_list_entry) head;
 	/**< List of queues associated with this lcore */
 	size_t n_queues;
@@ -68,7 +68,7 @@ struct pmd_core_cfg {
 	/**< Number of queues ready to enter power optimized state */
 	uint64_t sleep_target;
 	/**< Prevent a queue from triggering sleep multiple times */
-} __rte_cache_aligned;
+};
 static struct pmd_core_cfg lcore_cfgs[RTE_MAX_LCORE];
 
 static inline bool
-- 
1.8.3.1

[PATCH v4 22/39] rawdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rawdev/rte_rawdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
index 7d5764d..640037b 100644
--- a/lib/rawdev/rte_rawdev.h
+++ b/lib/rawdev/rte_rawdev.h
@@ -279,7 +279,7 @@
  * It is a placeholder for PMD specific data, encapsulating only information
  * related to framework.
  */
-struct rte_rawdev {
+struct __rte_cache_aligned rte_rawdev {
 	/**< Socket ID where memory is allocated */
 	int socket_id;
 	/**< Device ID for this instance */
@@ -300,7 +300,7 @@ struct rte_rawdev {
 	rte_rawdev_obj_t dev_private;
 	/**< Device name */
 	char name[RTE_RAWDEV_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 /** @internal The pool of rte_rawdev structures. */
 extern struct rte_rawdev *rte_rawdevs;
-- 
1.8.3.1

[PATCH v4 23/39] port: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/port/rte_port_frag.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index 883601a..0940f94 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -34,7 +34,7 @@
 			struct rte_mempool *pool_direct,
 			struct rte_mempool *pool_indirect);
 
-struct rte_port_ring_reader_frag {
+struct __rte_cache_aligned rte_port_ring_reader_frag {
 	struct rte_port_in_stats stats;
 
 	/* Input parameters */
@@ -53,7 +53,7 @@ struct rte_port_ring_reader_frag {
 	uint32_t pos_frags;
 
 	frag_op f_frag;
-} __rte_cache_aligned;
+};
 
 static void *
 rte_port_ring_reader_frag_create(void *params, int socket_id, int is_ipv4)
-- 
1.8.3.1

[PATCH v4 24/39] pdcp: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pdcp/rte_pdcp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/pdcp/rte_pdcp.h b/lib/pdcp/rte_pdcp.h
index dd8b6e4..f74524f 100644
--- a/lib/pdcp/rte_pdcp.h
+++ b/lib/pdcp/rte_pdcp.h
@@ -49,7 +49,7 @@ typedef uint16_t (*rte_pdcp_post_p_t)(const struct rte_pdcp_entity *entity,
  * A PDCP entity is associated either to the control plane or the user plane
  * depending on which radio bearer it is carrying data for.
  */
-struct rte_pdcp_entity {
+struct __rte_cache_aligned rte_pdcp_entity {
 	/** Entity specific pre-process handle. */
 	rte_pdcp_pre_p_t pre_process;
 	/** Entity specific post-process handle. */
@@ -66,7 +66,7 @@ struct rte_pdcp_entity {
 	 * hold additionally 'max_pkt_cache' number of packets.
 	 */
 	uint32_t max_pkt_cache;
-} __rte_cache_aligned;
+};
 
 /**
  * Callback function type for t-Reordering timer start, set during PDCP entity establish.
-- 
1.8.3.1

[PATCH v4 25/39] node: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/node/node_private.h | 4 ++--
 lib/node/pkt_cls.c      | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/node/node_private.h b/lib/node/node_private.h
index 2b9bad1..ff04659 100644
--- a/lib/node/node_private.h
+++ b/lib/node/node_private.h
@@ -51,9 +51,9 @@ struct node_mbuf_priv1 {
 /**
  * Node mbuf private area 2.
  */
-struct node_mbuf_priv2 {
+struct __rte_cache_aligned node_mbuf_priv2 {
 	uint64_t priv_data;
-} __rte_cache_aligned;
+};
 
 #define NODE_MBUF_PRIV2_SIZE sizeof(struct node_mbuf_priv2)
 
diff --git a/lib/node/pkt_cls.c b/lib/node/pkt_cls.c
index a8302b8..9d21b7f 100644
--- a/lib/node/pkt_cls.c
+++ b/lib/node/pkt_cls.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2020 Marvell.
  */
 
+#include <stdalign.h>
+
 #include <rte_graph.h>
 #include <rte_graph_worker.h>
 
@@ -9,7 +11,7 @@
 #include "node_private.h"
 
 /* Next node for each ptype, default is '0' is "pkt_drop" */
-static const uint8_t p_nxt[256] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint8_t p_nxt[256] = {
 	[RTE_PTYPE_L3_IPV4] = PKT_CLS_NEXT_IP4_LOOKUP,
 
 	[RTE_PTYPE_L3_IPV4_EXT] = PKT_CLS_NEXT_IP4_LOOKUP,
-- 
1.8.3.1

[PATCH v4 26/39] mldev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mldev/rte_mldev.h      | 4 ++--
 lib/mldev/rte_mldev_core.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/mldev/rte_mldev.h b/lib/mldev/rte_mldev.h
index 5cf6f05..457dc01 100644
--- a/lib/mldev/rte_mldev.h
+++ b/lib/mldev/rte_mldev.h
@@ -421,7 +421,7 @@ struct rte_ml_buff_seg {
  * This structure contains data related to performing an ML operation on the buffers using
  * the model specified through model_id.
  */
-struct rte_ml_op {
+struct __rte_cache_aligned rte_ml_op {
 	uint16_t model_id;
 	/**< Model ID to be used for the operation. */
 	uint16_t nb_batches;
@@ -469,7 +469,7 @@ struct rte_ml_op {
 	 * dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-} __rte_cache_aligned;
+};
 
 /* Enqueue/Dequeue operations */
 
diff --git a/lib/mldev/rte_mldev_core.h b/lib/mldev/rte_mldev_core.h
index 2279b1d..b3bd281 100644
--- a/lib/mldev/rte_mldev_core.h
+++ b/lib/mldev/rte_mldev_core.h
@@ -626,7 +626,7 @@ struct rte_ml_dev_data {
  *
  * The data structure associated with each ML device.
  */
-struct rte_ml_dev {
+struct __rte_cache_aligned rte_ml_dev {
 	/** Pointer to PMD enqueue function. */
 	mldev_enqueue_t enqueue_burst;
 
@@ -647,7 +647,7 @@ struct rte_ml_dev {
 
 	/** Flag indicating the device is attached. */
 	__extension__ uint8_t attached : 1;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v4 27/39] mempool: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index 6fa4d48..23fd5c8 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -34,6 +34,7 @@
  * user cache created with rte_mempool_cache_create().
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <inttypes.h>
@@ -66,7 +67,7 @@
  * captured since they can be calculated from other stats.
  * For example: put_cache_objs = put_objs - put_common_pool_objs.
  */
-struct rte_mempool_debug_stats {
+struct __rte_cache_aligned rte_mempool_debug_stats {
 	uint64_t put_bulk;             /**< Number of puts. */
 	uint64_t put_objs;             /**< Number of objects successfully put. */
 	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
@@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
 	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
 	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 #endif
 
 /**
  * A structure that stores a per-core object cache.
  */
-struct rte_mempool_cache {
+struct __rte_cache_aligned rte_mempool_cache {
 	uint32_t size;	      /**< Size of the cache */
 	uint32_t flushthresh; /**< Threshold before we flush excess elements */
 	uint32_t len;	      /**< Current cache count */
@@ -109,8 +110,8 @@ struct rte_mempool_cache {
 	 * Cache is allocated to this size to allow it to overflow in certain
 	 * cases to avoid needless emptying of cache.
 	 */
-	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
+};
 
 /**
  * A structure that stores the size of mempool elements.
@@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
  * The structure is cache-line aligned to avoid ABI breakages in
  * a number of cases when something small is added.
  */
-struct rte_mempool_info {
+struct __rte_cache_aligned rte_mempool_info {
 	/** Number of objects in the contiguous block */
 	unsigned int contig_block_size;
-} __rte_cache_aligned;
+};
 
 /**
  * The RTE mempool structure.
  */
-struct rte_mempool {
+struct __rte_cache_aligned rte_mempool {
 	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
 	union {
 		void *pool_data;         /**< Ring or pool to store objects. */
@@ -268,7 +269,7 @@ struct rte_mempool {
 	 */
 	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
 #endif
-}  __rte_cache_aligned;
+};
 
 /** Spreading among memory channels not required. */
 #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
@@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
 
 
 /** Structure defining mempool operations structure */
-struct rte_mempool_ops {
+struct __rte_cache_aligned rte_mempool_ops {
 	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
 	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
 	rte_mempool_free_t free;         /**< Free the external pool. */
@@ -713,7 +714,7 @@ struct rte_mempool_ops {
 	 * Dequeue a number of contiguous object blocks.
 	 */
 	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
-} __rte_cache_aligned;
+};
 
 #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
 
@@ -726,14 +727,14 @@ struct rte_mempool_ops {
  * any function pointers stored directly in the mempool struct would not be.
  * This results in us simply having "ops_index" in the mempool struct.
  */
-struct rte_mempool_ops_table {
+struct __rte_cache_aligned rte_mempool_ops_table {
 	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
 	uint32_t num_ops;      /**< Number of used ops structs in the table. */
 	/**
 	 * Storage for all possible ops structs.
 	 */
 	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
-} __rte_cache_aligned;
+};
 
 /** Array of registered ops structs. */
 extern struct rte_mempool_ops_table rte_mempool_ops_table;
-- 
1.8.3.1

[PATCH v4 28/39] member: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/member/rte_member.h        | 8 ++++----
 lib/member/rte_member_ht.h     | 4 ++--
 lib/member/rte_member_sketch.c | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/member/rte_member.h b/lib/member/rte_member.h
index 3278bbb..aec192e 100644
--- a/lib/member/rte_member.h
+++ b/lib/member/rte_member.h
@@ -139,7 +139,7 @@ typedef void (*sketch_delete_fn_t)(const struct rte_member_setsum *ss,
 				   const void *key);
 
 /** @internal setsummary structure. */
-struct rte_member_setsum {
+struct __rte_cache_aligned rte_member_setsum {
 	enum rte_member_setsum_type type; /* Type of the set summary. */
 	uint32_t key_len;		/* Length of key. */
 	uint32_t prim_hash_seed;	/* Primary hash function seed. */
@@ -185,14 +185,14 @@ struct rte_member_setsum {
 #ifdef RTE_ARCH_X86
 	bool use_avx512;
 #endif
-} __rte_cache_aligned;
+};
 
 /**
  * Parameters used when create the set summary table. Currently user can
  * specify two types of setsummary: HT based and vBF. For HT based, user can
  * specify cache or non-cache mode. Here is a table to describe some differences
  */
-struct rte_member_parameters {
+struct __rte_cache_aligned rte_member_parameters {
 	const char *name;			/**< Name of the hash. */
 
 	/**
@@ -326,7 +326,7 @@ struct rte_member_parameters {
 	uint32_t extra_flag;
 
 	int socket_id;			/**< NUMA Socket ID for memory. */
-} __rte_cache_aligned;
+};
 
 /**
  * Find an existing set-summary and return a pointer to it.
diff --git a/lib/member/rte_member_ht.h b/lib/member/rte_member_ht.h
index 9e24ccd..c9673e3 100644
--- a/lib/member/rte_member_ht.h
+++ b/lib/member/rte_member_ht.h
@@ -15,10 +15,10 @@
 typedef uint16_t member_sig_t;			/* signature size is 16 bit */
 
 /* The bucket struct for ht setsum */
-struct member_ht_bucket {
+struct __rte_cache_aligned member_ht_bucket {
 	member_sig_t sigs[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte signature */
 	member_set_t sets[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte set */
-} __rte_cache_aligned;
+};
 
 int
 rte_member_create_ht(struct rte_member_setsum *ss,
diff --git a/lib/member/rte_member_sketch.c b/lib/member/rte_member_sketch.c
index e006e83..15af678 100644
--- a/lib/member/rte_member_sketch.c
+++ b/lib/member/rte_member_sketch.c
@@ -23,7 +23,7 @@
 #include "rte_member_sketch_avx512.h"
 #endif /* CC_AVX512_SUPPORT */
 
-struct sketch_runtime {
+struct __rte_cache_aligned sketch_runtime {
 	uint64_t pkt_cnt;
 	uint32_t until_next;
 	int converged;
@@ -31,7 +31,7 @@ struct sketch_runtime {
 	struct node *report_array;
 	void *key_slots;
 	struct rte_ring *free_key_slots;
-} __rte_cache_aligned;
+};
 
 /*
  * Geometric sampling to calculate how many packets needs to be
-- 
1.8.3.1

[PATCH v4 29/39] lpm: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/lpm/rte_lpm.h  | 5 +++--
 lib/lpm/rte_lpm6.c | 8 ++++----
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index f57977b..f311fd9 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -11,6 +11,7 @@
  * RTE Longest Prefix Match (LPM)
  */
 
+#include <stdalign.h>
 #include <errno.h>
 #include <stdint.h>
 
@@ -118,8 +119,8 @@ struct rte_lpm_config {
 /** @internal LPM structure. */
 struct rte_lpm {
 	/* LPM Tables. */
-	struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 	struct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */
 };
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 271bc48..ed5970c 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -98,16 +98,16 @@ struct rte_lpm6 {
 
 	/* LPM Tables. */
 	struct rte_hash *rules_tbl; /**< LPM rules. */
-	struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 
 	uint32_t *tbl8_pool; /**< pool of indexes of free tbl8s */
 	uint32_t tbl8_pool_pos; /**< current position in the tbl8 pool */
 
 	struct rte_lpm_tbl8_hdr *tbl8_hdrs; /* array of tbl8 headers */
 
-	struct rte_lpm6_tbl_entry tbl8[0]
-			__rte_cache_aligned; /**< LPM tbl8 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl8[0];
+			/**< LPM tbl8 table. */
 };
 
 /*
-- 
1.8.3.1

[PATCH v4 30/39] ipsec: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ipsec/rte_ipsec.h | 4 ++--
 lib/ipsec/sa.h        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index 44cecab..f15f6f2 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
  * - pointer to security/crypto session, plus other related data
  * - session/device specific functions to prepare/process IPsec packets.
  */
-struct rte_ipsec_session {
+struct __rte_cache_aligned rte_ipsec_session {
 	/**
 	 * SA that session belongs to.
 	 * Note that multiple sessions can belong to the same SA.
@@ -77,7 +77,7 @@ struct rte_ipsec_session {
 	};
 	/** functions to prepare/process IPsec packets */
 	struct rte_ipsec_sa_pkt_func pkt_func;
-} __rte_cache_aligned;
+};
 
 /**
  * Checks that inside given rte_ipsec_session crypto/security fields
diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
index 4b30bea..2560d33 100644
--- a/lib/ipsec/sa.h
+++ b/lib/ipsec/sa.h
@@ -75,7 +75,7 @@ enum sa_algo_type	{
 	ALGO_TYPE_MAX
 };
 
-struct rte_ipsec_sa {
+struct __rte_cache_aligned rte_ipsec_sa {
 
 	uint64_t type;     /* type of given SA */
 	uint64_t udata;    /* user defined */
@@ -141,7 +141,7 @@ struct rte_ipsec_sa {
 		} errors;
 	} statistics;
 
-} __rte_cache_aligned;
+};
 
 int
 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
-- 
1.8.3.1

[PATCH v4 31/39] jobstats: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/jobstats/rte_jobstats.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/jobstats/rte_jobstats.h b/lib/jobstats/rte_jobstats.h
index 45b460e..bdd85fe 100644
--- a/lib/jobstats/rte_jobstats.h
+++ b/lib/jobstats/rte_jobstats.h
@@ -32,7 +32,7 @@
 typedef void (*rte_job_update_period_cb_t)(struct rte_jobstats *job,
 		int64_t job_result);
 
-struct rte_jobstats {
+struct __rte_cache_aligned rte_jobstats {
 	uint64_t period;
 	/**< Estimated period of execution. */
 
@@ -65,9 +65,9 @@ struct rte_jobstats {
 
 	struct rte_jobstats_context *context;
 	/**< Job stats context object that is executing this job. */
-} __rte_cache_aligned;
+};
 
-struct rte_jobstats_context {
+struct __rte_cache_aligned rte_jobstats_context {
 	/** Variable holding time at different points:
 	 * -# loop start time if loop was started but no job executed yet.
 	 * -# job start time if job is currently executing.
@@ -111,7 +111,7 @@ struct rte_jobstats_context {
 
 	uint64_t loop_cnt;
 	/**< Total count of executed loops with at least one executed job. */
-} __rte_cache_aligned;
+};
 
 /**
  * Initialize given context object with default values.
-- 
1.8.3.1

[PATCH v4 32/39] bpf: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/bpf/bpf_pkt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
index 793a75d..aaca935 100644
--- a/lib/bpf/bpf_pkt.c
+++ b/lib/bpf/bpf_pkt.c
@@ -23,7 +23,7 @@
  * information about installed BPF rx/tx callback
  */
 
-struct bpf_eth_cbi {
+struct __rte_cache_aligned bpf_eth_cbi {
 	/* used by both data & control path */
 	RTE_ATOMIC(uint32_t) use;    /*usage counter */
 	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
@@ -33,7 +33,7 @@ struct bpf_eth_cbi {
 	LIST_ENTRY(bpf_eth_cbi) link;
 	uint16_t port;
 	uint16_t queue;
-} __rte_cache_aligned;
+};
 
 /*
  * Odd number means that callback is used by datapath.
-- 
1.8.3.1

[PATCH v4 33/39] compressdev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/compressdev/rte_comp.h                 | 4 ++--
 lib/compressdev/rte_compressdev_internal.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
index 3606ebf..830a240 100644
--- a/lib/compressdev/rte_comp.h
+++ b/lib/compressdev/rte_comp.h
@@ -356,7 +356,7 @@ struct rte_comp_xform {
  * Comp operations are enqueued and dequeued in comp PMDs using the
  * rte_compressdev_enqueue_burst() / rte_compressdev_dequeue_burst() APIs
  */
-struct rte_comp_op {
+struct __rte_cache_aligned rte_comp_op {
 	enum rte_comp_op_type op_type;
 	union {
 		void *private_xform;
@@ -478,7 +478,7 @@ struct rte_comp_op {
 	 * will be set to RTE_COMP_OP_STATUS_SUCCESS after operation
 	 * is successfully processed by a PMD
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Creates an operation pool
diff --git a/lib/compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
index 01b7764..8a626d3 100644
--- a/lib/compressdev/rte_compressdev_internal.h
+++ b/lib/compressdev/rte_compressdev_internal.h
@@ -69,7 +69,7 @@ typedef uint16_t (*compressdev_enqueue_pkt_burst_t)(void *qp,
 		struct rte_comp_op **ops, uint16_t nb_ops);
 
 /** The data structure associated with each comp device. */
-struct rte_compressdev {
+struct __rte_cache_aligned rte_compressdev {
 	compressdev_dequeue_pkt_burst_t dequeue_burst;
 	/**< Pointer to PMD receive function */
 	compressdev_enqueue_pkt_burst_t enqueue_burst;
@@ -87,7 +87,7 @@ struct rte_compressdev {
 	__extension__
 	uint8_t attached : 1;
 	/**< Flag indicating the device is attached */
-} __rte_cache_aligned;
+};
 
 /**
  *
@@ -96,7 +96,7 @@ struct rte_compressdev {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_compressdev_data {
+struct __rte_cache_aligned rte_compressdev_data {
 	uint8_t dev_id;
 	/**< Compress device identifier */
 	int socket_id;
@@ -115,7 +115,7 @@ struct rte_compressdev_data {
 
 	void *dev_private;
 	/**< PMD-specific private data */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
-- 
1.8.3.1

[PATCH v4 34/39] cryptodev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/cryptodev/cryptodev_pmd.h      | 8 ++++----
 lib/cryptodev/rte_cryptodev_core.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 0732b35..6229ad4 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -61,7 +61,7 @@ struct rte_cryptodev_pmd_init_params {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_cryptodev_data {
+struct __rte_cache_aligned rte_cryptodev_data {
 	/** Device ID for this instance */
 	uint8_t dev_id;
 	/** Socket ID where memory is allocated */
@@ -82,10 +82,10 @@ struct rte_cryptodev_data {
 
 	/** PMD-specific private data */
 	void *dev_private;
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
+struct __rte_cache_aligned rte_cryptodev {
 	/** Pointer to PMD dequeue function. */
 	dequeue_pkt_burst_t dequeue_burst;
 	/** Pointer to PMD enqueue function. */
@@ -117,7 +117,7 @@ struct rte_cryptodev {
 	struct rte_cryptodev_cb_rcu *enq_cbs;
 	/** User application callback for post dequeue processing */
 	struct rte_cryptodev_cb_rcu *deq_cbs;
-} __rte_cache_aligned;
+};
 
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index 5de89d0..8d7e58d 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -40,7 +40,7 @@ struct rte_cryptodev_qpdata {
 	struct rte_cryptodev_cb_rcu *deq_cb;
 };
 
-struct rte_crypto_fp_ops {
+struct __rte_cache_aligned rte_crypto_fp_ops {
 	/** PMD enqueue burst function. */
 	enqueue_pkt_burst_t enqueue_burst;
 	/** PMD dequeue burst function. */
@@ -49,7 +49,7 @@ struct rte_crypto_fp_ops {
 	struct rte_cryptodev_qpdata qp;
 	/** Reserved for future ops. */
 	uintptr_t reserved[3];
-} __rte_cache_aligned;
+};
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v4 35/39] dispatcher: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/dispatcher/rte_dispatcher.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index 95dd41b..4061a73 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -41,14 +41,14 @@ struct rte_dispatcher_finalizer {
 	void *finalize_data;
 };
 
-struct rte_dispatcher_lcore {
+struct __rte_cache_aligned rte_dispatcher_lcore {
 	uint8_t num_ports;
 	uint16_t num_handlers;
 	int32_t prio_count;
 	struct rte_dispatcher_lcore_port ports[EVD_MAX_PORTS_PER_LCORE];
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
-} __rte_cache_aligned;
+};
 
 struct rte_dispatcher {
 	uint8_t event_dev_id;
-- 
1.8.3.1

[PATCH v4 36/39] fib: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@ struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@ struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t
-- 
1.8.3.1

[PATCH v4 37/39] gpudev: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/gpudev/gpudev_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h
index 0b1e7f2..37b6ae3 100644
--- a/lib/gpudev/gpudev_driver.h
+++ b/lib/gpudev/gpudev_driver.h
@@ -72,7 +72,7 @@ struct rte_gpu_mpshared {
 	RTE_ATOMIC(uint16_t) process_refcnt; /* Updated by this library. */
 };
 
-struct rte_gpu {
+struct __rte_cache_aligned rte_gpu {
 	/* Backing device. */
 	struct rte_device *device;
 	/* Data shared between processes. */
@@ -85,7 +85,7 @@ struct rte_gpu {
 	enum rte_gpu_state process_state; /* Updated by this library. */
 	/* Driver-specific private data for the running process. */
 	void *process_private;
-} __rte_cache_aligned;
+};
 
 __rte_internal
 struct rte_gpu *rte_gpu_get_by_name(const char *name);
-- 
1.8.3.1

[PATCH v4 38/39] graph: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/graph/graph_private.h           |  4 ++--
 lib/graph/graph_stats.c             |  4 ++--
 lib/graph/rte_graph.h               |  4 ++--
 lib/graph/rte_graph_worker_common.h | 17 ++++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/graph/graph_private.h b/lib/graph/graph_private.h
index fb88d4b..7e4d9f8 100644
--- a/lib/graph/graph_private.h
+++ b/lib/graph/graph_private.h
@@ -71,11 +71,11 @@ struct node {
  * Structure that holds the graph scheduling workqueue node stream.
  * Used for mcore dispatch model.
  */
-struct graph_mcore_dispatch_wq_node {
+struct __rte_cache_aligned graph_mcore_dispatch_wq_node {
 	rte_graph_off_t node_off;
 	uint16_t nb_objs;
 	void *objs[RTE_GRAPH_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/graph/graph_stats.c b/lib/graph/graph_stats.c
index cc32245..2fb808b 100644
--- a/lib/graph/graph_stats.c
+++ b/lib/graph/graph_stats.c
@@ -28,7 +28,7 @@ struct cluster_node {
 	struct rte_node *nodes[];
 };
 
-struct rte_graph_cluster_stats {
+struct __rte_cache_aligned rte_graph_cluster_stats {
 	/* Header */
 	rte_graph_cluster_stats_cb_t fn;
 	uint32_t cluster_node_size; /* Size of struct cluster_node */
@@ -38,7 +38,7 @@ struct rte_graph_cluster_stats {
 	size_t sz;
 
 	struct cluster_node clusters[];
-} __rte_cache_aligned;
+};
 
 #define boarder_model_dispatch()                                                              \
 	fprintf(f, "+-------------------------------+---------------+--------" \
diff --git a/lib/graph/rte_graph.h b/lib/graph/rte_graph.h
index 2d37d5e..ecfec20 100644
--- a/lib/graph/rte_graph.h
+++ b/lib/graph/rte_graph.h
@@ -200,7 +200,7 @@ struct rte_graph_cluster_stats_param {
  *
  * @see struct rte_graph_cluster_stats_param::fn
  */
-struct rte_graph_cluster_node_stats {
+struct __rte_cache_aligned rte_graph_cluster_node_stats {
 	uint64_t ts;	    /**< Current timestamp. */
 	uint64_t calls;	    /**< Current number of calls made. */
 	uint64_t objs;      /**< Current number of objs processed. */
@@ -225,7 +225,7 @@ struct rte_graph_cluster_node_stats {
 	rte_node_t id;	/**< Node identifier of stats. */
 	uint64_t hz;	/**< Cycles per seconds. */
 	char name[RTE_NODE_NAMESIZE];	/**< Name of the node. */
-} __rte_cache_aligned;
+};
 
 /**
  * Create Graph.
diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_worker_common.h
index 4045a7a..36d864e 100644
--- a/lib/graph/rte_graph_worker_common.h
+++ b/lib/graph/rte_graph_worker_common.h
@@ -12,6 +12,8 @@
  * process, enqueue and move streams of objects to the next nodes.
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_cycles.h>
 #include <rte_prefetch.h>
@@ -43,7 +45,7 @@
  *
  * Data structure to hold graph data.
  */
-struct rte_graph {
+struct __rte_cache_aligned rte_graph {
 	/* Fast path area. */
 	uint32_t tail;		     /**< Tail of circular buffer. */
 	uint32_t head;		     /**< Head of circular buffer. */
@@ -57,7 +59,8 @@ struct rte_graph {
 	union {
 		/* Fast schedule area for mcore dispatch model */
 		struct {
-			struct rte_graph_rq_head *rq __rte_cache_aligned; /* The run-queue */
+			alignas(RTE_CACHE_LINE_SIZE) struct rte_graph_rq_head *rq;
+				/* The run-queue */
 			struct rte_graph_rq_head rq_head; /* The head for run-queue list */
 
 			unsigned int lcore_id;  /**< The graph running Lcore. */
@@ -77,14 +80,14 @@ struct rte_graph {
 	uint64_t nb_pkt_to_capture;
 	char pcap_filename[RTE_GRAPH_PCAP_FILE_SZ];  /**< Pcap filename. */
 	uint64_t fence;			/**< Fence. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
  *
  * Data structure to hold node data.
  */
-struct rte_node {
+struct __rte_cache_aligned rte_node {
 	/* Slow path area  */
 	uint64_t fence;		/**< Fence. */
 	rte_graph_off_t next;	/**< Index to next node. */
@@ -109,7 +112,7 @@ struct rte_node {
 	};
 	/* Fast path area  */
 #define RTE_NODE_CTX_SZ 16
-	uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Context. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t ctx[RTE_NODE_CTX_SZ]; /**< Node Context. */
 	uint16_t size;		/**< Total number of objects available. */
 	uint16_t idx;		/**< Number of objects used. */
 	rte_graph_off_t off;	/**< Offset of node in the graph reel. */
@@ -124,8 +127,8 @@ struct rte_node {
 			rte_node_process_t process; /**< Process function. */
 			uint64_t process_u64;
 		};
-	struct rte_node *nodes[] __rte_cache_min_aligned; /**< Next nodes. */
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) struct rte_node *nodes[]; /**< Next nodes. */
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v4 39/39] ip_frag: use C11 alignas

[Tyler Retzlaff]

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ip_frag/ip_reassembly.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
index a9f97ae..5443c73 100644
--- a/lib/ip_frag/ip_reassembly.h
+++ b/lib/ip_frag/ip_reassembly.h
@@ -47,7 +47,7 @@ struct ip_frag_key {
  * Fragmented packet to reassemble.
  * First two entries in the frags[] array are for the last and first fragments.
  */
-struct ip_frag_pkt {
+struct __rte_cache_aligned ip_frag_pkt {
 	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
 	struct ip_frag_key key;                /* fragmentation key */
 	uint64_t start;                        /* creation timestamp */
@@ -55,20 +55,20 @@ struct ip_frag_pkt {
 	uint32_t frag_size;                    /* size of fragments received */
 	uint32_t last_idx;                     /* index of next entry to fill */
 	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
-} __rte_cache_aligned;
+};
 
  /* fragments tailq */
 RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
 
 /* fragmentation table statistics */
-struct ip_frag_tbl_stat {
+struct __rte_cache_aligned ip_frag_tbl_stat {
 	uint64_t find_num;     /* total # of find/insert attempts. */
 	uint64_t add_num;      /* # of add ops. */
 	uint64_t del_num;      /* # of del ops. */
 	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
 	uint64_t fail_total;   /* total # of add failures. */
 	uint64_t fail_nospace; /* # of 'no space' add failures. */
-} __rte_cache_aligned;
+};
 
 /* fragmentation table */
 struct rte_ip_frag_tbl {
-- 
1.8.3.1

Re: [PATCH v4 01/39] eal: use C11 alignas

[Thomas Monjalon]

14/02/2024 17:35, Tyler Retzlaff:
> * Expand __rte_aligned(a) to __declspec(align(a)) when building
>   with MSVC.
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).

We miss an explanation about why __rte_aligned() and alignas() are different.
If __rte_aligned() is only for struct definitions, maybe we should have
a different name?
At least we need a Doxygen comment to guide about its usage.


[...]
>  #ifdef RTE_TOOLCHAIN_MSVC
> -#define __rte_aligned(a)
> +#define __rte_aligned(a) __declspec(align(a))
>  #else
>  #define __rte_aligned(a) __attribute__((__aligned__(a)))
>  #endif
[...]
>  /** Force alignment to cache line. */
> -#ifdef RTE_TOOLCHAIN_MSVC
> -#define __rte_cache_aligned
> -#else
>  #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
> -#endif
>  
>  /** Force minimum cache line alignment. */
>  #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)

[PATCH v5 00/39] use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

** NOTE **

Finally, In the interest of not creating more API (internal or not) the
series does not introduce a wrapper for C11 alignas. If we don't introduce
a macro an application can't take a dependency.

v5:
  * rebase series.
  * reword all commit messages with why the change is necessary.
  * document guidance for the usage of __rte_aligned macro indicating
    that it should be used for type alignment only and advising that for
    variable alignment standard C11 alignas(a) should be preferred.

v4:
  * restore explicit alignment of 8-byte integers in mbuf and
    ring patches, natural alignment may be 4-bytes on 32-bit
    targets.
v3:
  * add missing patches for __rte_cache_aligned and
    __rte_cache_min_aligned
v2:
  * add missing #include <stdalign.h> for alignas macro.

Tyler Retzlaff (39):
  eal: use C11 alignas
  eal: redefine macro to be integer literal for MSVC
  stack: use C11 alignas
  sched: use C11 alignas
  ring: use C11 alignas
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: use C11 alignas
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  vhost: use C11 alignas
  timer: use C11 alignas
  table: use C11 alignas
  reorder: use C11 alignas
  regexdev: use C11 alignas
  rcu: use C11 alignas
  power: use C11 alignas
  rawdev: use C11 alignas
  port: use C11 alignas
  pdcp: use C11 alignas
  node: use C11 alignas
  mldev: use C11 alignas
  mempool: use C11 alignas
  member: use C11 alignas
  lpm: use C11 alignas
  ipsec: use C11 alignas
  jobstats: use C11 alignas
  bpf: use C11 alignas
  compressdev: use C11 alignas
  cryptodev: use C11 alignas
  dispatcher: use C11 alignas
  fib: use C11 alignas
  gpudev: use C11 alignas
  graph: use C11 alignas
  ip_frag: use C11 alignas

 lib/acl/acl_run.h                          |  4 ++--
 lib/acl/acl_run_altivec.h                  |  6 ++++--
 lib/acl/acl_run_neon.h                     |  6 ++++--
 lib/bpf/bpf_pkt.c                          |  4 ++--
 lib/compressdev/rte_comp.h                 |  4 ++--
 lib/compressdev/rte_compressdev_internal.h |  8 +++----
 lib/cryptodev/cryptodev_pmd.h              |  8 +++----
 lib/cryptodev/rte_cryptodev_core.h         |  4 ++--
 lib/dispatcher/rte_dispatcher.c            |  4 ++--
 lib/distributor/distributor_private.h      | 34 ++++++++++++++++--------------
 lib/distributor/rte_distributor.c          |  5 +++--
 lib/dmadev/rte_dmadev_core.h               |  4 ++--
 lib/dmadev/rte_dmadev_pmd.h                |  8 +++----
 lib/eal/arm/include/rte_vect.h             |  4 ++--
 lib/eal/common/malloc_elem.h               |  4 ++--
 lib/eal/common/malloc_heap.h               |  4 ++--
 lib/eal/common/rte_keepalive.c             |  3 ++-
 lib/eal/common/rte_random.c                |  4 ++--
 lib/eal/common/rte_service.c               |  8 +++----
 lib/eal/include/generic/rte_atomic.h       |  4 ++--
 lib/eal/include/rte_common.h               | 23 +++++++++++++-------
 lib/eal/loongarch/include/rte_vect.h       |  8 +++----
 lib/eal/ppc/include/rte_vect.h             |  4 ++--
 lib/eal/riscv/include/rte_vect.h           |  4 ++--
 lib/eal/x86/include/rte_vect.h             |  9 +++++---
 lib/eal/x86/rte_power_intrinsics.c         | 10 +++++----
 lib/ethdev/ethdev_driver.h                 |  8 +++----
 lib/ethdev/rte_ethdev.h                    | 16 +++++++-------
 lib/ethdev/rte_ethdev_core.h               |  4 ++--
 lib/ethdev/rte_flow_driver.h               |  4 ++--
 lib/eventdev/event_timer_adapter_pmd.h     |  4 ++--
 lib/eventdev/eventdev_pmd.h                |  8 +++----
 lib/eventdev/rte_event_crypto_adapter.c    | 16 +++++++-------
 lib/eventdev/rte_event_dma_adapter.c       | 16 +++++++-------
 lib/eventdev/rte_event_eth_rx_adapter.c    |  8 +++----
 lib/eventdev/rte_event_eth_tx_adapter.c    |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c     |  9 ++++----
 lib/eventdev/rte_event_timer_adapter.h     |  8 +++----
 lib/eventdev/rte_eventdev.h                |  8 +++----
 lib/eventdev/rte_eventdev_core.h           |  4 ++--
 lib/fib/dir24_8.h                          |  4 +++-
 lib/fib/trie.h                             |  4 +++-
 lib/gpudev/gpudev_driver.h                 |  4 ++--
 lib/graph/graph_private.h                  |  4 ++--
 lib/graph/graph_stats.c                    |  4 ++--
 lib/graph/rte_graph.h                      |  4 ++--
 lib/graph/rte_graph_worker_common.h        | 17 +++++++++------
 lib/hash/rte_cuckoo_hash.h                 | 16 ++++++++------
 lib/hash/rte_thash.c                       |  4 +++-
 lib/hash/rte_thash.h                       |  8 +++----
 lib/ip_frag/ip_reassembly.h                |  8 +++----
 lib/ipsec/rte_ipsec.h                      |  4 ++--
 lib/ipsec/sa.h                             |  4 ++--
 lib/jobstats/rte_jobstats.h                |  8 +++----
 lib/lpm/rte_lpm.h                          |  5 +++--
 lib/lpm/rte_lpm6.c                         |  8 +++----
 lib/mbuf/rte_mbuf_core.h                   |  6 +++---
 lib/member/rte_member.h                    |  8 +++----
 lib/member/rte_member_ht.h                 |  4 ++--
 lib/member/rte_member_sketch.c             |  4 ++--
 lib/mempool/rte_mempool.h                  | 27 ++++++++++++------------
 lib/mldev/rte_mldev.h                      |  4 ++--
 lib/mldev/rte_mldev_core.h                 |  4 ++--
 lib/net/net_crc_avx512.c                   | 14 ++++++------
 lib/net/net_crc_neon.c                     | 11 +++++-----
 lib/net/net_crc_sse.c                      | 17 ++++++++-------
 lib/net/rte_arp.h                          |  8 +++----
 lib/net/rte_ether.h                        |  8 +++----
 lib/node/node_private.h                    |  4 ++--
 lib/node/pkt_cls.c                         |  4 +++-
 lib/pdcp/rte_pdcp.h                        |  4 ++--
 lib/pipeline/rte_pipeline.c                |  4 ++--
 lib/pipeline/rte_port_in_action.c          |  3 ++-
 lib/pipeline/rte_swx_ipsec.c               |  4 +++-
 lib/pipeline/rte_table_action.c            | 24 ++++++++++-----------
 lib/port/rte_port_frag.c                   |  4 ++--
 lib/power/power_acpi_cpufreq.c             |  4 ++--
 lib/power/power_amd_pstate_cpufreq.c       |  4 ++--
 lib/power/power_cppc_cpufreq.c             |  4 ++--
 lib/power/power_intel_uncore.c             |  4 ++--
 lib/power/power_pstate_cpufreq.c           |  4 ++--
 lib/power/rte_power_pmd_mgmt.c             |  4 ++--
 lib/rawdev/rte_rawdev.h                    |  4 ++--
 lib/rcu/rte_rcu_qsbr.h                     | 16 ++++++++------
 lib/regexdev/rte_regexdev_core.h           |  8 +++----
 lib/reorder/rte_reorder.c                  |  8 +++----
 lib/ring/rte_ring_core.h                   | 16 ++++++++------
 lib/ring/rte_ring_peek_zc.h                |  4 ++--
 lib/sched/rte_sched.c                      | 21 +++++++++---------
 lib/sched/rte_sched_common.h               |  2 --
 lib/stack/rte_stack.h                      | 16 ++++++++------
 lib/table/rte_swx_table_learner.c          |  4 ++--
 lib/table/rte_table_acl.c                  |  3 ++-
 lib/table/rte_table_array.c                |  7 +++---
 lib/table/rte_table_hash_cuckoo.c          |  4 +++-
 lib/table/rte_table_hash_ext.c             |  3 ++-
 lib/table/rte_table_hash_key16.c           |  4 +++-
 lib/table/rte_table_hash_key32.c           |  4 +++-
 lib/table/rte_table_hash_key8.c            |  4 +++-
 lib/table/rte_table_hash_lru.c             |  3 ++-
 lib/table/rte_table_lpm.c                  |  3 ++-
 lib/table/rte_table_lpm_ipv6.c             |  3 ++-
 lib/timer/rte_timer.c                      |  4 ++--
 lib/vhost/vhost.h                          |  8 +++----
 lib/vhost/vhost_crypto.c                   |  4 ++--
 105 files changed, 408 insertions(+), 346 deletions(-)

-- 
1.8.3.1

[PATCH v5 01/39] eal: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/common/malloc_elem.h         |  4 ++--
 lib/eal/common/malloc_heap.h         |  4 ++--
 lib/eal/common/rte_keepalive.c       |  3 ++-
 lib/eal/common/rte_random.c          |  4 ++--
 lib/eal/common/rte_service.c         |  8 ++++----
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         | 23 +++++++++++++++--------
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  4 ++--
 lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
 13 files changed, 47 insertions(+), 37 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
index 952ce73..c7ff671 100644
--- a/lib/eal/common/malloc_elem.h
+++ b/lib/eal/common/malloc_elem.h
@@ -20,7 +20,7 @@ enum elem_state {
 	ELEM_PAD  /* element is a padding-only header */
 };
 
-struct malloc_elem {
+struct __rte_cache_aligned malloc_elem {
 	struct malloc_heap *heap;
 	struct malloc_elem *volatile prev;
 	/**< points to prev elem in memseg */
@@ -48,7 +48,7 @@ struct malloc_elem {
 	size_t user_size;
 	uint64_t asan_cookie[2]; /* must be next to header_cookie */
 #endif
-} __rte_cache_aligned;
+};
 
 static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
 
diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
index 8f3ab57..0c49588 100644
--- a/lib/eal/common/malloc_heap.h
+++ b/lib/eal/common/malloc_heap.h
@@ -21,7 +21,7 @@
 /**
  * Structure to hold malloc heap
  */
-struct malloc_heap {
+struct __rte_cache_aligned malloc_heap {
 	rte_spinlock_t lock;
 	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
 	struct malloc_elem *volatile first;
@@ -31,7 +31,7 @@ struct malloc_heap {
 	unsigned int socket_id;
 	size_t total_size;
 	char name[RTE_HEAP_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 void *
 malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
index f6db973..391c1be 100644
--- a/lib/eal/common/rte_keepalive.c
+++ b/lib/eal/common/rte_keepalive.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2015-2016 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <inttypes.h>
 
 #include <rte_common.h>
@@ -19,7 +20,7 @@ struct rte_keepalive {
 		/*
 		 * Each element must be cache aligned to prevent false sharing.
 		 */
-		enum rte_keepalive_state core_state __rte_cache_aligned;
+		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
 	} live_data[RTE_KEEPALIVE_MAXCORES];
 
 	/** Last-seen-alive timestamps */
diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
index 7709b8f..90e91b3 100644
--- a/lib/eal/common/rte_random.c
+++ b/lib/eal/common/rte_random.c
@@ -13,14 +13,14 @@
 #include <rte_lcore.h>
 #include <rte_random.h>
 
-struct rte_rand_state {
+struct __rte_cache_aligned rte_rand_state {
 	uint64_t z1;
 	uint64_t z2;
 	uint64_t z3;
 	uint64_t z4;
 	uint64_t z5;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 /* One instance each for every lcore id-equipped thread, and one
  * additional instance to be shared by all others threads (i.e., all
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index d959c91..5637993 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -32,7 +32,7 @@
 #define RUNSTATE_RUNNING 1
 
 /* internal representation of a service */
-struct rte_service_spec_impl {
+struct __rte_cache_aligned rte_service_spec_impl {
 	/* public part of the struct */
 	struct rte_service_spec spec;
 
@@ -53,7 +53,7 @@ struct rte_service_spec_impl {
 	 * on currently.
 	 */
 	RTE_ATOMIC(uint32_t) num_mapped_cores;
-} __rte_cache_aligned;
+};
 
 struct service_stats {
 	RTE_ATOMIC(uint64_t) calls;
@@ -61,7 +61,7 @@ struct service_stats {
 };
 
 /* the internal values of a service core */
-struct core_state {
+struct __rte_cache_aligned core_state {
 	/* map of services IDs are run on this core */
 	uint64_t service_mask;
 	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
@@ -71,7 +71,7 @@ struct core_state {
 	RTE_ATOMIC(uint64_t) loops;
 	RTE_ATOMIC(uint64_t) cycles;
 	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
-} __rte_cache_aligned;
+};
 
 static uint32_t rte_service_count;
 static struct rte_service_spec_impl *rte_services;
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index 1cc1222..0908aa0 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -12,6 +12,8 @@
  * for DPDK.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -63,10 +65,19 @@
 #endif
 
 /**
- * Force alignment
+ * Force type alignment
+ *
+ * This macro should be used when alignment of a struct or union type
+ * is required. For toolchain compatibility it should appear between
+ * the {struct,union} keyword and tag. e.g.
+ *
+ *   struct __rte_aligned(8) tag { ... };
+ *
+ * If alignment of an object/variable is required then this macro should
+ * not be used, instead prefer C11 alignas(a).
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
@@ -538,18 +549,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
 #define RTE_CACHE_LINE_MIN_SIZE 64
 
 /** Force alignment to cache line. */
-#ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_cache_aligned
-#else
 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-#endif
 
 /** Force minimum cache line alignment. */
 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
 
 #define _RTE_CACHE_GUARD_HELPER2(unique) \
-	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) \
+	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
 #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
 /**
  * Empty cache lines, to guard against false sharing-like effects
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 532a2e6..6d9b642 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2020 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_lcore.h>
 #include <rte_rtm.h>
@@ -12,10 +14,10 @@
 /*
  * Per-lcore structure holding current status of C0.2 sleeps.
  */
-static struct power_wait_status {
+static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
 	rte_spinlock_t lock;
 	volatile void *monitor_addr; /**< NULL if not currently sleeping */
-} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
+} wait_status[RTE_MAX_LCORE];
 
 /*
  * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
@@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
 #endif
 }
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	void (*mmonitor)(volatile void *addr);
 	void (*mwait)(const uint64_t timeout);
-} __rte_cache_aligned power_monitor_ops;
+} power_monitor_ops;
 
 static inline void
 __umwait_wakeup(volatile void *addr)
-- 
1.8.3.1

[PATCH v5 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..441f1a0 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == 16, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v5 03/39] stack: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/stack/rte_stack.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..8ff0659 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
@@ -52,11 +54,11 @@ struct rte_stack_lf_list {
  */
 struct rte_stack_lf {
 	/** LIFO list of elements */
-	struct rte_stack_lf_list used __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list used;
 	/** LIFO list of free elements */
-	struct rte_stack_lf_list free __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list free;
 	/** LIFO elements */
-	struct rte_stack_lf_elem elems[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_elem elems[];
 };
 
 /* Structure containing the LIFO, its current length, and a lock for mutual
@@ -71,9 +73,9 @@ struct rte_stack_std {
 /* The RTE stack structure contains the LIFO structure itself, plus metadata
  * such as its name and memzone pointer.
  */
-struct rte_stack {
+struct __rte_cache_aligned rte_stack {
 	/** Name of the stack. */
-	char name[RTE_STACK_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_STACK_NAMESIZE];
 	/** Memzone containing the rte_stack structure. */
 	const struct rte_memzone *memzone;
 	uint32_t capacity; /**< Usable size of the stack. */
@@ -82,7 +84,7 @@ struct rte_stack {
 		struct rte_stack_lf stack_lf; /**< Lock-free LIFO structure. */
 		struct rte_stack_std stack_std;	/**< LIFO structure. */
 	};
-} __rte_cache_aligned;
+};
 
 /**
  * The stack uses lock-free push and pop functions. This flag is only
-- 
1.8.3.1

[PATCH v5 04/39] sched: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@ struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@ struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@ struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@ struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@ struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@ struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v5 05/39] ring: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ring/rte_ring_core.h    | 16 +++++++++-------
 lib/ring/rte_ring_peek_zc.h |  4 ++--
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..497d535 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -19,6 +19,8 @@
  * instead.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -78,7 +80,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(8) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(8) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
@@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
  * a problem.
  */
 struct rte_ring {
-	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
 	/**< Name of the ring. */
 	int flags;               /**< Flags supplied at creation. */
 	const struct rte_memzone *memzone;
@@ -129,20 +131,20 @@ struct rte_ring {
 	RTE_CACHE_GUARD;
 
 	/** Ring producer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail prod;
 		struct rte_ring_hts_headtail hts_prod;
 		struct rte_ring_rts_headtail rts_prod;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 
 	/** Ring consumer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail cons;
 		struct rte_ring_hts_headtail hts_cons;
 		struct rte_ring_rts_headtail rts_cons;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 };
diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
index 8fb279c..0b5e34b 100644
--- a/lib/ring/rte_ring_peek_zc.h
+++ b/lib/ring/rte_ring_peek_zc.h
@@ -79,7 +79,7 @@
  * This structure contains the pointers and length of the space
  * reserved on the ring storage.
  */
-struct rte_ring_zc_data {
+struct __rte_cache_aligned rte_ring_zc_data {
 	/* Pointer to the first space in the ring */
 	void *ptr1;
 	/* Pointer to the second space in the ring if there is wrap-around.
@@ -92,7 +92,7 @@ struct rte_ring_zc_data {
 	 * will give the number of elements available at ptr2.
 	 */
 	unsigned int n1;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
-- 
1.8.3.1

[PATCH v5 06/39] pipeline: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pipeline/rte_pipeline.c       |  4 ++--
 lib/pipeline/rte_port_in_action.c |  3 ++-
 lib/pipeline/rte_swx_ipsec.c      |  4 +++-
 lib/pipeline/rte_table_action.c   | 24 ++++++++++++------------
 4 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index 945bb02..a09a89f 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -104,7 +104,7 @@ struct rte_table {
 
 #define RTE_PIPELINE_MAX_NAME_SZ                           124
 
-struct rte_pipeline {
+struct __rte_cache_aligned rte_pipeline {
 	/* Input parameters */
 	char name[RTE_PIPELINE_MAX_NAME_SZ];
 	int socket_id;
@@ -132,7 +132,7 @@ struct rte_pipeline {
 	uint64_t pkts_mask;
 	uint64_t n_pkts_ah_drop;
 	uint64_t pkts_drop_mask;
-} __rte_cache_aligned;
+};
 
 static inline uint32_t
 rte_mask_get_next(uint64_t mask, uint32_t pos)
diff --git a/lib/pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
index 5818973..bbacaff 100644
--- a/lib/pipeline/rte_port_in_action.c
+++ b/lib/pipeline/rte_port_in_action.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2018 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -282,7 +283,7 @@ struct rte_port_in_action_profile *
 struct rte_port_in_action {
 	struct ap_config cfg;
 	struct ap_data data;
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static __rte_always_inline void *
diff --git a/lib/pipeline/rte_swx_ipsec.c b/lib/pipeline/rte_swx_ipsec.c
index 28576c2..76b853f 100644
--- a/lib/pipeline/rte_swx_ipsec.c
+++ b/lib/pipeline/rte_swx_ipsec.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2022 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
@@ -154,7 +156,7 @@ struct rte_swx_ipsec {
 	/*
 	 * Table memory.
 	 */
-	uint8_t memory[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[];
 };
 
 static inline struct ipsec_sa *
diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v5 07/39] net: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index 75285bd..32ed515 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -71,9 +71,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -290,11 +290,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v5 08/39] mbuf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mbuf/rte_mbuf_core.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..917a811 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -463,7 +463,7 @@ enum {
 /**
  * The generic rte_mbuf, containing a packet mbuf.
  */
-struct rte_mbuf {
+struct __rte_cache_aligned rte_mbuf {
 	RTE_MARKER cacheline0;
 
 	void *buf_addr;           /**< Virtual address of segment buffer. */
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
@@ -662,7 +662,7 @@ struct rte_mbuf {
 	uint16_t timesync;
 
 	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * Function typedef of callback to free externally attached buffer.
-- 
1.8.3.1

[PATCH v5 09/39] hash: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/hash/rte_cuckoo_hash.h | 16 +++++++++-------
 lib/hash/rte_thash.c       |  4 +++-
 lib/hash/rte_thash.h       |  8 ++++----
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.h b/lib/hash/rte_cuckoo_hash.h
index 8ea793c..a528f1d 100644
--- a/lib/hash/rte_cuckoo_hash.h
+++ b/lib/hash/rte_cuckoo_hash.h
@@ -11,6 +11,8 @@
 #ifndef _RTE_CUCKOO_HASH_H_
 #define _RTE_CUCKOO_HASH_H_
 
+#include <stdalign.h>
+
 #if defined(RTE_ARCH_X86)
 #include "rte_cmp_x86.h"
 #endif
@@ -117,10 +119,10 @@ enum cmp_jump_table_case {
 
 #define RTE_HASH_TSX_MAX_RETRY  10
 
-struct lcore_cache {
+struct __rte_cache_aligned lcore_cache {
 	unsigned len; /**< Cache len */
 	uint32_t objs[LCORE_CACHE_SIZE]; /**< Cache objects */
-} __rte_cache_aligned;
+};
 
 /* Structure that stores key-value pair */
 struct rte_hash_key {
@@ -141,7 +143,7 @@ enum rte_hash_sig_compare_function {
 };
 
 /** Bucket structure */
-struct rte_hash_bucket {
+struct __rte_cache_aligned rte_hash_bucket {
 	uint16_t sig_current[RTE_HASH_BUCKET_ENTRIES];
 
 	RTE_ATOMIC(uint32_t) key_idx[RTE_HASH_BUCKET_ENTRIES];
@@ -149,10 +151,10 @@ struct rte_hash_bucket {
 	uint8_t flag[RTE_HASH_BUCKET_ENTRIES];
 
 	void *next;
-} __rte_cache_aligned;
+};
 
 /** A hash table structure. */
-struct rte_hash {
+struct __rte_cache_aligned rte_hash {
 	char name[RTE_HASH_NAMESIZE];   /**< Name of the hash. */
 	uint32_t entries;               /**< Total table entries. */
 	uint32_t num_buckets;           /**< Number of buckets in table. */
@@ -170,7 +172,7 @@ struct rte_hash {
 
 	/* Fields used in lookup */
 
-	uint32_t key_len __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t key_len;
 	/**< Length of hash key. */
 	uint8_t hw_trans_mem_support;
 	/**< If hardware transactional memory is used. */
@@ -220,7 +222,7 @@ struct rte_hash {
 	uint32_t *ext_bkt_to_free;
 	RTE_ATOMIC(uint32_t) *tbl_chng_cnt;
 	/**< Indicates if the hash table changed from last read. */
-} __rte_cache_aligned;
+};
 
 struct queue_node {
 	struct rte_hash_bucket *bkt; /* Current bucket on the bfs search */
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index e8de071..6464fd3 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2021 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <sys/queue.h>
 
 #include <rte_thash.h>
@@ -80,7 +82,7 @@ struct rte_thash_subtuple_helper {
 	uint32_t	tuple_offset;	/** < Offset in bits of the subtuple */
 	uint32_t	tuple_len;	/** < Length in bits of the subtuple */
 	uint32_t	lsb_msk;	/** < (1 << reta_sz_log) - 1 */
-	__extension__ uint32_t	compl_table[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint32_t	compl_table[0];
 	/** < Complementary table */
 };
 
diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v5 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eventdev/event_timer_adapter_pmd.h  |  4 ++--
 lib/eventdev/eventdev_pmd.h             |  8 ++++----
 lib/eventdev/rte_event_crypto_adapter.c | 16 ++++++++--------
 lib/eventdev/rte_event_dma_adapter.c    | 16 ++++++++--------
 lib/eventdev/rte_event_eth_rx_adapter.c |  8 ++++----
 lib/eventdev/rte_event_eth_tx_adapter.c |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c  |  9 +++++----
 lib/eventdev/rte_event_timer_adapter.h  |  8 ++++----
 lib/eventdev/rte_eventdev.h             |  8 ++++----
 lib/eventdev/rte_eventdev_core.h        |  4 ++--
 10 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/lib/eventdev/event_timer_adapter_pmd.h b/lib/eventdev/event_timer_adapter_pmd.h
index 65b421b..cd5127f 100644
--- a/lib/eventdev/event_timer_adapter_pmd.h
+++ b/lib/eventdev/event_timer_adapter_pmd.h
@@ -86,7 +86,7 @@ struct event_timer_adapter_ops {
  * @internal Adapter data; structure to be placed in shared memory to be
  * accessible by various processes in a multi-process configuration.
  */
-struct rte_event_timer_adapter_data {
+struct __rte_cache_aligned rte_event_timer_adapter_data {
 	uint8_t id;
 	/**< Event timer adapter ID */
 	uint8_t event_dev_id;
@@ -110,7 +110,7 @@ struct rte_event_timer_adapter_data {
 
 	uint8_t started : 1;
 	/**< Flag to indicate adapter started. */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index c415624..3934d8e 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -107,7 +107,7 @@ struct rte_eventdev_global {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_eventdev_data {
+struct __rte_cache_aligned rte_eventdev_data {
 	int socket_id;
 	/**< Socket ID where memory is allocated */
 	uint8_t dev_id;
@@ -146,10 +146,10 @@ struct rte_eventdev_data {
 
 	uint64_t reserved_64s[4]; /**< Reserved for future fields */
 	void *reserved_ptrs[4];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each event device. */
-struct rte_eventdev {
+struct __rte_cache_aligned rte_eventdev {
 	struct rte_eventdev_data *data;
 	/**< Pointer to device data */
 	struct eventdev_ops *dev_ops;
@@ -189,7 +189,7 @@ struct rte_eventdev {
 
 	uint64_t reserved_64s[3]; /**< Reserved for future fields */
 	void *reserved_ptrs[3];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 extern struct rte_eventdev *rte_eventdevs;
 /** @internal The pool of rte_eventdev structures. */
diff --git a/lib/eventdev/rte_event_crypto_adapter.c b/lib/eventdev/rte_event_crypto_adapter.c
index d46595d..6bc2769 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -42,7 +42,7 @@
 
 #define ECA_ADAPTER_ARRAY "crypto_adapter_array"
 
-struct crypto_ops_circular_buffer {
+struct __rte_cache_aligned crypto_ops_circular_buffer {
 	/* index of head element in circular buffer */
 	uint16_t head;
 	/* index of tail element in circular buffer */
@@ -53,9 +53,9 @@ struct crypto_ops_circular_buffer {
 	uint16_t size;
 	/* Pointer to hold rte_crypto_ops for batching */
 	struct rte_crypto_op **op_buffer;
-} __rte_cache_aligned;
+};
 
-struct event_crypto_adapter {
+struct __rte_cache_aligned event_crypto_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 	/* Event port identifier */
@@ -98,10 +98,10 @@ struct event_crypto_adapter {
 	uint16_t nb_qps;
 	/* Adapter mode */
 	enum rte_event_crypto_adapter_mode mode;
-} __rte_cache_aligned;
+};
 
 /* Per crypto device information */
-struct crypto_device_info {
+struct __rte_cache_aligned crypto_device_info {
 	/* Pointer to cryptodev */
 	struct rte_cryptodev *dev;
 	/* Pointer to queue pair info */
@@ -118,15 +118,15 @@ struct crypto_device_info {
 	 * be invoked if not already invoked
 	 */
 	uint16_t num_qpairs;
-} __rte_cache_aligned;
+};
 
 /* Per queue pair information */
-struct crypto_queue_pair_info {
+struct __rte_cache_aligned crypto_queue_pair_info {
 	/* Set to indicate queue pair is enabled */
 	bool qp_enabled;
 	/* Circular buffer for batching crypto ops to cdev */
 	struct crypto_ops_circular_buffer cbuf;
-} __rte_cache_aligned;
+};
 
 static struct event_crypto_adapter **event_crypto_adapter;
 
diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c
index 4196164..24dff55 100644
--- a/lib/eventdev/rte_event_dma_adapter.c
+++ b/lib/eventdev/rte_event_dma_adapter.c
@@ -26,7 +26,7 @@
 	} while (0)
 
 /* DMA ops circular buffer */
-struct dma_ops_circular_buffer {
+struct __rte_cache_aligned dma_ops_circular_buffer {
 	/* Index of head element */
 	uint16_t head;
 
@@ -41,19 +41,19 @@ struct dma_ops_circular_buffer {
 
 	/* Pointer to hold rte_event_dma_adapter_op for processing */
 	struct rte_event_dma_adapter_op **op_buffer;
-} __rte_cache_aligned;
+};
 
 /* Vchan information */
-struct dma_vchan_info {
+struct __rte_cache_aligned dma_vchan_info {
 	/* Set to indicate vchan queue is enabled */
 	bool vq_enabled;
 
 	/* Circular buffer for batching DMA ops to dma_dev */
 	struct dma_ops_circular_buffer dma_buf;
-} __rte_cache_aligned;
+};
 
 /* DMA device information */
-struct dma_device_info {
+struct __rte_cache_aligned dma_device_info {
 	/* Pointer to vchan queue info */
 	struct dma_vchan_info *vchanq;
 
@@ -81,9 +81,9 @@ struct dma_device_info {
 	 * transfer uses a hardware mechanism
 	 */
 	uint8_t internal_event_port;
-} __rte_cache_aligned;
+};
 
-struct event_dma_adapter {
+struct __rte_cache_aligned event_dma_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 
@@ -145,7 +145,7 @@ struct event_dma_adapter {
 
 	/* Per instance stats structure */
 	struct rte_event_dma_adapter_stats dma_stats;
-} __rte_cache_aligned;
+};
 
 static struct event_dma_adapter **event_dma_adapter;
 
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c
index 1b83a55..3ee20d9 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -72,7 +72,7 @@ struct eth_rx_poll_entry {
 	uint16_t eth_rx_qid;
 };
 
-struct eth_rx_vector_data {
+struct __rte_cache_aligned eth_rx_vector_data {
 	TAILQ_ENTRY(eth_rx_vector_data) next;
 	uint16_t port;
 	uint16_t queue;
@@ -82,7 +82,7 @@ struct eth_rx_vector_data {
 	uint64_t vector_timeout_ticks;
 	struct rte_mempool *vector_pool;
 	struct rte_event_vector *vector_ev;
-} __rte_cache_aligned;
+};
 
 TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
 
@@ -103,7 +103,7 @@ struct eth_event_enqueue_buffer {
 	uint16_t last_mask;
 };
 
-struct event_eth_rx_adapter {
+struct __rte_cache_aligned event_eth_rx_adapter {
 	/* RSS key */
 	uint8_t rss_key_be[RSS_KEY_SIZE];
 	/* Event device identifier */
@@ -188,7 +188,7 @@ struct event_eth_rx_adapter {
 	uint8_t rxa_started;
 	/* Adapter ID */
 	uint8_t id;
-} __rte_cache_aligned;
+};
 
 /* Per eth device */
 struct eth_device_info {
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index 56435be..67fff8b 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -109,7 +109,7 @@ struct txa_service_queue_info {
 };
 
 /* PMD private structure */
-struct txa_service_data {
+struct __rte_cache_aligned txa_service_data {
 	/* Max mbufs processed in any service function invocation */
 	uint32_t max_nb_tx;
 	/* Number of Tx queues in adapter */
@@ -144,7 +144,7 @@ struct txa_service_data {
 	int64_t service_id;
 	/* Memory allocation name */
 	char mem_name[TXA_MEM_NAME_LEN];
-} __rte_cache_aligned;
+};
 
 /* Per eth device structure */
 struct txa_service_ethdev {
diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
index e6d3492..5d3e37f 100644
--- a/lib/eventdev/rte_event_timer_adapter.c
+++ b/lib/eventdev/rte_event_timer_adapter.c
@@ -4,6 +4,7 @@
  */
 
 #include <ctype.h>
+#include <stdalign.h>
 #include <string.h>
 #include <inttypes.h>
 #include <stdbool.h>
@@ -512,11 +513,11 @@ struct rte_event_timer_adapter *
 
 #define EXP_TIM_BUF_SZ 128
 
-struct event_buffer {
+struct __rte_cache_aligned event_buffer {
 	size_t head;
 	size_t tail;
 	struct rte_event events[EVENT_BUFFER_SZ];
-} __rte_cache_aligned;
+};
 
 static inline bool
 event_buffer_full(struct event_buffer *bufp)
@@ -632,9 +633,9 @@ struct swtim {
 	/* Identifier of timer data instance */
 	uint32_t timer_data_id;
 	/* Track which cores have actually armed a timer */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		RTE_ATOMIC(uint16_t) v;
-	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
+	} in_use[RTE_MAX_LCORE];
 	/* Track which cores' timer lists should be polled */
 	RTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];
 	/* The number of lists that should be polled */
diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h
index c133dec..0bd1b30 100644
--- a/lib/eventdev/rte_event_timer_adapter.h
+++ b/lib/eventdev/rte_event_timer_adapter.h
@@ -473,7 +473,7 @@ enum rte_event_timer_state {
  * The generic *rte_event_timer* structure to hold the event timer attributes
  * for arm and cancel operations.
  */
-struct rte_event_timer {
+struct __rte_cache_aligned rte_event_timer {
 	struct rte_event ev;
 	/**<
 	 * Expiry event attributes.  On successful event timer timeout,
@@ -504,7 +504,7 @@ struct rte_event_timer {
 	/**< Memory to store user specific metadata.
 	 * The event timer adapter implementation should not modify this area.
 	 */
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*rte_event_timer_arm_burst_t)(
 		const struct rte_event_timer_adapter *adapter,
@@ -526,7 +526,7 @@ typedef uint16_t (*rte_event_timer_cancel_burst_t)(
 /**
  * @internal Data structure associated with each event timer adapter.
  */
-struct rte_event_timer_adapter {
+struct __rte_cache_aligned rte_event_timer_adapter {
 	rte_event_timer_arm_burst_t arm_burst;
 	/**< Pointer to driver arm_burst function. */
 	rte_event_timer_arm_tmo_tick_burst_t arm_tmo_tick_burst;
@@ -540,7 +540,7 @@ struct rte_event_timer_adapter {
 
 	uint8_t allocated : 1;
 	/**< Flag to indicate that this adapter has been allocated */
-} __rte_cache_aligned;
+};
 
 #define ADAPTER_VALID_OR_ERR_RET(adapter, retval) do {		\
 	if (adapter == NULL || !adapter->allocated)		\
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index 1f99e93..688c6d1 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1110,7 +1110,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1150,19 +1150,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
diff --git a/lib/eventdev/rte_eventdev_core.h b/lib/eventdev/rte_eventdev_core.h
index 5b40551..fc8e155 100644
--- a/lib/eventdev/rte_eventdev_core.h
+++ b/lib/eventdev/rte_eventdev_core.h
@@ -49,7 +49,7 @@ typedef uint16_t (*event_dma_adapter_enqueue_t)(void *port, struct rte_event ev[
 typedef int (*event_profile_switch_t)(void *port, uint8_t profile);
 /**< @internal Switch active link profile on the event port. */
 
-struct rte_event_fp_ops {
+struct __rte_cache_aligned rte_event_fp_ops {
 	void **data;
 	/**< points to array of internal port data pointers */
 	event_enqueue_t enqueue;
@@ -77,7 +77,7 @@ struct rte_event_fp_ops {
 	event_profile_switch_t profile_switch;
 	/**< PMD Event switch profile function. */
 	uintptr_t reserved[4];
-} __rte_cache_aligned;
+};
 
 extern struct rte_event_fp_ops rte_event_fp_ops[RTE_EVENT_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v5 11/39] ethdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ethdev/ethdev_driver.h   |  8 ++++----
 lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
 lib/ethdev/rte_ethdev_core.h |  4 ++--
 lib/ethdev/rte_flow_driver.h |  4 ++--
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 0e4c1f0..bab3a8c 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_eth_dev {
+struct __rte_cache_aligned rte_eth_dev {
 	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
 	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
 
@@ -93,7 +93,7 @@ struct rte_eth_dev {
 
 	enum rte_eth_dev_state state; /**< Flag indicating the port state */
 	void *security_ctx; /**< Context for security ops */
-} __rte_cache_aligned;
+};
 
 struct rte_eth_dev_sriov;
 struct rte_eth_dev_owner;
@@ -104,7 +104,7 @@ struct rte_eth_dev {
  * device. This structure is safe to place in shared memory to be common
  * among different processes in a multi-process configuration.
  */
-struct rte_eth_dev_data {
+struct __rte_cache_aligned rte_eth_dev_data {
 	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
 
 	void **rx_queues; /**< Array of pointers to Rx queues */
@@ -190,7 +190,7 @@ struct rte_eth_dev_data {
 	uint16_t backer_port_id;
 
 	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index ed27360..2a92953 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
@@ -1836,7 +1836,7 @@ struct rte_eth_dev_info {
  * Ethernet device Rx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_rxq_info {
+struct __rte_cache_min_aligned rte_eth_rxq_info {
 	struct rte_mempool *mp;     /**< mempool used by that queue. */
 	struct rte_eth_rxconf conf; /**< queue config parameters. */
 	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
@@ -1850,17 +1850,17 @@ struct rte_eth_rxq_info {
 	 * Value 0 means that the threshold monitoring is disabled.
 	 */
 	uint8_t avail_thresh;
-} __rte_cache_min_aligned;
+};
 
 /**
  * Ethernet device Tx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_txq_info {
+struct __rte_cache_min_aligned rte_eth_txq_info {
 	struct rte_eth_txconf conf; /**< queue config parameters. */
 	uint16_t nb_desc;           /**< configured number of TXDs. */
 	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
-} __rte_cache_min_aligned;
+};
 
 /**
  * @warning
@@ -1870,7 +1870,7 @@ struct rte_eth_txq_info {
  * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
  * them into Rx mbuf ring.
  */
-struct rte_eth_recycle_rxq_info {
+struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
 	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
 	struct rte_mempool *mp;     /**< mempool of Rx queue. */
 	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
@@ -1884,7 +1884,7 @@ struct rte_eth_recycle_rxq_info {
 	 * Value 0 means that PMD drivers have no requirement for this.
 	 */
 	uint16_t refill_requirement;
-} __rte_cache_min_aligned;
+};
 
 /* Generic Burst mode flag definition, values can be ORed. */
 
diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
index a18f242..e55fb42 100644
--- a/lib/ethdev/rte_ethdev_core.h
+++ b/lib/ethdev/rte_ethdev_core.h
@@ -84,7 +84,7 @@ struct rte_ethdev_qdata {
  * On 64-bit systems contents of this structure occupy exactly two 64B lines.
  * On 32-bit systems contents of this structure fits into one 64B line.
  */
-struct rte_eth_fp_ops {
+struct __rte_cache_aligned rte_eth_fp_ops {
 
 	/**@{*/
 	/**
@@ -124,7 +124,7 @@ struct rte_eth_fp_ops {
 	uintptr_t reserved2[1];
 	/**@}*/
 
-} __rte_cache_aligned;
+};
 
 extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
 
diff --git a/lib/ethdev/rte_flow_driver.h b/lib/ethdev/rte_flow_driver.h
index 3c702e3..506d126 100644
--- a/lib/ethdev/rte_flow_driver.h
+++ b/lib/ethdev/rte_flow_driver.h
@@ -432,7 +432,7 @@ typedef int (*rte_flow_async_action_list_handle_query_update_t)(
  *
  * Fast path async flow functions are held in a flat array, one entry per ethdev.
  */
-struct rte_flow_fp_ops {
+struct __rte_cache_aligned rte_flow_fp_ops {
 	rte_flow_async_create_t async_create;
 	rte_flow_async_create_by_index_t async_create_by_index;
 	rte_flow_async_actions_update_t async_actions_update;
@@ -447,7 +447,7 @@ struct rte_flow_fp_ops {
 	rte_flow_async_action_list_handle_create_t async_action_list_handle_create;
 	rte_flow_async_action_list_handle_destroy_t async_action_list_handle_destroy;
 	rte_flow_async_action_list_handle_query_update_t async_action_list_handle_query_update;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v5 12/39] dmadev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 lib/dmadev/rte_dmadev_pmd.h  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index e8239c2..29f5251 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_cache_aligned rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_cache_aligned;
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
diff --git a/lib/dmadev/rte_dmadev_pmd.h b/lib/dmadev/rte_dmadev_pmd.h
index 7f354f6..5872908 100644
--- a/lib/dmadev/rte_dmadev_pmd.h
+++ b/lib/dmadev/rte_dmadev_pmd.h
@@ -94,7 +94,7 @@ struct rte_dma_dev_ops {
  *
  * @see struct rte_dma_dev::data
  */
-struct rte_dma_dev_data {
+struct __rte_cache_aligned rte_dma_dev_data {
 	char dev_name[RTE_DEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	int16_t dev_id; /**< Device [external] identifier. */
 	int16_t numa_node; /**< Local NUMA memory ID. -1 if unknown. */
@@ -103,7 +103,7 @@ struct rte_dma_dev_data {
 	__extension__
 	uint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */
 	uint64_t reserved[2]; /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /**
  * Possible states of a DMA device.
@@ -122,7 +122,7 @@ enum rte_dma_dev_state {
  * @internal
  * The generic data structure associated with each DMA device.
  */
-struct rte_dma_dev {
+struct __rte_cache_aligned rte_dma_dev {
 	/** Device info which supplied during device initialization. */
 	struct rte_device *device;
 	struct rte_dma_dev_data *data; /**< Pointer to shared device data. */
@@ -132,7 +132,7 @@ struct rte_dma_dev {
 	const struct rte_dma_dev_ops *dev_ops;
 	enum rte_dma_dev_state state; /**< Flag indicating the device state. */
 	uint64_t reserved[2]; /**< Reserved for future fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v5 13/39] distributor: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/distributor/distributor_private.h | 34 ++++++++++++++++++----------------
 lib/distributor/rte_distributor.c     |  5 +++--
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/lib/distributor/distributor_private.h b/lib/distributor/distributor_private.h
index dfeb9b5..07c2c05 100644
--- a/lib/distributor/distributor_private.h
+++ b/lib/distributor/distributor_private.h
@@ -5,6 +5,8 @@
 #ifndef _DIST_PRIV_H_
 #define _DIST_PRIV_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE distributor
@@ -51,10 +53,10 @@
  * the next cache line to worker 0, we pad this out to three cache lines.
  * Only 64-bits of the memory is actually used though.
  */
-union rte_distributor_buffer_single {
+union __rte_cache_aligned rte_distributor_buffer_single {
 	volatile RTE_ATOMIC(int64_t) bufptr64;
 	char pad[RTE_CACHE_LINE_SIZE*3];
-} __rte_cache_aligned;
+};
 
 /*
  * Transfer up to 8 mbufs at a time to/from workers, and
@@ -62,12 +64,12 @@
  */
 #define RTE_DIST_BURST_SIZE 8
 
-struct rte_distributor_backlog {
+struct __rte_cache_aligned rte_distributor_backlog {
 	unsigned int start;
 	unsigned int count;
-	int64_t pkts[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pkts[RTE_DIST_BURST_SIZE];
 	uint16_t *tags; /* will point to second cacheline of inflights */
-} __rte_cache_aligned;
+};
 
 
 struct rte_distributor_returned_pkts {
@@ -113,17 +115,17 @@ enum rte_distributor_match_function {
  * There is a separate cacheline for returns in the burst API.
  */
 struct rte_distributor_buffer {
-	volatile RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= outgoing to worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE];
+		/* <= outgoing to worker */
 
-	int64_t pad1 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad1;    /* <= one cache line  */
 
-	volatile RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= incoming from worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE];
+		/* <= incoming from worker */
 
-	int64_t pad2 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad2;    /* <= one cache line  */
 
-	int count __rte_cache_aligned;       /* <= number of current mbufs */
+	alignas(RTE_CACHE_LINE_SIZE) int count;       /* <= number of current mbufs */
 };
 
 struct rte_distributor {
@@ -138,11 +140,11 @@ struct rte_distributor {
 	 * on the worker core. Second cache line are the backlog
 	 * that are going to go to the worker core.
 	 */
-	uint16_t in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t
+		in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2];
 
-	struct rte_distributor_backlog backlog[RTE_DISTRIB_MAX_WORKERS]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_distributor_backlog
+		backlog[RTE_DISTRIB_MAX_WORKERS];
 
 	struct rte_distributor_buffer bufs[RTE_DISTRIB_MAX_WORKERS];
 
diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index e842dc9..e58727c 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -447,7 +448,7 @@
 	struct rte_mbuf *next_mb = NULL;
 	int64_t next_value = 0;
 	uint16_t new_tag = 0;
-	uint16_t flows[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t flows[RTE_DIST_BURST_SIZE];
 	unsigned int i, j, w, wid, matching_required;
 
 	if (d->alg_type == RTE_DIST_ALG_SINGLE) {
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v5 14/39] acl: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/acl/acl_run.h         | 4 ++--
 lib/acl/acl_run_altivec.h | 6 ++++--
 lib/acl/acl_run_neon.h    | 6 ++++--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 3c30466..2d398ff 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -3,15 +3,17 @@
  * Copyright (C) IBM Corporation 2016.
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _altivec_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t xmm_ones_16;
 	rte_xmm_t range_base;
-} altivec_acl_const __rte_cache_aligned = {
+} altivec_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
index 69d1b6d..63074f8 100644
--- a/lib/acl/acl_run_neon.h
+++ b/lib/acl/acl_run_neon.h
@@ -2,14 +2,16 @@
  * Copyright(c) 2015 Cavium, Inc
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _neon_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t range_base;
-} neon_acl_const __rte_cache_aligned = {
+} neon_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
-- 
1.8.3.1

[PATCH v5 15/39] vhost: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
 lib/vhost/vhost.h        | 8 ++++----
 lib/vhost/vhost_crypto.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index f163ff7..af48393 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -272,7 +272,7 @@ struct vhost_async {
 /**
  * Structure contains variables relevant to RX/TX virtqueues.
  */
-struct vhost_virtqueue {
+struct __rte_cache_aligned vhost_virtqueue {
 	union {
 		struct vring_desc	*desc;
 		struct vring_packed_desc   *desc_packed;
@@ -351,7 +351,7 @@ struct vhost_virtqueue {
 	struct virtqueue_stats	stats;
 
 	RTE_ATOMIC(bool) irq_pending;
-} __rte_cache_aligned;
+};
 
 /* Virtio device status as per Virtio specification */
 #define VIRTIO_DEVICE_STATUS_RESET		0x00
@@ -479,7 +479,7 @@ struct inflight_mem_info {
  * Device structure contains all configuration information relating
  * to the device.
  */
-struct virtio_net {
+struct __rte_cache_aligned virtio_net {
 	/* Frontend (QEMU) memory and memory region information */
 	struct rte_vhost_memory	*mem;
 	uint64_t		features;
@@ -538,7 +538,7 @@ struct virtio_net {
 	struct rte_vhost_user_extern_ops extern_ops;
 
 	struct vhost_backend_ops *backend_ops;
-} __rte_cache_aligned;
+};
 
 static inline void
 vq_assert_lock__(struct virtio_net *dev, struct vhost_virtqueue *vq, const char *func)
diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
index 3704fbb..eb4a158 100644
--- a/lib/vhost/vhost_crypto.c
+++ b/lib/vhost/vhost_crypto.c
@@ -190,7 +190,7 @@ static int get_iv_len(enum rte_crypto_cipher_algorithm algo)
  * one DPDK crypto device that deals with all crypto workloads. It is declared
  * here and defined in vhost_crypto.c
  */
-struct vhost_crypto {
+struct __rte_cache_aligned vhost_crypto {
 	/** Used to lookup DPDK Cryptodev Session based on VIRTIO crypto
 	 *  session ID.
 	 */
@@ -213,7 +213,7 @@ struct vhost_crypto {
 	struct virtio_net *dev;
 
 	uint8_t option;
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_writeback_data {
 	uint8_t *src;
-- 
1.8.3.1

[PATCH v5 16/39] timer: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/timer/rte_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c
index 53ed221..bb8b6a6 100644
--- a/lib/timer/rte_timer.c
+++ b/lib/timer/rte_timer.c
@@ -24,7 +24,7 @@
 /**
  * Per-lcore info for timers.
  */
-struct priv_timer {
+struct __rte_cache_aligned priv_timer {
 	struct rte_timer pending_head;  /**< dummy timer instance to head up list */
 	rte_spinlock_t list_lock;       /**< lock to protect list access */
 
@@ -44,7 +44,7 @@ struct priv_timer {
 	/** per-lcore statistics */
 	struct rte_timer_debug_stats stats;
 #endif
-} __rte_cache_aligned;
+};
 
 #define FL_ALLOCATED	(1 << 0)
 struct rte_timer_data {
-- 
1.8.3.1

[PATCH v5 17/39] table: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/table/rte_swx_table_learner.c | 4 ++--
 lib/table/rte_table_acl.c         | 3 ++-
 lib/table/rte_table_array.c       | 7 ++++---
 lib/table/rte_table_hash_cuckoo.c | 4 +++-
 lib/table/rte_table_hash_ext.c    | 3 ++-
 lib/table/rte_table_hash_key16.c  | 4 +++-
 lib/table/rte_table_hash_key32.c  | 4 +++-
 lib/table/rte_table_hash_key8.c   | 4 +++-
 lib/table/rte_table_hash_lru.c    | 3 ++-
 lib/table/rte_table_lpm.c         | 3 ++-
 lib/table/rte_table_lpm_ipv6.c    | 3 ++-
 11 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lib/table/rte_swx_table_learner.c b/lib/table/rte_swx_table_learner.c
index 2b5e6bd..55a3645 100644
--- a/lib/table/rte_swx_table_learner.c
+++ b/lib/table/rte_swx_table_learner.c
@@ -145,13 +145,13 @@ struct table_params {
 	size_t total_size;
 };
 
-struct table {
+struct __rte_cache_aligned table {
 	/* Table parameters. */
 	struct table_params params;
 
 	/* Table buckets. */
 	uint8_t buckets[];
-} __rte_cache_aligned;
+};
 
 /* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
  * significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
diff --git a/lib/table/rte_table_acl.c b/lib/table/rte_table_acl.c
index 83411d2..2764cda 100644
--- a/lib/table/rte_table_acl.c
+++ b/lib/table/rte_table_acl.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_acl {
 	uint8_t *acl_rule_memory; /* Memory to store the rules */
 
 	/* Memory to store the action table and stack of free entries */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 
diff --git a/lib/table/rte_table_array.c b/lib/table/rte_table_array.c
index 80bc2a7..31a17d5 100644
--- a/lib/table/rte_table_array.c
+++ b/lib/table/rte_table_array.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -27,7 +28,7 @@
 
 #endif
 
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
 	struct rte_table_stats stats;
 
 	/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
 	uint32_t entry_pos_mask;
 
 	/* Internal table */
-	uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
 
 static void *
 rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
diff --git a/lib/table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
index 0f4900c..d3b60f3 100644
--- a/lib/table/rte_table_hash_cuckoo.c
+++ b/lib/table/rte_table_hash_cuckoo.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -42,7 +44,7 @@ struct rte_table_hash {
 	struct rte_hash *h_table;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
index 2148d83..61e3c79 100644
--- a/lib/table/rte_table_hash_ext.c
+++ b/lib/table/rte_table_hash_ext.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -99,7 +100,7 @@ struct rte_table_hash {
 	uint32_t *bkt_ext_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
index 7734aef..2af34a5 100644
--- a/lib/table/rte_table_hash_key16.c
+++ b/lib/table/rte_table_hash_key16.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
index fcb4348..06e5cf4 100644
--- a/lib/table/rte_table_hash_key32.c
+++ b/lib/table/rte_table_hash_key32.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
index bbe6562..2ab8e1b 100644
--- a/lib/table/rte_table_hash_key8.c
+++ b/lib/table/rte_table_hash_key8.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -79,7 +81,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
index cb4f329..8604a64 100644
--- a/lib/table/rte_table_hash_lru.c
+++ b/lib/table/rte_table_hash_lru.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -76,7 +77,7 @@ struct rte_table_hash {
 	uint32_t *key_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
index b9cff25..978d7e5 100644
--- a/lib/table/rte_table_lpm.c
+++ b/lib/table/rte_table_lpm.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_lpm {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
diff --git a/lib/table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
index e4e823a..1d54f83 100644
--- a/lib/table/rte_table_lpm_ipv6.c
+++ b/lib/table/rte_table_lpm_ipv6.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
-- 
1.8.3.1

[PATCH v5 18/39] reorder: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/reorder/rte_reorder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
index c080b2c..ae97e1a 100644
--- a/lib/reorder/rte_reorder.c
+++ b/lib/reorder/rte_reorder.c
@@ -37,16 +37,16 @@
 int rte_reorder_seqn_dynfield_offset = -1;
 
 /* A generic circular buffer */
-struct cir_buffer {
+struct __rte_cache_aligned cir_buffer {
 	unsigned int size;   /**< Number of entries that can be stored */
 	unsigned int mask;   /**< [buffer_size - 1]: used for wrap-around */
 	unsigned int head;   /**< insertion point in buffer */
 	unsigned int tail;   /**< extraction point in buffer */
 	struct rte_mbuf **entries;
-} __rte_cache_aligned;
+};
 
 /* The reorder buffer data structure itself */
-struct rte_reorder_buffer {
+struct __rte_cache_aligned rte_reorder_buffer {
 	char name[RTE_REORDER_NAMESIZE];
 	uint32_t min_seqn;  /**< Lowest seq. number that can be in the buffer */
 	unsigned int memsize; /**< memory area size of reorder buffer */
@@ -54,7 +54,7 @@ struct rte_reorder_buffer {
 
 	struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */
 	struct cir_buffer order_buf; /**< buffer used to reorder entries */
-} __rte_cache_aligned;
+};
 
 static void
 rte_reorder_free_mbufs(struct rte_reorder_buffer *b);
-- 
1.8.3.1

[PATCH v5 19/39] regexdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/regexdev/rte_regexdev_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
index 15ba712..32eef6e 100644
--- a/lib/regexdev/rte_regexdev_core.h
+++ b/lib/regexdev/rte_regexdev_core.h
@@ -144,13 +144,13 @@ enum rte_regexdev_state {
  * This structure is safe to place in shared memory to be common among different
  * processes in a multi-process configuration.
  */
-struct rte_regexdev_data {
+struct __rte_cache_aligned rte_regexdev_data {
 	void *dev_private; /**< PMD-specific private data. */
 	char dev_name[RTE_REGEXDEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	uint16_t dev_id; /**< Device [external]  identifier. */
 	struct rte_regexdev_config dev_conf; /**< RegEx configuration. */
 	uint8_t dev_started : 1; /**< Device started to work. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
@@ -162,7 +162,7 @@ struct rte_regexdev_data {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_regexdev {
+struct __rte_cache_aligned rte_regexdev {
 	regexdev_enqueue_t enqueue;
 	regexdev_dequeue_t dequeue;
 	const struct rte_regexdev_ops *dev_ops;
@@ -170,7 +170,7 @@ struct rte_regexdev {
 	struct rte_device *device; /**< Backing device */
 	enum rte_regexdev_state state; /**< The device state. */
 	struct rte_regexdev_data *data;  /**< Pointer to device data. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v5 20/39] rcu: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rcu/rte_rcu_qsbr.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
index e7ef788..d8ecf11 100644
--- a/lib/rcu/rte_rcu_qsbr.h
+++ b/lib/rcu/rte_rcu_qsbr.h
@@ -21,6 +21,8 @@
  * entered quiescent state.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -69,7 +71,7 @@
 #define RTE_QSBR_THRID_INVALID 0xffffffff
 
 /* Worker thread counter */
-struct rte_rcu_qsbr_cnt {
+struct __rte_cache_aligned rte_rcu_qsbr_cnt {
 	RTE_ATOMIC(uint64_t) cnt;
 	/**< Quiescent state counter. Value 0 indicates the thread is offline
 	 *   64b counter is used to avoid adding more code to address
@@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt {
 	 */
 	RTE_ATOMIC(uint32_t) lock_cnt;
 	/**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */
-} __rte_cache_aligned;
+};
 
 #define __RTE_QSBR_CNT_THR_OFFLINE 0
 #define __RTE_QSBR_CNT_INIT 1
@@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt {
  * 1) Quiescent state counter array
  * 2) Register thread ID array
  */
-struct rte_rcu_qsbr {
-	RTE_ATOMIC(uint64_t) token __rte_cache_aligned;
+struct __rte_cache_aligned rte_rcu_qsbr {
+	alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token;
 	/**< Counter to allow for multiple concurrent quiescent state queries */
 	RTE_ATOMIC(uint64_t) acked_token;
 	/**< Least token acked by all the threads in the last call to
 	 *   rte_rcu_qsbr_check API.
 	 */
 
-	uint32_t num_elems __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems;
 	/**< Number of elements in the thread ID array */
 	RTE_ATOMIC(uint32_t) num_threads;
 	/**< Number of threads currently using this QS variable */
 	uint32_t max_threads;
 	/**< Maximum number of threads using this QS variable */
 
-	struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0];
 	/**< Quiescent state counter array of 'max_threads' elements */
 
 	/**< Registered thread IDs are stored in a bitmap array,
 	 *   after the quiescent state counter array.
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Call back function called to free the resources.
-- 
1.8.3.1

[PATCH v5 21/39] power: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/power/power_acpi_cpufreq.c       | 4 ++--
 lib/power/power_amd_pstate_cpufreq.c | 4 ++--
 lib/power/power_cppc_cpufreq.c       | 4 ++--
 lib/power/power_intel_uncore.c       | 4 ++--
 lib/power/power_pstate_cpufreq.c     | 4 ++--
 lib/power/rte_power_pmd_mgmt.c       | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
index f8d978d..81996e1 100644
--- a/lib/power/power_acpi_cpufreq.c
+++ b/lib/power/power_acpi_cpufreq.c
@@ -41,7 +41,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct acpi_power_info {
+struct __rte_cache_aligned acpi_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -51,7 +51,7 @@ struct acpi_power_info {
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
-} __rte_cache_aligned;
+};
 
 static struct acpi_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
index 028f844..090a0d9 100644
--- a/lib/power/power_amd_pstate_cpufreq.c
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -45,7 +45,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct amd_pstate_power_info {
+struct __rte_cache_aligned amd_pstate_power_info {
 	uint32_t lcore_id;                   /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -58,7 +58,7 @@ struct amd_pstate_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c
index 3ddf39b..32aaacb 100644
--- a/lib/power/power_cppc_cpufreq.c
+++ b/lib/power/power_cppc_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct cppc_power_info {
+struct __rte_cache_aligned cppc_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -61,7 +61,7 @@ struct cppc_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_intel_uncore.c b/lib/power/power_intel_uncore.c
index 3ce8fcc..9c152e4 100644
--- a/lib/power/power_intel_uncore.c
+++ b/lib/power/power_intel_uncore.c
@@ -29,7 +29,7 @@
 		"/sys/devices/system/cpu/intel_uncore_frequency/package_%02u_die_%02u/initial_min_freq_khz"
 
 
-struct uncore_power_info {
+struct __rte_cache_aligned uncore_power_info {
 	unsigned int die;                  /* Core die id */
 	unsigned int pkg;                  /* Package id */
 	uint32_t freqs[MAX_UNCORE_FREQS];  /* Frequency array */
@@ -41,7 +41,7 @@ struct uncore_power_info {
 	uint32_t org_max_freq;             /* Original max freq of uncore */
 	uint32_t init_max_freq;            /* System max uncore freq */
 	uint32_t init_min_freq;            /* System min uncore freq */
-} __rte_cache_aligned;
+};
 
 static struct uncore_power_info uncore_info[RTE_MAX_NUMA_NODES][MAX_NUMA_DIE];
 
diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
index 73138dc..2343121 100644
--- a/lib/power/power_pstate_cpufreq.c
+++ b/lib/power/power_pstate_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 	POWER_UNKNOWN
 };
 
-struct pstate_power_info {
+struct __rte_cache_aligned pstate_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -64,7 +64,7 @@ struct pstate_power_info {
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint16_t priority_core;              /**< High Performance core */
-} __rte_cache_aligned;
+};
 
 
 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index 591fc69..b1c18a5 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -55,7 +55,7 @@ struct queue_list_entry {
 	const struct rte_eth_rxtx_callback *cb;
 };
 
-struct pmd_core_cfg {
+struct __rte_cache_aligned pmd_core_cfg {
 	TAILQ_HEAD(queue_list_head, queue_list_entry) head;
 	/**< List of queues associated with this lcore */
 	size_t n_queues;
@@ -68,7 +68,7 @@ struct pmd_core_cfg {
 	/**< Number of queues ready to enter power optimized state */
 	uint64_t sleep_target;
 	/**< Prevent a queue from triggering sleep multiple times */
-} __rte_cache_aligned;
+};
 static struct pmd_core_cfg lcore_cfgs[RTE_MAX_LCORE];
 
 static inline bool
-- 
1.8.3.1

[PATCH v5 22/39] rawdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rawdev/rte_rawdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
index 7d5764d..640037b 100644
--- a/lib/rawdev/rte_rawdev.h
+++ b/lib/rawdev/rte_rawdev.h
@@ -279,7 +279,7 @@
  * It is a placeholder for PMD specific data, encapsulating only information
  * related to framework.
  */
-struct rte_rawdev {
+struct __rte_cache_aligned rte_rawdev {
 	/**< Socket ID where memory is allocated */
 	int socket_id;
 	/**< Device ID for this instance */
@@ -300,7 +300,7 @@ struct rte_rawdev {
 	rte_rawdev_obj_t dev_private;
 	/**< Device name */
 	char name[RTE_RAWDEV_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 /** @internal The pool of rte_rawdev structures. */
 extern struct rte_rawdev *rte_rawdevs;
-- 
1.8.3.1

[PATCH v5 23/39] port: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/port/rte_port_frag.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index 883601a..0940f94 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -34,7 +34,7 @@
 			struct rte_mempool *pool_direct,
 			struct rte_mempool *pool_indirect);
 
-struct rte_port_ring_reader_frag {
+struct __rte_cache_aligned rte_port_ring_reader_frag {
 	struct rte_port_in_stats stats;
 
 	/* Input parameters */
@@ -53,7 +53,7 @@ struct rte_port_ring_reader_frag {
 	uint32_t pos_frags;
 
 	frag_op f_frag;
-} __rte_cache_aligned;
+};
 
 static void *
 rte_port_ring_reader_frag_create(void *params, int socket_id, int is_ipv4)
-- 
1.8.3.1

[PATCH v5 24/39] pdcp: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pdcp/rte_pdcp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/pdcp/rte_pdcp.h b/lib/pdcp/rte_pdcp.h
index dd8b6e4..f74524f 100644
--- a/lib/pdcp/rte_pdcp.h
+++ b/lib/pdcp/rte_pdcp.h
@@ -49,7 +49,7 @@ typedef uint16_t (*rte_pdcp_post_p_t)(const struct rte_pdcp_entity *entity,
  * A PDCP entity is associated either to the control plane or the user plane
  * depending on which radio bearer it is carrying data for.
  */
-struct rte_pdcp_entity {
+struct __rte_cache_aligned rte_pdcp_entity {
 	/** Entity specific pre-process handle. */
 	rte_pdcp_pre_p_t pre_process;
 	/** Entity specific post-process handle. */
@@ -66,7 +66,7 @@ struct rte_pdcp_entity {
 	 * hold additionally 'max_pkt_cache' number of packets.
 	 */
 	uint32_t max_pkt_cache;
-} __rte_cache_aligned;
+};
 
 /**
  * Callback function type for t-Reordering timer start, set during PDCP entity establish.
-- 
1.8.3.1

[PATCH v5 25/39] node: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/node/node_private.h | 4 ++--
 lib/node/pkt_cls.c      | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/node/node_private.h b/lib/node/node_private.h
index 2b9bad1..ff04659 100644
--- a/lib/node/node_private.h
+++ b/lib/node/node_private.h
@@ -51,9 +51,9 @@ struct node_mbuf_priv1 {
 /**
  * Node mbuf private area 2.
  */
-struct node_mbuf_priv2 {
+struct __rte_cache_aligned node_mbuf_priv2 {
 	uint64_t priv_data;
-} __rte_cache_aligned;
+};
 
 #define NODE_MBUF_PRIV2_SIZE sizeof(struct node_mbuf_priv2)
 
diff --git a/lib/node/pkt_cls.c b/lib/node/pkt_cls.c
index a8302b8..9d21b7f 100644
--- a/lib/node/pkt_cls.c
+++ b/lib/node/pkt_cls.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2020 Marvell.
  */
 
+#include <stdalign.h>
+
 #include <rte_graph.h>
 #include <rte_graph_worker.h>
 
@@ -9,7 +11,7 @@
 #include "node_private.h"
 
 /* Next node for each ptype, default is '0' is "pkt_drop" */
-static const uint8_t p_nxt[256] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint8_t p_nxt[256] = {
 	[RTE_PTYPE_L3_IPV4] = PKT_CLS_NEXT_IP4_LOOKUP,
 
 	[RTE_PTYPE_L3_IPV4_EXT] = PKT_CLS_NEXT_IP4_LOOKUP,
-- 
1.8.3.1

[PATCH v5 26/39] mldev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mldev/rte_mldev.h      | 4 ++--
 lib/mldev/rte_mldev_core.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/mldev/rte_mldev.h b/lib/mldev/rte_mldev.h
index 27e372f..02913f3 100644
--- a/lib/mldev/rte_mldev.h
+++ b/lib/mldev/rte_mldev.h
@@ -421,7 +421,7 @@ struct rte_ml_buff_seg {
  * This structure contains data related to performing an ML operation on the buffers using
  * the model specified through model_id.
  */
-struct rte_ml_op {
+struct __rte_cache_aligned rte_ml_op {
 	uint16_t model_id;
 	/**< Model ID to be used for the operation. */
 	uint16_t nb_batches;
@@ -469,7 +469,7 @@ struct rte_ml_op {
 	 * dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-} __rte_cache_aligned;
+};
 
 /* Enqueue/Dequeue operations */
 
diff --git a/lib/mldev/rte_mldev_core.h b/lib/mldev/rte_mldev_core.h
index 2279b1d..b3bd281 100644
--- a/lib/mldev/rte_mldev_core.h
+++ b/lib/mldev/rte_mldev_core.h
@@ -626,7 +626,7 @@ struct rte_ml_dev_data {
  *
  * The data structure associated with each ML device.
  */
-struct rte_ml_dev {
+struct __rte_cache_aligned rte_ml_dev {
 	/** Pointer to PMD enqueue function. */
 	mldev_enqueue_t enqueue_burst;
 
@@ -647,7 +647,7 @@ struct rte_ml_dev {
 
 	/** Flag indicating the device is attached. */
 	__extension__ uint8_t attached : 1;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v5 27/39] mempool: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index 6fa4d48..23fd5c8 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -34,6 +34,7 @@
  * user cache created with rte_mempool_cache_create().
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <inttypes.h>
@@ -66,7 +67,7 @@
  * captured since they can be calculated from other stats.
  * For example: put_cache_objs = put_objs - put_common_pool_objs.
  */
-struct rte_mempool_debug_stats {
+struct __rte_cache_aligned rte_mempool_debug_stats {
 	uint64_t put_bulk;             /**< Number of puts. */
 	uint64_t put_objs;             /**< Number of objects successfully put. */
 	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
@@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
 	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
 	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 #endif
 
 /**
  * A structure that stores a per-core object cache.
  */
-struct rte_mempool_cache {
+struct __rte_cache_aligned rte_mempool_cache {
 	uint32_t size;	      /**< Size of the cache */
 	uint32_t flushthresh; /**< Threshold before we flush excess elements */
 	uint32_t len;	      /**< Current cache count */
@@ -109,8 +110,8 @@ struct rte_mempool_cache {
 	 * Cache is allocated to this size to allow it to overflow in certain
 	 * cases to avoid needless emptying of cache.
 	 */
-	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
+};
 
 /**
  * A structure that stores the size of mempool elements.
@@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
  * The structure is cache-line aligned to avoid ABI breakages in
  * a number of cases when something small is added.
  */
-struct rte_mempool_info {
+struct __rte_cache_aligned rte_mempool_info {
 	/** Number of objects in the contiguous block */
 	unsigned int contig_block_size;
-} __rte_cache_aligned;
+};
 
 /**
  * The RTE mempool structure.
  */
-struct rte_mempool {
+struct __rte_cache_aligned rte_mempool {
 	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
 	union {
 		void *pool_data;         /**< Ring or pool to store objects. */
@@ -268,7 +269,7 @@ struct rte_mempool {
 	 */
 	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
 #endif
-}  __rte_cache_aligned;
+};
 
 /** Spreading among memory channels not required. */
 #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
@@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
 
 
 /** Structure defining mempool operations structure */
-struct rte_mempool_ops {
+struct __rte_cache_aligned rte_mempool_ops {
 	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
 	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
 	rte_mempool_free_t free;         /**< Free the external pool. */
@@ -713,7 +714,7 @@ struct rte_mempool_ops {
 	 * Dequeue a number of contiguous object blocks.
 	 */
 	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
-} __rte_cache_aligned;
+};
 
 #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
 
@@ -726,14 +727,14 @@ struct rte_mempool_ops {
  * any function pointers stored directly in the mempool struct would not be.
  * This results in us simply having "ops_index" in the mempool struct.
  */
-struct rte_mempool_ops_table {
+struct __rte_cache_aligned rte_mempool_ops_table {
 	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
 	uint32_t num_ops;      /**< Number of used ops structs in the table. */
 	/**
 	 * Storage for all possible ops structs.
 	 */
 	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
-} __rte_cache_aligned;
+};
 
 /** Array of registered ops structs. */
 extern struct rte_mempool_ops_table rte_mempool_ops_table;
-- 
1.8.3.1

[PATCH v5 28/39] member: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/member/rte_member.h        | 8 ++++----
 lib/member/rte_member_ht.h     | 4 ++--
 lib/member/rte_member_sketch.c | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/member/rte_member.h b/lib/member/rte_member.h
index 3278bbb..aec192e 100644
--- a/lib/member/rte_member.h
+++ b/lib/member/rte_member.h
@@ -139,7 +139,7 @@ typedef void (*sketch_delete_fn_t)(const struct rte_member_setsum *ss,
 				   const void *key);
 
 /** @internal setsummary structure. */
-struct rte_member_setsum {
+struct __rte_cache_aligned rte_member_setsum {
 	enum rte_member_setsum_type type; /* Type of the set summary. */
 	uint32_t key_len;		/* Length of key. */
 	uint32_t prim_hash_seed;	/* Primary hash function seed. */
@@ -185,14 +185,14 @@ struct rte_member_setsum {
 #ifdef RTE_ARCH_X86
 	bool use_avx512;
 #endif
-} __rte_cache_aligned;
+};
 
 /**
  * Parameters used when create the set summary table. Currently user can
  * specify two types of setsummary: HT based and vBF. For HT based, user can
  * specify cache or non-cache mode. Here is a table to describe some differences
  */
-struct rte_member_parameters {
+struct __rte_cache_aligned rte_member_parameters {
 	const char *name;			/**< Name of the hash. */
 
 	/**
@@ -326,7 +326,7 @@ struct rte_member_parameters {
 	uint32_t extra_flag;
 
 	int socket_id;			/**< NUMA Socket ID for memory. */
-} __rte_cache_aligned;
+};
 
 /**
  * Find an existing set-summary and return a pointer to it.
diff --git a/lib/member/rte_member_ht.h b/lib/member/rte_member_ht.h
index 9e24ccd..c9673e3 100644
--- a/lib/member/rte_member_ht.h
+++ b/lib/member/rte_member_ht.h
@@ -15,10 +15,10 @@
 typedef uint16_t member_sig_t;			/* signature size is 16 bit */
 
 /* The bucket struct for ht setsum */
-struct member_ht_bucket {
+struct __rte_cache_aligned member_ht_bucket {
 	member_sig_t sigs[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte signature */
 	member_set_t sets[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte set */
-} __rte_cache_aligned;
+};
 
 int
 rte_member_create_ht(struct rte_member_setsum *ss,
diff --git a/lib/member/rte_member_sketch.c b/lib/member/rte_member_sketch.c
index e006e83..15af678 100644
--- a/lib/member/rte_member_sketch.c
+++ b/lib/member/rte_member_sketch.c
@@ -23,7 +23,7 @@
 #include "rte_member_sketch_avx512.h"
 #endif /* CC_AVX512_SUPPORT */
 
-struct sketch_runtime {
+struct __rte_cache_aligned sketch_runtime {
 	uint64_t pkt_cnt;
 	uint32_t until_next;
 	int converged;
@@ -31,7 +31,7 @@ struct sketch_runtime {
 	struct node *report_array;
 	void *key_slots;
 	struct rte_ring *free_key_slots;
-} __rte_cache_aligned;
+};
 
 /*
  * Geometric sampling to calculate how many packets needs to be
-- 
1.8.3.1

[PATCH v5 29/39] lpm: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/lpm/rte_lpm.h  | 5 +++--
 lib/lpm/rte_lpm6.c | 8 ++++----
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index f57977b..f311fd9 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -11,6 +11,7 @@
  * RTE Longest Prefix Match (LPM)
  */
 
+#include <stdalign.h>
 #include <errno.h>
 #include <stdint.h>
 
@@ -118,8 +119,8 @@ struct rte_lpm_config {
 /** @internal LPM structure. */
 struct rte_lpm {
 	/* LPM Tables. */
-	struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 	struct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */
 };
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 271bc48..ed5970c 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -98,16 +98,16 @@ struct rte_lpm6 {
 
 	/* LPM Tables. */
 	struct rte_hash *rules_tbl; /**< LPM rules. */
-	struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 
 	uint32_t *tbl8_pool; /**< pool of indexes of free tbl8s */
 	uint32_t tbl8_pool_pos; /**< current position in the tbl8 pool */
 
 	struct rte_lpm_tbl8_hdr *tbl8_hdrs; /* array of tbl8 headers */
 
-	struct rte_lpm6_tbl_entry tbl8[0]
-			__rte_cache_aligned; /**< LPM tbl8 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl8[0];
+			/**< LPM tbl8 table. */
 };
 
 /*
-- 
1.8.3.1

[PATCH v5 30/39] ipsec: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ipsec/rte_ipsec.h | 4 ++--
 lib/ipsec/sa.h        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index 44cecab..f15f6f2 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
  * - pointer to security/crypto session, plus other related data
  * - session/device specific functions to prepare/process IPsec packets.
  */
-struct rte_ipsec_session {
+struct __rte_cache_aligned rte_ipsec_session {
 	/**
 	 * SA that session belongs to.
 	 * Note that multiple sessions can belong to the same SA.
@@ -77,7 +77,7 @@ struct rte_ipsec_session {
 	};
 	/** functions to prepare/process IPsec packets */
 	struct rte_ipsec_sa_pkt_func pkt_func;
-} __rte_cache_aligned;
+};
 
 /**
  * Checks that inside given rte_ipsec_session crypto/security fields
diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
index 4b30bea..2560d33 100644
--- a/lib/ipsec/sa.h
+++ b/lib/ipsec/sa.h
@@ -75,7 +75,7 @@ enum sa_algo_type	{
 	ALGO_TYPE_MAX
 };
 
-struct rte_ipsec_sa {
+struct __rte_cache_aligned rte_ipsec_sa {
 
 	uint64_t type;     /* type of given SA */
 	uint64_t udata;    /* user defined */
@@ -141,7 +141,7 @@ struct rte_ipsec_sa {
 		} errors;
 	} statistics;
 
-} __rte_cache_aligned;
+};
 
 int
 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
-- 
1.8.3.1

[PATCH v5 31/39] jobstats: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/jobstats/rte_jobstats.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/jobstats/rte_jobstats.h b/lib/jobstats/rte_jobstats.h
index 45b460e..bdd85fe 100644
--- a/lib/jobstats/rte_jobstats.h
+++ b/lib/jobstats/rte_jobstats.h
@@ -32,7 +32,7 @@
 typedef void (*rte_job_update_period_cb_t)(struct rte_jobstats *job,
 		int64_t job_result);
 
-struct rte_jobstats {
+struct __rte_cache_aligned rte_jobstats {
 	uint64_t period;
 	/**< Estimated period of execution. */
 
@@ -65,9 +65,9 @@ struct rte_jobstats {
 
 	struct rte_jobstats_context *context;
 	/**< Job stats context object that is executing this job. */
-} __rte_cache_aligned;
+};
 
-struct rte_jobstats_context {
+struct __rte_cache_aligned rte_jobstats_context {
 	/** Variable holding time at different points:
 	 * -# loop start time if loop was started but no job executed yet.
 	 * -# job start time if job is currently executing.
@@ -111,7 +111,7 @@ struct rte_jobstats_context {
 
 	uint64_t loop_cnt;
 	/**< Total count of executed loops with at least one executed job. */
-} __rte_cache_aligned;
+};
 
 /**
  * Initialize given context object with default values.
-- 
1.8.3.1

[PATCH v5 32/39] bpf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/bpf/bpf_pkt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
index 793a75d..aaca935 100644
--- a/lib/bpf/bpf_pkt.c
+++ b/lib/bpf/bpf_pkt.c
@@ -23,7 +23,7 @@
  * information about installed BPF rx/tx callback
  */
 
-struct bpf_eth_cbi {
+struct __rte_cache_aligned bpf_eth_cbi {
 	/* used by both data & control path */
 	RTE_ATOMIC(uint32_t) use;    /*usage counter */
 	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
@@ -33,7 +33,7 @@ struct bpf_eth_cbi {
 	LIST_ENTRY(bpf_eth_cbi) link;
 	uint16_t port;
 	uint16_t queue;
-} __rte_cache_aligned;
+};
 
 /*
  * Odd number means that callback is used by datapath.
-- 
1.8.3.1

[PATCH v5 33/39] compressdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/compressdev/rte_comp.h                 | 4 ++--
 lib/compressdev/rte_compressdev_internal.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
index 3606ebf..830a240 100644
--- a/lib/compressdev/rte_comp.h
+++ b/lib/compressdev/rte_comp.h
@@ -356,7 +356,7 @@ struct rte_comp_xform {
  * Comp operations are enqueued and dequeued in comp PMDs using the
  * rte_compressdev_enqueue_burst() / rte_compressdev_dequeue_burst() APIs
  */
-struct rte_comp_op {
+struct __rte_cache_aligned rte_comp_op {
 	enum rte_comp_op_type op_type;
 	union {
 		void *private_xform;
@@ -478,7 +478,7 @@ struct rte_comp_op {
 	 * will be set to RTE_COMP_OP_STATUS_SUCCESS after operation
 	 * is successfully processed by a PMD
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Creates an operation pool
diff --git a/lib/compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
index 01b7764..8a626d3 100644
--- a/lib/compressdev/rte_compressdev_internal.h
+++ b/lib/compressdev/rte_compressdev_internal.h
@@ -69,7 +69,7 @@ typedef uint16_t (*compressdev_enqueue_pkt_burst_t)(void *qp,
 		struct rte_comp_op **ops, uint16_t nb_ops);
 
 /** The data structure associated with each comp device. */
-struct rte_compressdev {
+struct __rte_cache_aligned rte_compressdev {
 	compressdev_dequeue_pkt_burst_t dequeue_burst;
 	/**< Pointer to PMD receive function */
 	compressdev_enqueue_pkt_burst_t enqueue_burst;
@@ -87,7 +87,7 @@ struct rte_compressdev {
 	__extension__
 	uint8_t attached : 1;
 	/**< Flag indicating the device is attached */
-} __rte_cache_aligned;
+};
 
 /**
  *
@@ -96,7 +96,7 @@ struct rte_compressdev {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_compressdev_data {
+struct __rte_cache_aligned rte_compressdev_data {
 	uint8_t dev_id;
 	/**< Compress device identifier */
 	int socket_id;
@@ -115,7 +115,7 @@ struct rte_compressdev_data {
 
 	void *dev_private;
 	/**< PMD-specific private data */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
-- 
1.8.3.1

[PATCH v5 34/39] cryptodev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/cryptodev/cryptodev_pmd.h      | 8 ++++----
 lib/cryptodev/rte_cryptodev_core.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 0732b35..6229ad4 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -61,7 +61,7 @@ struct rte_cryptodev_pmd_init_params {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_cryptodev_data {
+struct __rte_cache_aligned rte_cryptodev_data {
 	/** Device ID for this instance */
 	uint8_t dev_id;
 	/** Socket ID where memory is allocated */
@@ -82,10 +82,10 @@ struct rte_cryptodev_data {
 
 	/** PMD-specific private data */
 	void *dev_private;
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
+struct __rte_cache_aligned rte_cryptodev {
 	/** Pointer to PMD dequeue function. */
 	dequeue_pkt_burst_t dequeue_burst;
 	/** Pointer to PMD enqueue function. */
@@ -117,7 +117,7 @@ struct rte_cryptodev {
 	struct rte_cryptodev_cb_rcu *enq_cbs;
 	/** User application callback for post dequeue processing */
 	struct rte_cryptodev_cb_rcu *deq_cbs;
-} __rte_cache_aligned;
+};
 
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index 5de89d0..8d7e58d 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -40,7 +40,7 @@ struct rte_cryptodev_qpdata {
 	struct rte_cryptodev_cb_rcu *deq_cb;
 };
 
-struct rte_crypto_fp_ops {
+struct __rte_cache_aligned rte_crypto_fp_ops {
 	/** PMD enqueue burst function. */
 	enqueue_pkt_burst_t enqueue_burst;
 	/** PMD dequeue burst function. */
@@ -49,7 +49,7 @@ struct rte_crypto_fp_ops {
 	struct rte_cryptodev_qpdata qp;
 	/** Reserved for future ops. */
 	uintptr_t reserved[3];
-} __rte_cache_aligned;
+};
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v5 35/39] dispatcher: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/dispatcher/rte_dispatcher.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index f546d75..7934917 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -41,7 +41,7 @@ struct rte_dispatcher_finalizer {
 	void *finalize_data;
 };
 
-struct rte_dispatcher_lcore {
+struct __rte_cache_aligned rte_dispatcher_lcore {
 	uint8_t num_ports;
 	uint16_t num_handlers;
 	int32_t prio_count;
@@ -49,7 +49,7 @@ struct rte_dispatcher_lcore {
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 struct rte_dispatcher {
 	uint8_t event_dev_id;
-- 
1.8.3.1

[PATCH v5 36/39] fib: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@ struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@ struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t
-- 
1.8.3.1

[PATCH v5 37/39] gpudev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/gpudev/gpudev_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h
index 0b1e7f2..37b6ae3 100644
--- a/lib/gpudev/gpudev_driver.h
+++ b/lib/gpudev/gpudev_driver.h
@@ -72,7 +72,7 @@ struct rte_gpu_mpshared {
 	RTE_ATOMIC(uint16_t) process_refcnt; /* Updated by this library. */
 };
 
-struct rte_gpu {
+struct __rte_cache_aligned rte_gpu {
 	/* Backing device. */
 	struct rte_device *device;
 	/* Data shared between processes. */
@@ -85,7 +85,7 @@ struct rte_gpu {
 	enum rte_gpu_state process_state; /* Updated by this library. */
 	/* Driver-specific private data for the running process. */
 	void *process_private;
-} __rte_cache_aligned;
+};
 
 __rte_internal
 struct rte_gpu *rte_gpu_get_by_name(const char *name);
-- 
1.8.3.1

[PATCH v5 38/39] graph: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/graph/graph_private.h           |  4 ++--
 lib/graph/graph_stats.c             |  4 ++--
 lib/graph/rte_graph.h               |  4 ++--
 lib/graph/rte_graph_worker_common.h | 17 ++++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/graph/graph_private.h b/lib/graph/graph_private.h
index fb88d4b..7e4d9f8 100644
--- a/lib/graph/graph_private.h
+++ b/lib/graph/graph_private.h
@@ -71,11 +71,11 @@ struct node {
  * Structure that holds the graph scheduling workqueue node stream.
  * Used for mcore dispatch model.
  */
-struct graph_mcore_dispatch_wq_node {
+struct __rte_cache_aligned graph_mcore_dispatch_wq_node {
 	rte_graph_off_t node_off;
 	uint16_t nb_objs;
 	void *objs[RTE_GRAPH_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/graph/graph_stats.c b/lib/graph/graph_stats.c
index cc32245..2fb808b 100644
--- a/lib/graph/graph_stats.c
+++ b/lib/graph/graph_stats.c
@@ -28,7 +28,7 @@ struct cluster_node {
 	struct rte_node *nodes[];
 };
 
-struct rte_graph_cluster_stats {
+struct __rte_cache_aligned rte_graph_cluster_stats {
 	/* Header */
 	rte_graph_cluster_stats_cb_t fn;
 	uint32_t cluster_node_size; /* Size of struct cluster_node */
@@ -38,7 +38,7 @@ struct rte_graph_cluster_stats {
 	size_t sz;
 
 	struct cluster_node clusters[];
-} __rte_cache_aligned;
+};
 
 #define boarder_model_dispatch()                                                              \
 	fprintf(f, "+-------------------------------+---------------+--------" \
diff --git a/lib/graph/rte_graph.h b/lib/graph/rte_graph.h
index 2d37d5e..ecfec20 100644
--- a/lib/graph/rte_graph.h
+++ b/lib/graph/rte_graph.h
@@ -200,7 +200,7 @@ struct rte_graph_cluster_stats_param {
  *
  * @see struct rte_graph_cluster_stats_param::fn
  */
-struct rte_graph_cluster_node_stats {
+struct __rte_cache_aligned rte_graph_cluster_node_stats {
 	uint64_t ts;	    /**< Current timestamp. */
 	uint64_t calls;	    /**< Current number of calls made. */
 	uint64_t objs;      /**< Current number of objs processed. */
@@ -225,7 +225,7 @@ struct rte_graph_cluster_node_stats {
 	rte_node_t id;	/**< Node identifier of stats. */
 	uint64_t hz;	/**< Cycles per seconds. */
 	char name[RTE_NODE_NAMESIZE];	/**< Name of the node. */
-} __rte_cache_aligned;
+};
 
 /**
  * Create Graph.
diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_worker_common.h
index 4045a7a..36d864e 100644
--- a/lib/graph/rte_graph_worker_common.h
+++ b/lib/graph/rte_graph_worker_common.h
@@ -12,6 +12,8 @@
  * process, enqueue and move streams of objects to the next nodes.
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_cycles.h>
 #include <rte_prefetch.h>
@@ -43,7 +45,7 @@
  *
  * Data structure to hold graph data.
  */
-struct rte_graph {
+struct __rte_cache_aligned rte_graph {
 	/* Fast path area. */
 	uint32_t tail;		     /**< Tail of circular buffer. */
 	uint32_t head;		     /**< Head of circular buffer. */
@@ -57,7 +59,8 @@ struct rte_graph {
 	union {
 		/* Fast schedule area for mcore dispatch model */
 		struct {
-			struct rte_graph_rq_head *rq __rte_cache_aligned; /* The run-queue */
+			alignas(RTE_CACHE_LINE_SIZE) struct rte_graph_rq_head *rq;
+				/* The run-queue */
 			struct rte_graph_rq_head rq_head; /* The head for run-queue list */
 
 			unsigned int lcore_id;  /**< The graph running Lcore. */
@@ -77,14 +80,14 @@ struct rte_graph {
 	uint64_t nb_pkt_to_capture;
 	char pcap_filename[RTE_GRAPH_PCAP_FILE_SZ];  /**< Pcap filename. */
 	uint64_t fence;			/**< Fence. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
  *
  * Data structure to hold node data.
  */
-struct rte_node {
+struct __rte_cache_aligned rte_node {
 	/* Slow path area  */
 	uint64_t fence;		/**< Fence. */
 	rte_graph_off_t next;	/**< Index to next node. */
@@ -109,7 +112,7 @@ struct rte_node {
 	};
 	/* Fast path area  */
 #define RTE_NODE_CTX_SZ 16
-	uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Context. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t ctx[RTE_NODE_CTX_SZ]; /**< Node Context. */
 	uint16_t size;		/**< Total number of objects available. */
 	uint16_t idx;		/**< Number of objects used. */
 	rte_graph_off_t off;	/**< Offset of node in the graph reel. */
@@ -124,8 +127,8 @@ struct rte_node {
 			rte_node_process_t process; /**< Process function. */
 			uint64_t process_u64;
 		};
-	struct rte_node *nodes[] __rte_cache_min_aligned; /**< Next nodes. */
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) struct rte_node *nodes[]; /**< Next nodes. */
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v5 39/39] ip_frag: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ip_frag/ip_reassembly.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
index a9f97ae..5443c73 100644
--- a/lib/ip_frag/ip_reassembly.h
+++ b/lib/ip_frag/ip_reassembly.h
@@ -47,7 +47,7 @@ struct ip_frag_key {
  * Fragmented packet to reassemble.
  * First two entries in the frags[] array are for the last and first fragments.
  */
-struct ip_frag_pkt {
+struct __rte_cache_aligned ip_frag_pkt {
 	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
 	struct ip_frag_key key;                /* fragmentation key */
 	uint64_t start;                        /* creation timestamp */
@@ -55,20 +55,20 @@ struct ip_frag_pkt {
 	uint32_t frag_size;                    /* size of fragments received */
 	uint32_t last_idx;                     /* index of next entry to fill */
 	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
-} __rte_cache_aligned;
+};
 
  /* fragments tailq */
 RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
 
 /* fragmentation table statistics */
-struct ip_frag_tbl_stat {
+struct __rte_cache_aligned ip_frag_tbl_stat {
 	uint64_t find_num;     /* total # of find/insert attempts. */
 	uint64_t add_num;      /* # of add ops. */
 	uint64_t del_num;      /* # of del ops. */
 	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
 	uint64_t fail_total;   /* total # of add failures. */
 	uint64_t fail_nospace; /* # of 'no space' add failures. */
-} __rte_cache_aligned;
+};
 
 /* fragmentation table */
 struct rte_ip_frag_tbl {
-- 
1.8.3.1

Re: [PATCH v5 01/39] eal: use C11 alignas

[Bruce Richardson]

On Fri, Feb 23, 2024 at 11:03:36AM -0800, Tyler Retzlaff wrote:
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Expand __rte_aligned(a) to __declspec(align(a)) when building
>   with MSVC.
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/eal/arm/include/rte_vect.h       |  4 ++--
>  lib/eal/common/malloc_elem.h         |  4 ++--
>  lib/eal/common/malloc_heap.h         |  4 ++--
>  lib/eal/common/rte_keepalive.c       |  3 ++-
>  lib/eal/common/rte_random.c          |  4 ++--
>  lib/eal/common/rte_service.c         |  8 ++++----
>  lib/eal/include/generic/rte_atomic.h |  4 ++--
>  lib/eal/include/rte_common.h         | 23 +++++++++++++++--------
>  lib/eal/loongarch/include/rte_vect.h |  8 ++++----
>  lib/eal/ppc/include/rte_vect.h       |  4 ++--
>  lib/eal/riscv/include/rte_vect.h     |  4 ++--
>  lib/eal/x86/include/rte_vect.h       |  4 ++--
>  lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
>  13 files changed, 47 insertions(+), 37 deletions(-)
> 
Just to chime in with one additional benefit of this change - it will
prevent static analysers, IDEs and doxygen[1] from ever mistaking the
__rte_aligned tag at the end of a struct define as being a variable
definition. In the absence of a macro definition from our DPDK header files
this defines a variable called __rte_cache_aligned (as in [1]!):

   struct xyz {
   } __rte_cache_aligned;

while this just gives an error to let you know the definiton is missing:

  struct __rte_cache_aligned xyz {
  };

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

[1] http://doc.dpdk.org/api/structrte__ring.html#a43d0b019eced25dc6c357f3b4f0f47e5

RE: [PATCH v5 02/39] eal: redefine macro to be integer literal for MSVC

[Konstantin Ananyev]

> MSVC __declspec(align(#)) is limited and accepts only integer literals
> as opposed to constant expressions. define XMM_SIZE to be 16 instead of
> sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
> compatibility.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/eal/x86/include/rte_vect.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
> index a1a537e..441f1a0 100644
> --- a/lib/eal/x86/include/rte_vect.h
> +++ b/lib/eal/x86/include/rte_vect.h
> @@ -11,6 +11,7 @@
>   * RTE SSE/AVX related header.
>   */
> 
> +#include <assert.h>
>  #include <stdint.h>
>  #include <rte_config.h>
>  #include <rte_common.h>
> @@ -33,9 +34,11 @@
> 
>  typedef __m128i xmm_t;
> 
> -#define	XMM_SIZE	(sizeof(xmm_t))
> +#define	XMM_SIZE	16
>  #define	XMM_MASK	(XMM_SIZE - 1)
> 
> +static_assert(sizeof(xmm_t) == 16, "");

I think it is better be:
static_assert(sizeof(xmm_t) == XMM_SIZE, "");


BTW, is there any chance that in future versions MSVC would accept align(<constant_expression>)?

> +
>  typedef union rte_xmm {
>  	xmm_t    x;
>  	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
> --
> 1.8.3.1

RE: [PATCH v5 05/39] ring: use C11 alignas

[Konstantin Ananyev]

> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/ring/rte_ring_core.h    | 16 +++++++++-------
>  lib/ring/rte_ring_peek_zc.h |  4 ++--
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
> index b770873..497d535 100644
> --- a/lib/ring/rte_ring_core.h
> +++ b/lib/ring/rte_ring_core.h
> @@ -19,6 +19,8 @@
>   * instead.
>   */
> 
> +#include <stdalign.h>
> +
>  #ifdef __cplusplus
>  extern "C" {
>  #endif
> @@ -78,7 +80,7 @@ struct rte_ring_headtail {
> 
>  union __rte_ring_rts_poscnt {
>  	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
> -	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
> +	alignas(8) RTE_ATOMIC(uint64_t) raw;

One small question - here and below, would it possible to do 'alignas(sizeof(uint64_t))' instead of 'alignas(8)?
Or MSVC has some restrictions here?


>  	struct {
>  		uint32_t cnt; /**< head/tail reference counter */
>  		uint32_t pos; /**< head/tail position */
> @@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
> 

Re: [PATCH v5 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

On Mon, Feb 26, 2024 at 12:51:38PM +0000, Konstantin Ananyev wrote:
> 
> 
> > MSVC __declspec(align(#)) is limited and accepts only integer literals
> > as opposed to constant expressions. define XMM_SIZE to be 16 instead of
> > sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
> > compatibility.
> > 
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > ---
> >  lib/eal/x86/include/rte_vect.h | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
> > index a1a537e..441f1a0 100644
> > --- a/lib/eal/x86/include/rte_vect.h
> > +++ b/lib/eal/x86/include/rte_vect.h
> > @@ -11,6 +11,7 @@
> >   * RTE SSE/AVX related header.
> >   */
> > 
> > +#include <assert.h>
> >  #include <stdint.h>
> >  #include <rte_config.h>
> >  #include <rte_common.h>
> > @@ -33,9 +34,11 @@
> > 
> >  typedef __m128i xmm_t;
> > 
> > -#define	XMM_SIZE	(sizeof(xmm_t))
> > +#define	XMM_SIZE	16
> >  #define	XMM_MASK	(XMM_SIZE - 1)
> > 
> > +static_assert(sizeof(xmm_t) == 16, "");
> 
> I think it is better be:
> static_assert(sizeof(xmm_t) == XMM_SIZE, "");
> 

ack, will fix

> 
> BTW, is there any chance that in future versions MSVC would accept align(<constant_expression>)?

it does seem an oversight. i will ask the msvc team if they would like to enhance it.

thanks

> 
> > +
> >  typedef union rte_xmm {
> >  	xmm_t    x;
> >  	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
> > --
> > 1.8.3.1
> 

Re: [PATCH v5 05/39] ring: use C11 alignas

[Tyler Retzlaff]

On Mon, Feb 26, 2024 at 01:23:35PM +0000, Konstantin Ananyev wrote:
> 
> 
> > 
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> > 
> > For variables standard C11 offers alignas(a) supported by conformant
> > compilers i.e. both MSVC and GCC.
> > 
> > For types the standard offers no alignment facility that compatibly
> > interoperates with C and C++ but may be achieved by relocating the
> > placement of __rte_aligned(a) to the aforementioned location accepted
> > by all currently supported toolchains.
> > 
> > To allow alignment for both compilers do the following:
> > 
> > * Move __rte_aligned from the end of {struct,union} definitions to
> >   be between {struct,union} and tag.
> > 
> >   The placement between {struct,union} and the tag allows the desired
> >   alignment to be imparted on the type regardless of the toolchain being
> >   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> > 
> > * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> > 
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > ---
> >  lib/ring/rte_ring_core.h    | 16 +++++++++-------
> >  lib/ring/rte_ring_peek_zc.h |  4 ++--
> >  2 files changed, 11 insertions(+), 9 deletions(-)
> > 
> > diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
> > index b770873..497d535 100644
> > --- a/lib/ring/rte_ring_core.h
> > +++ b/lib/ring/rte_ring_core.h
> > @@ -19,6 +19,8 @@
> >   * instead.
> >   */
> > 
> > +#include <stdalign.h>
> > +
> >  #ifdef __cplusplus
> >  extern "C" {
> >  #endif
> > @@ -78,7 +80,7 @@ struct rte_ring_headtail {
> > 
> >  union __rte_ring_rts_poscnt {
> >  	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
> > -	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
> > +	alignas(8) RTE_ATOMIC(uint64_t) raw;
> 
> One small question - here and below, would it possible to do 'alignas(sizeof(uint64_t))' instead of 'alignas(8)?
> Or MSVC has some restrictions here?

it should be okay to use a constant expression with alignas(n) even with
MSVC because it is conformant, if it isn't it would be a bug.  it is one benefit
over using __declspec(align(a)).

i'll update the series to use sizeof.

> 
> 
> >  	struct {
> >  		uint32_t cnt; /**< head/tail reference counter */
> >  		uint32_t pos; /**< head/tail position */
> > @@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
> > 

[PATCH v6 00/39] use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

** NOTE **

Finally, In the interest of not creating more API (internal or not) the
series does not introduce a wrapper for C11 alignas. If we don't introduce
a macro an application can't take a dependency.

v6:
  * update static_assert to use XMM_SIZE instead of literal integer 16
  * update 2 explicit alignments of ring struct fields to use
  * alignas(sizeof(uint64_t)) instead of alignas(8)

v5:
  * rebase series.
  * reword all commit messages with why the change is necessary.
  * document guidance for the usage of __rte_aligned macro indicating
    that it should be used for type alignment only and advising that for
    variable alignment standard C11 alignas(a) should be preferred.

v4:
  * restore explicit alignment of 8-byte integers in mbuf and
    ring patches, natural alignment may be 4-bytes on 32-bit
    targets.
v3:
  * add missing patches for __rte_cache_aligned and
    __rte_cache_min_aligned
v2:
  * add missing #include <stdalign.h> for alignas macro.

Tyler Retzlaff (39):
  eal: use C11 alignas
  eal: redefine macro to be integer literal for MSVC
  stack: use C11 alignas
  sched: use C11 alignas
  ring: use C11 alignas
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: use C11 alignas
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  vhost: use C11 alignas
  timer: use C11 alignas
  table: use C11 alignas
  reorder: use C11 alignas
  regexdev: use C11 alignas
  rcu: use C11 alignas
  power: use C11 alignas
  rawdev: use C11 alignas
  port: use C11 alignas
  pdcp: use C11 alignas
  node: use C11 alignas
  mldev: use C11 alignas
  mempool: use C11 alignas
  member: use C11 alignas
  lpm: use C11 alignas
  ipsec: use C11 alignas
  jobstats: use C11 alignas
  bpf: use C11 alignas
  compressdev: use C11 alignas
  cryptodev: use C11 alignas
  dispatcher: use C11 alignas
  fib: use C11 alignas
  gpudev: use C11 alignas
  graph: use C11 alignas
  ip_frag: use C11 alignas

 lib/acl/acl_run.h                          |  4 ++--
 lib/acl/acl_run_altivec.h                  |  6 ++++--
 lib/acl/acl_run_neon.h                     |  6 ++++--
 lib/bpf/bpf_pkt.c                          |  4 ++--
 lib/compressdev/rte_comp.h                 |  4 ++--
 lib/compressdev/rte_compressdev_internal.h |  8 +++----
 lib/cryptodev/cryptodev_pmd.h              |  8 +++----
 lib/cryptodev/rte_cryptodev_core.h         |  4 ++--
 lib/dispatcher/rte_dispatcher.c            |  4 ++--
 lib/distributor/distributor_private.h      | 34 ++++++++++++++++--------------
 lib/distributor/rte_distributor.c          |  5 +++--
 lib/dmadev/rte_dmadev_core.h               |  4 ++--
 lib/dmadev/rte_dmadev_pmd.h                |  8 +++----
 lib/eal/arm/include/rte_vect.h             |  4 ++--
 lib/eal/common/malloc_elem.h               |  4 ++--
 lib/eal/common/malloc_heap.h               |  4 ++--
 lib/eal/common/rte_keepalive.c             |  3 ++-
 lib/eal/common/rte_random.c                |  4 ++--
 lib/eal/common/rte_service.c               |  8 +++----
 lib/eal/include/generic/rte_atomic.h       |  4 ++--
 lib/eal/include/rte_common.h               | 23 +++++++++++++-------
 lib/eal/loongarch/include/rte_vect.h       |  8 +++----
 lib/eal/ppc/include/rte_vect.h             |  4 ++--
 lib/eal/riscv/include/rte_vect.h           |  4 ++--
 lib/eal/x86/include/rte_vect.h             |  9 +++++---
 lib/eal/x86/rte_power_intrinsics.c         | 10 +++++----
 lib/ethdev/ethdev_driver.h                 |  8 +++----
 lib/ethdev/rte_ethdev.h                    | 16 +++++++-------
 lib/ethdev/rte_ethdev_core.h               |  4 ++--
 lib/ethdev/rte_flow_driver.h               |  4 ++--
 lib/eventdev/event_timer_adapter_pmd.h     |  4 ++--
 lib/eventdev/eventdev_pmd.h                |  8 +++----
 lib/eventdev/rte_event_crypto_adapter.c    | 16 +++++++-------
 lib/eventdev/rte_event_dma_adapter.c       | 16 +++++++-------
 lib/eventdev/rte_event_eth_rx_adapter.c    |  8 +++----
 lib/eventdev/rte_event_eth_tx_adapter.c    |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c     |  9 ++++----
 lib/eventdev/rte_event_timer_adapter.h     |  8 +++----
 lib/eventdev/rte_eventdev.h                |  8 +++----
 lib/eventdev/rte_eventdev_core.h           |  4 ++--
 lib/fib/dir24_8.h                          |  4 +++-
 lib/fib/trie.h                             |  4 +++-
 lib/gpudev/gpudev_driver.h                 |  4 ++--
 lib/graph/graph_private.h                  |  4 ++--
 lib/graph/graph_stats.c                    |  4 ++--
 lib/graph/rte_graph.h                      |  4 ++--
 lib/graph/rte_graph_worker_common.h        | 17 +++++++++------
 lib/hash/rte_cuckoo_hash.h                 | 16 ++++++++------
 lib/hash/rte_thash.c                       |  4 +++-
 lib/hash/rte_thash.h                       |  8 +++----
 lib/ip_frag/ip_reassembly.h                |  8 +++----
 lib/ipsec/rte_ipsec.h                      |  4 ++--
 lib/ipsec/sa.h                             |  4 ++--
 lib/jobstats/rte_jobstats.h                |  8 +++----
 lib/lpm/rte_lpm.h                          |  5 +++--
 lib/lpm/rte_lpm6.c                         |  8 +++----
 lib/mbuf/rte_mbuf_core.h                   |  6 +++---
 lib/member/rte_member.h                    |  8 +++----
 lib/member/rte_member_ht.h                 |  4 ++--
 lib/member/rte_member_sketch.c             |  4 ++--
 lib/mempool/rte_mempool.h                  | 27 ++++++++++++------------
 lib/mldev/rte_mldev.h                      |  4 ++--
 lib/mldev/rte_mldev_core.h                 |  4 ++--
 lib/net/net_crc_avx512.c                   | 14 ++++++------
 lib/net/net_crc_neon.c                     | 11 +++++-----
 lib/net/net_crc_sse.c                      | 17 ++++++++-------
 lib/net/rte_arp.h                          |  8 +++----
 lib/net/rte_ether.h                        |  8 +++----
 lib/node/node_private.h                    |  4 ++--
 lib/node/pkt_cls.c                         |  4 +++-
 lib/pdcp/rte_pdcp.h                        |  4 ++--
 lib/pipeline/rte_pipeline.c                |  4 ++--
 lib/pipeline/rte_port_in_action.c          |  3 ++-
 lib/pipeline/rte_swx_ipsec.c               |  4 +++-
 lib/pipeline/rte_table_action.c            | 24 ++++++++++-----------
 lib/port/rte_port_frag.c                   |  4 ++--
 lib/power/power_acpi_cpufreq.c             |  4 ++--
 lib/power/power_amd_pstate_cpufreq.c       |  4 ++--
 lib/power/power_cppc_cpufreq.c             |  4 ++--
 lib/power/power_intel_uncore.c             |  4 ++--
 lib/power/power_pstate_cpufreq.c           |  4 ++--
 lib/power/rte_power_pmd_mgmt.c             |  4 ++--
 lib/rawdev/rte_rawdev.h                    |  4 ++--
 lib/rcu/rte_rcu_qsbr.h                     | 16 ++++++++------
 lib/regexdev/rte_regexdev_core.h           |  8 +++----
 lib/reorder/rte_reorder.c                  |  8 +++----
 lib/ring/rte_ring_core.h                   | 16 ++++++++------
 lib/ring/rte_ring_peek_zc.h                |  4 ++--
 lib/sched/rte_sched.c                      | 21 +++++++++---------
 lib/sched/rte_sched_common.h               |  2 --
 lib/stack/rte_stack.h                      | 16 ++++++++------
 lib/table/rte_swx_table_learner.c          |  4 ++--
 lib/table/rte_table_acl.c                  |  3 ++-
 lib/table/rte_table_array.c                |  7 +++---
 lib/table/rte_table_hash_cuckoo.c          |  4 +++-
 lib/table/rte_table_hash_ext.c             |  3 ++-
 lib/table/rte_table_hash_key16.c           |  4 +++-
 lib/table/rte_table_hash_key32.c           |  4 +++-
 lib/table/rte_table_hash_key8.c            |  4 +++-
 lib/table/rte_table_hash_lru.c             |  3 ++-
 lib/table/rte_table_lpm.c                  |  3 ++-
 lib/table/rte_table_lpm_ipv6.c             |  3 ++-
 lib/timer/rte_timer.c                      |  4 ++--
 lib/vhost/vhost.h                          |  8 +++----
 lib/vhost/vhost_crypto.c                   |  4 ++--
 105 files changed, 408 insertions(+), 346 deletions(-)

-- 
1.8.3.1

[PATCH v6 01/39] eal: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
---
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/common/malloc_elem.h         |  4 ++--
 lib/eal/common/malloc_heap.h         |  4 ++--
 lib/eal/common/rte_keepalive.c       |  3 ++-
 lib/eal/common/rte_random.c          |  4 ++--
 lib/eal/common/rte_service.c         |  8 ++++----
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         | 23 +++++++++++++++--------
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  4 ++--
 lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
 13 files changed, 47 insertions(+), 37 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
index 952ce73..c7ff671 100644
--- a/lib/eal/common/malloc_elem.h
+++ b/lib/eal/common/malloc_elem.h
@@ -20,7 +20,7 @@ enum elem_state {
 	ELEM_PAD  /* element is a padding-only header */
 };
 
-struct malloc_elem {
+struct __rte_cache_aligned malloc_elem {
 	struct malloc_heap *heap;
 	struct malloc_elem *volatile prev;
 	/**< points to prev elem in memseg */
@@ -48,7 +48,7 @@ struct malloc_elem {
 	size_t user_size;
 	uint64_t asan_cookie[2]; /* must be next to header_cookie */
 #endif
-} __rte_cache_aligned;
+};
 
 static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
 
diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
index 8f3ab57..0c49588 100644
--- a/lib/eal/common/malloc_heap.h
+++ b/lib/eal/common/malloc_heap.h
@@ -21,7 +21,7 @@
 /**
  * Structure to hold malloc heap
  */
-struct malloc_heap {
+struct __rte_cache_aligned malloc_heap {
 	rte_spinlock_t lock;
 	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
 	struct malloc_elem *volatile first;
@@ -31,7 +31,7 @@ struct malloc_heap {
 	unsigned int socket_id;
 	size_t total_size;
 	char name[RTE_HEAP_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 void *
 malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
index f6db973..391c1be 100644
--- a/lib/eal/common/rte_keepalive.c
+++ b/lib/eal/common/rte_keepalive.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2015-2016 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <inttypes.h>
 
 #include <rte_common.h>
@@ -19,7 +20,7 @@ struct rte_keepalive {
 		/*
 		 * Each element must be cache aligned to prevent false sharing.
 		 */
-		enum rte_keepalive_state core_state __rte_cache_aligned;
+		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
 	} live_data[RTE_KEEPALIVE_MAXCORES];
 
 	/** Last-seen-alive timestamps */
diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
index 7709b8f..90e91b3 100644
--- a/lib/eal/common/rte_random.c
+++ b/lib/eal/common/rte_random.c
@@ -13,14 +13,14 @@
 #include <rte_lcore.h>
 #include <rte_random.h>
 
-struct rte_rand_state {
+struct __rte_cache_aligned rte_rand_state {
 	uint64_t z1;
 	uint64_t z2;
 	uint64_t z3;
 	uint64_t z4;
 	uint64_t z5;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 /* One instance each for every lcore id-equipped thread, and one
  * additional instance to be shared by all others threads (i.e., all
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index d959c91..5637993 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -32,7 +32,7 @@
 #define RUNSTATE_RUNNING 1
 
 /* internal representation of a service */
-struct rte_service_spec_impl {
+struct __rte_cache_aligned rte_service_spec_impl {
 	/* public part of the struct */
 	struct rte_service_spec spec;
 
@@ -53,7 +53,7 @@ struct rte_service_spec_impl {
 	 * on currently.
 	 */
 	RTE_ATOMIC(uint32_t) num_mapped_cores;
-} __rte_cache_aligned;
+};
 
 struct service_stats {
 	RTE_ATOMIC(uint64_t) calls;
@@ -61,7 +61,7 @@ struct service_stats {
 };
 
 /* the internal values of a service core */
-struct core_state {
+struct __rte_cache_aligned core_state {
 	/* map of services IDs are run on this core */
 	uint64_t service_mask;
 	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
@@ -71,7 +71,7 @@ struct core_state {
 	RTE_ATOMIC(uint64_t) loops;
 	RTE_ATOMIC(uint64_t) cycles;
 	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
-} __rte_cache_aligned;
+};
 
 static uint32_t rte_service_count;
 static struct rte_service_spec_impl *rte_services;
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index 1cc1222..0908aa0 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -12,6 +12,8 @@
  * for DPDK.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -63,10 +65,19 @@
 #endif
 
 /**
- * Force alignment
+ * Force type alignment
+ *
+ * This macro should be used when alignment of a struct or union type
+ * is required. For toolchain compatibility it should appear between
+ * the {struct,union} keyword and tag. e.g.
+ *
+ *   struct __rte_aligned(8) tag { ... };
+ *
+ * If alignment of an object/variable is required then this macro should
+ * not be used, instead prefer C11 alignas(a).
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
@@ -538,18 +549,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
 #define RTE_CACHE_LINE_MIN_SIZE 64
 
 /** Force alignment to cache line. */
-#ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_cache_aligned
-#else
 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-#endif
 
 /** Force minimum cache line alignment. */
 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
 
 #define _RTE_CACHE_GUARD_HELPER2(unique) \
-	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) \
+	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
 #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
 /**
  * Empty cache lines, to guard against false sharing-like effects
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 532a2e6..6d9b642 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2020 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_lcore.h>
 #include <rte_rtm.h>
@@ -12,10 +14,10 @@
 /*
  * Per-lcore structure holding current status of C0.2 sleeps.
  */
-static struct power_wait_status {
+static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
 	rte_spinlock_t lock;
 	volatile void *monitor_addr; /**< NULL if not currently sleeping */
-} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
+} wait_status[RTE_MAX_LCORE];
 
 /*
  * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
@@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
 #endif
 }
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	void (*mmonitor)(volatile void *addr);
 	void (*mwait)(const uint64_t timeout);
-} __rte_cache_aligned power_monitor_ops;
+} power_monitor_ops;
 
 static inline void
 __umwait_wakeup(volatile void *addr)
-- 
1.8.3.1

[PATCH v6 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..5ac3ccf 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == XMM_SIZE, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v6 03/39] stack: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/stack/rte_stack.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..8ff0659 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
@@ -52,11 +54,11 @@ struct rte_stack_lf_list {
  */
 struct rte_stack_lf {
 	/** LIFO list of elements */
-	struct rte_stack_lf_list used __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list used;
 	/** LIFO list of free elements */
-	struct rte_stack_lf_list free __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list free;
 	/** LIFO elements */
-	struct rte_stack_lf_elem elems[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_elem elems[];
 };
 
 /* Structure containing the LIFO, its current length, and a lock for mutual
@@ -71,9 +73,9 @@ struct rte_stack_std {
 /* The RTE stack structure contains the LIFO structure itself, plus metadata
  * such as its name and memzone pointer.
  */
-struct rte_stack {
+struct __rte_cache_aligned rte_stack {
 	/** Name of the stack. */
-	char name[RTE_STACK_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_STACK_NAMESIZE];
 	/** Memzone containing the rte_stack structure. */
 	const struct rte_memzone *memzone;
 	uint32_t capacity; /**< Usable size of the stack. */
@@ -82,7 +84,7 @@ struct rte_stack {
 		struct rte_stack_lf stack_lf; /**< Lock-free LIFO structure. */
 		struct rte_stack_std stack_std;	/**< LIFO structure. */
 	};
-} __rte_cache_aligned;
+};
 
 /**
  * The stack uses lock-free push and pop functions. This flag is only
-- 
1.8.3.1

[PATCH v6 04/39] sched: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@ struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@ struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@ struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@ struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@ struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@ struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v6 05/39] ring: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ring/rte_ring_core.h    | 16 +++++++++-------
 lib/ring/rte_ring_peek_zc.h |  4 ++--
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..f958064 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -19,6 +19,8 @@
  * instead.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -78,7 +80,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
@@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
  * a problem.
  */
 struct rte_ring {
-	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
 	/**< Name of the ring. */
 	int flags;               /**< Flags supplied at creation. */
 	const struct rte_memzone *memzone;
@@ -129,20 +131,20 @@ struct rte_ring {
 	RTE_CACHE_GUARD;
 
 	/** Ring producer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail prod;
 		struct rte_ring_hts_headtail hts_prod;
 		struct rte_ring_rts_headtail rts_prod;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 
 	/** Ring consumer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail cons;
 		struct rte_ring_hts_headtail hts_cons;
 		struct rte_ring_rts_headtail rts_cons;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 };
diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
index 8fb279c..0b5e34b 100644
--- a/lib/ring/rte_ring_peek_zc.h
+++ b/lib/ring/rte_ring_peek_zc.h
@@ -79,7 +79,7 @@
  * This structure contains the pointers and length of the space
  * reserved on the ring storage.
  */
-struct rte_ring_zc_data {
+struct __rte_cache_aligned rte_ring_zc_data {
 	/* Pointer to the first space in the ring */
 	void *ptr1;
 	/* Pointer to the second space in the ring if there is wrap-around.
@@ -92,7 +92,7 @@ struct rte_ring_zc_data {
 	 * will give the number of elements available at ptr2.
 	 */
 	unsigned int n1;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
-- 
1.8.3.1

[PATCH v6 06/39] pipeline: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pipeline/rte_pipeline.c       |  4 ++--
 lib/pipeline/rte_port_in_action.c |  3 ++-
 lib/pipeline/rte_swx_ipsec.c      |  4 +++-
 lib/pipeline/rte_table_action.c   | 24 ++++++++++++------------
 4 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index 945bb02..a09a89f 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -104,7 +104,7 @@ struct rte_table {
 
 #define RTE_PIPELINE_MAX_NAME_SZ                           124
 
-struct rte_pipeline {
+struct __rte_cache_aligned rte_pipeline {
 	/* Input parameters */
 	char name[RTE_PIPELINE_MAX_NAME_SZ];
 	int socket_id;
@@ -132,7 +132,7 @@ struct rte_pipeline {
 	uint64_t pkts_mask;
 	uint64_t n_pkts_ah_drop;
 	uint64_t pkts_drop_mask;
-} __rte_cache_aligned;
+};
 
 static inline uint32_t
 rte_mask_get_next(uint64_t mask, uint32_t pos)
diff --git a/lib/pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
index 5818973..bbacaff 100644
--- a/lib/pipeline/rte_port_in_action.c
+++ b/lib/pipeline/rte_port_in_action.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2018 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -282,7 +283,7 @@ struct rte_port_in_action_profile *
 struct rte_port_in_action {
 	struct ap_config cfg;
 	struct ap_data data;
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static __rte_always_inline void *
diff --git a/lib/pipeline/rte_swx_ipsec.c b/lib/pipeline/rte_swx_ipsec.c
index 28576c2..76b853f 100644
--- a/lib/pipeline/rte_swx_ipsec.c
+++ b/lib/pipeline/rte_swx_ipsec.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2022 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
@@ -154,7 +156,7 @@ struct rte_swx_ipsec {
 	/*
 	 * Table memory.
 	 */
-	uint8_t memory[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[];
 };
 
 static inline struct ipsec_sa *
diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v6 07/39] net: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index 75285bd..32ed515 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -71,9 +71,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -290,11 +290,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v6 08/39] mbuf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mbuf/rte_mbuf_core.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..917a811 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -463,7 +463,7 @@ enum {
 /**
  * The generic rte_mbuf, containing a packet mbuf.
  */
-struct rte_mbuf {
+struct __rte_cache_aligned rte_mbuf {
 	RTE_MARKER cacheline0;
 
 	void *buf_addr;           /**< Virtual address of segment buffer. */
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
@@ -662,7 +662,7 @@ struct rte_mbuf {
 	uint16_t timesync;
 
 	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * Function typedef of callback to free externally attached buffer.
-- 
1.8.3.1

[PATCH v6 09/39] hash: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/hash/rte_cuckoo_hash.h | 16 +++++++++-------
 lib/hash/rte_thash.c       |  4 +++-
 lib/hash/rte_thash.h       |  8 ++++----
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.h b/lib/hash/rte_cuckoo_hash.h
index 8ea793c..a528f1d 100644
--- a/lib/hash/rte_cuckoo_hash.h
+++ b/lib/hash/rte_cuckoo_hash.h
@@ -11,6 +11,8 @@
 #ifndef _RTE_CUCKOO_HASH_H_
 #define _RTE_CUCKOO_HASH_H_
 
+#include <stdalign.h>
+
 #if defined(RTE_ARCH_X86)
 #include "rte_cmp_x86.h"
 #endif
@@ -117,10 +119,10 @@ enum cmp_jump_table_case {
 
 #define RTE_HASH_TSX_MAX_RETRY  10
 
-struct lcore_cache {
+struct __rte_cache_aligned lcore_cache {
 	unsigned len; /**< Cache len */
 	uint32_t objs[LCORE_CACHE_SIZE]; /**< Cache objects */
-} __rte_cache_aligned;
+};
 
 /* Structure that stores key-value pair */
 struct rte_hash_key {
@@ -141,7 +143,7 @@ enum rte_hash_sig_compare_function {
 };
 
 /** Bucket structure */
-struct rte_hash_bucket {
+struct __rte_cache_aligned rte_hash_bucket {
 	uint16_t sig_current[RTE_HASH_BUCKET_ENTRIES];
 
 	RTE_ATOMIC(uint32_t) key_idx[RTE_HASH_BUCKET_ENTRIES];
@@ -149,10 +151,10 @@ struct rte_hash_bucket {
 	uint8_t flag[RTE_HASH_BUCKET_ENTRIES];
 
 	void *next;
-} __rte_cache_aligned;
+};
 
 /** A hash table structure. */
-struct rte_hash {
+struct __rte_cache_aligned rte_hash {
 	char name[RTE_HASH_NAMESIZE];   /**< Name of the hash. */
 	uint32_t entries;               /**< Total table entries. */
 	uint32_t num_buckets;           /**< Number of buckets in table. */
@@ -170,7 +172,7 @@ struct rte_hash {
 
 	/* Fields used in lookup */
 
-	uint32_t key_len __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t key_len;
 	/**< Length of hash key. */
 	uint8_t hw_trans_mem_support;
 	/**< If hardware transactional memory is used. */
@@ -220,7 +222,7 @@ struct rte_hash {
 	uint32_t *ext_bkt_to_free;
 	RTE_ATOMIC(uint32_t) *tbl_chng_cnt;
 	/**< Indicates if the hash table changed from last read. */
-} __rte_cache_aligned;
+};
 
 struct queue_node {
 	struct rte_hash_bucket *bkt; /* Current bucket on the bfs search */
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index e8de071..6464fd3 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2021 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <sys/queue.h>
 
 #include <rte_thash.h>
@@ -80,7 +82,7 @@ struct rte_thash_subtuple_helper {
 	uint32_t	tuple_offset;	/** < Offset in bits of the subtuple */
 	uint32_t	tuple_len;	/** < Length in bits of the subtuple */
 	uint32_t	lsb_msk;	/** < (1 << reta_sz_log) - 1 */
-	__extension__ uint32_t	compl_table[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint32_t	compl_table[0];
 	/** < Complementary table */
 };
 
diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v6 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eventdev/event_timer_adapter_pmd.h  |  4 ++--
 lib/eventdev/eventdev_pmd.h             |  8 ++++----
 lib/eventdev/rte_event_crypto_adapter.c | 16 ++++++++--------
 lib/eventdev/rte_event_dma_adapter.c    | 16 ++++++++--------
 lib/eventdev/rte_event_eth_rx_adapter.c |  8 ++++----
 lib/eventdev/rte_event_eth_tx_adapter.c |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c  |  9 +++++----
 lib/eventdev/rte_event_timer_adapter.h  |  8 ++++----
 lib/eventdev/rte_eventdev.h             |  8 ++++----
 lib/eventdev/rte_eventdev_core.h        |  4 ++--
 10 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/lib/eventdev/event_timer_adapter_pmd.h b/lib/eventdev/event_timer_adapter_pmd.h
index 65b421b..cd5127f 100644
--- a/lib/eventdev/event_timer_adapter_pmd.h
+++ b/lib/eventdev/event_timer_adapter_pmd.h
@@ -86,7 +86,7 @@ struct event_timer_adapter_ops {
  * @internal Adapter data; structure to be placed in shared memory to be
  * accessible by various processes in a multi-process configuration.
  */
-struct rte_event_timer_adapter_data {
+struct __rte_cache_aligned rte_event_timer_adapter_data {
 	uint8_t id;
 	/**< Event timer adapter ID */
 	uint8_t event_dev_id;
@@ -110,7 +110,7 @@ struct rte_event_timer_adapter_data {
 
 	uint8_t started : 1;
 	/**< Flag to indicate adapter started. */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index c415624..3934d8e 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -107,7 +107,7 @@ struct rte_eventdev_global {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_eventdev_data {
+struct __rte_cache_aligned rte_eventdev_data {
 	int socket_id;
 	/**< Socket ID where memory is allocated */
 	uint8_t dev_id;
@@ -146,10 +146,10 @@ struct rte_eventdev_data {
 
 	uint64_t reserved_64s[4]; /**< Reserved for future fields */
 	void *reserved_ptrs[4];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each event device. */
-struct rte_eventdev {
+struct __rte_cache_aligned rte_eventdev {
 	struct rte_eventdev_data *data;
 	/**< Pointer to device data */
 	struct eventdev_ops *dev_ops;
@@ -189,7 +189,7 @@ struct rte_eventdev {
 
 	uint64_t reserved_64s[3]; /**< Reserved for future fields */
 	void *reserved_ptrs[3];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 extern struct rte_eventdev *rte_eventdevs;
 /** @internal The pool of rte_eventdev structures. */
diff --git a/lib/eventdev/rte_event_crypto_adapter.c b/lib/eventdev/rte_event_crypto_adapter.c
index d46595d..6bc2769 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -42,7 +42,7 @@
 
 #define ECA_ADAPTER_ARRAY "crypto_adapter_array"
 
-struct crypto_ops_circular_buffer {
+struct __rte_cache_aligned crypto_ops_circular_buffer {
 	/* index of head element in circular buffer */
 	uint16_t head;
 	/* index of tail element in circular buffer */
@@ -53,9 +53,9 @@ struct crypto_ops_circular_buffer {
 	uint16_t size;
 	/* Pointer to hold rte_crypto_ops for batching */
 	struct rte_crypto_op **op_buffer;
-} __rte_cache_aligned;
+};
 
-struct event_crypto_adapter {
+struct __rte_cache_aligned event_crypto_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 	/* Event port identifier */
@@ -98,10 +98,10 @@ struct event_crypto_adapter {
 	uint16_t nb_qps;
 	/* Adapter mode */
 	enum rte_event_crypto_adapter_mode mode;
-} __rte_cache_aligned;
+};
 
 /* Per crypto device information */
-struct crypto_device_info {
+struct __rte_cache_aligned crypto_device_info {
 	/* Pointer to cryptodev */
 	struct rte_cryptodev *dev;
 	/* Pointer to queue pair info */
@@ -118,15 +118,15 @@ struct crypto_device_info {
 	 * be invoked if not already invoked
 	 */
 	uint16_t num_qpairs;
-} __rte_cache_aligned;
+};
 
 /* Per queue pair information */
-struct crypto_queue_pair_info {
+struct __rte_cache_aligned crypto_queue_pair_info {
 	/* Set to indicate queue pair is enabled */
 	bool qp_enabled;
 	/* Circular buffer for batching crypto ops to cdev */
 	struct crypto_ops_circular_buffer cbuf;
-} __rte_cache_aligned;
+};
 
 static struct event_crypto_adapter **event_crypto_adapter;
 
diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c
index 4196164..24dff55 100644
--- a/lib/eventdev/rte_event_dma_adapter.c
+++ b/lib/eventdev/rte_event_dma_adapter.c
@@ -26,7 +26,7 @@
 	} while (0)
 
 /* DMA ops circular buffer */
-struct dma_ops_circular_buffer {
+struct __rte_cache_aligned dma_ops_circular_buffer {
 	/* Index of head element */
 	uint16_t head;
 
@@ -41,19 +41,19 @@ struct dma_ops_circular_buffer {
 
 	/* Pointer to hold rte_event_dma_adapter_op for processing */
 	struct rte_event_dma_adapter_op **op_buffer;
-} __rte_cache_aligned;
+};
 
 /* Vchan information */
-struct dma_vchan_info {
+struct __rte_cache_aligned dma_vchan_info {
 	/* Set to indicate vchan queue is enabled */
 	bool vq_enabled;
 
 	/* Circular buffer for batching DMA ops to dma_dev */
 	struct dma_ops_circular_buffer dma_buf;
-} __rte_cache_aligned;
+};
 
 /* DMA device information */
-struct dma_device_info {
+struct __rte_cache_aligned dma_device_info {
 	/* Pointer to vchan queue info */
 	struct dma_vchan_info *vchanq;
 
@@ -81,9 +81,9 @@ struct dma_device_info {
 	 * transfer uses a hardware mechanism
 	 */
 	uint8_t internal_event_port;
-} __rte_cache_aligned;
+};
 
-struct event_dma_adapter {
+struct __rte_cache_aligned event_dma_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 
@@ -145,7 +145,7 @@ struct event_dma_adapter {
 
 	/* Per instance stats structure */
 	struct rte_event_dma_adapter_stats dma_stats;
-} __rte_cache_aligned;
+};
 
 static struct event_dma_adapter **event_dma_adapter;
 
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c
index 1b83a55..3ee20d9 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -72,7 +72,7 @@ struct eth_rx_poll_entry {
 	uint16_t eth_rx_qid;
 };
 
-struct eth_rx_vector_data {
+struct __rte_cache_aligned eth_rx_vector_data {
 	TAILQ_ENTRY(eth_rx_vector_data) next;
 	uint16_t port;
 	uint16_t queue;
@@ -82,7 +82,7 @@ struct eth_rx_vector_data {
 	uint64_t vector_timeout_ticks;
 	struct rte_mempool *vector_pool;
 	struct rte_event_vector *vector_ev;
-} __rte_cache_aligned;
+};
 
 TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
 
@@ -103,7 +103,7 @@ struct eth_event_enqueue_buffer {
 	uint16_t last_mask;
 };
 
-struct event_eth_rx_adapter {
+struct __rte_cache_aligned event_eth_rx_adapter {
 	/* RSS key */
 	uint8_t rss_key_be[RSS_KEY_SIZE];
 	/* Event device identifier */
@@ -188,7 +188,7 @@ struct event_eth_rx_adapter {
 	uint8_t rxa_started;
 	/* Adapter ID */
 	uint8_t id;
-} __rte_cache_aligned;
+};
 
 /* Per eth device */
 struct eth_device_info {
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index 56435be..67fff8b 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -109,7 +109,7 @@ struct txa_service_queue_info {
 };
 
 /* PMD private structure */
-struct txa_service_data {
+struct __rte_cache_aligned txa_service_data {
 	/* Max mbufs processed in any service function invocation */
 	uint32_t max_nb_tx;
 	/* Number of Tx queues in adapter */
@@ -144,7 +144,7 @@ struct txa_service_data {
 	int64_t service_id;
 	/* Memory allocation name */
 	char mem_name[TXA_MEM_NAME_LEN];
-} __rte_cache_aligned;
+};
 
 /* Per eth device structure */
 struct txa_service_ethdev {
diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
index e6d3492..5d3e37f 100644
--- a/lib/eventdev/rte_event_timer_adapter.c
+++ b/lib/eventdev/rte_event_timer_adapter.c
@@ -4,6 +4,7 @@
  */
 
 #include <ctype.h>
+#include <stdalign.h>
 #include <string.h>
 #include <inttypes.h>
 #include <stdbool.h>
@@ -512,11 +513,11 @@ struct rte_event_timer_adapter *
 
 #define EXP_TIM_BUF_SZ 128
 
-struct event_buffer {
+struct __rte_cache_aligned event_buffer {
 	size_t head;
 	size_t tail;
 	struct rte_event events[EVENT_BUFFER_SZ];
-} __rte_cache_aligned;
+};
 
 static inline bool
 event_buffer_full(struct event_buffer *bufp)
@@ -632,9 +633,9 @@ struct swtim {
 	/* Identifier of timer data instance */
 	uint32_t timer_data_id;
 	/* Track which cores have actually armed a timer */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		RTE_ATOMIC(uint16_t) v;
-	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
+	} in_use[RTE_MAX_LCORE];
 	/* Track which cores' timer lists should be polled */
 	RTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];
 	/* The number of lists that should be polled */
diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h
index c133dec..0bd1b30 100644
--- a/lib/eventdev/rte_event_timer_adapter.h
+++ b/lib/eventdev/rte_event_timer_adapter.h
@@ -473,7 +473,7 @@ enum rte_event_timer_state {
  * The generic *rte_event_timer* structure to hold the event timer attributes
  * for arm and cancel operations.
  */
-struct rte_event_timer {
+struct __rte_cache_aligned rte_event_timer {
 	struct rte_event ev;
 	/**<
 	 * Expiry event attributes.  On successful event timer timeout,
@@ -504,7 +504,7 @@ struct rte_event_timer {
 	/**< Memory to store user specific metadata.
 	 * The event timer adapter implementation should not modify this area.
 	 */
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*rte_event_timer_arm_burst_t)(
 		const struct rte_event_timer_adapter *adapter,
@@ -526,7 +526,7 @@ typedef uint16_t (*rte_event_timer_cancel_burst_t)(
 /**
  * @internal Data structure associated with each event timer adapter.
  */
-struct rte_event_timer_adapter {
+struct __rte_cache_aligned rte_event_timer_adapter {
 	rte_event_timer_arm_burst_t arm_burst;
 	/**< Pointer to driver arm_burst function. */
 	rte_event_timer_arm_tmo_tick_burst_t arm_tmo_tick_burst;
@@ -540,7 +540,7 @@ struct rte_event_timer_adapter {
 
 	uint8_t allocated : 1;
 	/**< Flag to indicate that this adapter has been allocated */
-} __rte_cache_aligned;
+};
 
 #define ADAPTER_VALID_OR_ERR_RET(adapter, retval) do {		\
 	if (adapter == NULL || !adapter->allocated)		\
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index 1f99e93..688c6d1 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1110,7 +1110,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1150,19 +1150,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
diff --git a/lib/eventdev/rte_eventdev_core.h b/lib/eventdev/rte_eventdev_core.h
index 5b40551..fc8e155 100644
--- a/lib/eventdev/rte_eventdev_core.h
+++ b/lib/eventdev/rte_eventdev_core.h
@@ -49,7 +49,7 @@ typedef uint16_t (*event_dma_adapter_enqueue_t)(void *port, struct rte_event ev[
 typedef int (*event_profile_switch_t)(void *port, uint8_t profile);
 /**< @internal Switch active link profile on the event port. */
 
-struct rte_event_fp_ops {
+struct __rte_cache_aligned rte_event_fp_ops {
 	void **data;
 	/**< points to array of internal port data pointers */
 	event_enqueue_t enqueue;
@@ -77,7 +77,7 @@ struct rte_event_fp_ops {
 	event_profile_switch_t profile_switch;
 	/**< PMD Event switch profile function. */
 	uintptr_t reserved[4];
-} __rte_cache_aligned;
+};
 
 extern struct rte_event_fp_ops rte_event_fp_ops[RTE_EVENT_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v6 11/39] ethdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ethdev/ethdev_driver.h   |  8 ++++----
 lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
 lib/ethdev/rte_ethdev_core.h |  4 ++--
 lib/ethdev/rte_flow_driver.h |  4 ++--
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 0e4c1f0..bab3a8c 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_eth_dev {
+struct __rte_cache_aligned rte_eth_dev {
 	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
 	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
 
@@ -93,7 +93,7 @@ struct rte_eth_dev {
 
 	enum rte_eth_dev_state state; /**< Flag indicating the port state */
 	void *security_ctx; /**< Context for security ops */
-} __rte_cache_aligned;
+};
 
 struct rte_eth_dev_sriov;
 struct rte_eth_dev_owner;
@@ -104,7 +104,7 @@ struct rte_eth_dev {
  * device. This structure is safe to place in shared memory to be common
  * among different processes in a multi-process configuration.
  */
-struct rte_eth_dev_data {
+struct __rte_cache_aligned rte_eth_dev_data {
 	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
 
 	void **rx_queues; /**< Array of pointers to Rx queues */
@@ -190,7 +190,7 @@ struct rte_eth_dev_data {
 	uint16_t backer_port_id;
 
 	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index ed27360..2a92953 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
@@ -1836,7 +1836,7 @@ struct rte_eth_dev_info {
  * Ethernet device Rx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_rxq_info {
+struct __rte_cache_min_aligned rte_eth_rxq_info {
 	struct rte_mempool *mp;     /**< mempool used by that queue. */
 	struct rte_eth_rxconf conf; /**< queue config parameters. */
 	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
@@ -1850,17 +1850,17 @@ struct rte_eth_rxq_info {
 	 * Value 0 means that the threshold monitoring is disabled.
 	 */
 	uint8_t avail_thresh;
-} __rte_cache_min_aligned;
+};
 
 /**
  * Ethernet device Tx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_txq_info {
+struct __rte_cache_min_aligned rte_eth_txq_info {
 	struct rte_eth_txconf conf; /**< queue config parameters. */
 	uint16_t nb_desc;           /**< configured number of TXDs. */
 	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
-} __rte_cache_min_aligned;
+};
 
 /**
  * @warning
@@ -1870,7 +1870,7 @@ struct rte_eth_txq_info {
  * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
  * them into Rx mbuf ring.
  */
-struct rte_eth_recycle_rxq_info {
+struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
 	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
 	struct rte_mempool *mp;     /**< mempool of Rx queue. */
 	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
@@ -1884,7 +1884,7 @@ struct rte_eth_recycle_rxq_info {
 	 * Value 0 means that PMD drivers have no requirement for this.
 	 */
 	uint16_t refill_requirement;
-} __rte_cache_min_aligned;
+};
 
 /* Generic Burst mode flag definition, values can be ORed. */
 
diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
index a18f242..e55fb42 100644
--- a/lib/ethdev/rte_ethdev_core.h
+++ b/lib/ethdev/rte_ethdev_core.h
@@ -84,7 +84,7 @@ struct rte_ethdev_qdata {
  * On 64-bit systems contents of this structure occupy exactly two 64B lines.
  * On 32-bit systems contents of this structure fits into one 64B line.
  */
-struct rte_eth_fp_ops {
+struct __rte_cache_aligned rte_eth_fp_ops {
 
 	/**@{*/
 	/**
@@ -124,7 +124,7 @@ struct rte_eth_fp_ops {
 	uintptr_t reserved2[1];
 	/**@}*/
 
-} __rte_cache_aligned;
+};
 
 extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
 
diff --git a/lib/ethdev/rte_flow_driver.h b/lib/ethdev/rte_flow_driver.h
index 3c702e3..506d126 100644
--- a/lib/ethdev/rte_flow_driver.h
+++ b/lib/ethdev/rte_flow_driver.h
@@ -432,7 +432,7 @@ typedef int (*rte_flow_async_action_list_handle_query_update_t)(
  *
  * Fast path async flow functions are held in a flat array, one entry per ethdev.
  */
-struct rte_flow_fp_ops {
+struct __rte_cache_aligned rte_flow_fp_ops {
 	rte_flow_async_create_t async_create;
 	rte_flow_async_create_by_index_t async_create_by_index;
 	rte_flow_async_actions_update_t async_actions_update;
@@ -447,7 +447,7 @@ struct rte_flow_fp_ops {
 	rte_flow_async_action_list_handle_create_t async_action_list_handle_create;
 	rte_flow_async_action_list_handle_destroy_t async_action_list_handle_destroy;
 	rte_flow_async_action_list_handle_query_update_t async_action_list_handle_query_update;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v6 12/39] dmadev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 lib/dmadev/rte_dmadev_pmd.h  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index e8239c2..29f5251 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_cache_aligned rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_cache_aligned;
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
diff --git a/lib/dmadev/rte_dmadev_pmd.h b/lib/dmadev/rte_dmadev_pmd.h
index 7f354f6..5872908 100644
--- a/lib/dmadev/rte_dmadev_pmd.h
+++ b/lib/dmadev/rte_dmadev_pmd.h
@@ -94,7 +94,7 @@ struct rte_dma_dev_ops {
  *
  * @see struct rte_dma_dev::data
  */
-struct rte_dma_dev_data {
+struct __rte_cache_aligned rte_dma_dev_data {
 	char dev_name[RTE_DEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	int16_t dev_id; /**< Device [external] identifier. */
 	int16_t numa_node; /**< Local NUMA memory ID. -1 if unknown. */
@@ -103,7 +103,7 @@ struct rte_dma_dev_data {
 	__extension__
 	uint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */
 	uint64_t reserved[2]; /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /**
  * Possible states of a DMA device.
@@ -122,7 +122,7 @@ enum rte_dma_dev_state {
  * @internal
  * The generic data structure associated with each DMA device.
  */
-struct rte_dma_dev {
+struct __rte_cache_aligned rte_dma_dev {
 	/** Device info which supplied during device initialization. */
 	struct rte_device *device;
 	struct rte_dma_dev_data *data; /**< Pointer to shared device data. */
@@ -132,7 +132,7 @@ struct rte_dma_dev {
 	const struct rte_dma_dev_ops *dev_ops;
 	enum rte_dma_dev_state state; /**< Flag indicating the device state. */
 	uint64_t reserved[2]; /**< Reserved for future fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v6 13/39] distributor: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/distributor/distributor_private.h | 34 ++++++++++++++++++----------------
 lib/distributor/rte_distributor.c     |  5 +++--
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/lib/distributor/distributor_private.h b/lib/distributor/distributor_private.h
index dfeb9b5..07c2c05 100644
--- a/lib/distributor/distributor_private.h
+++ b/lib/distributor/distributor_private.h
@@ -5,6 +5,8 @@
 #ifndef _DIST_PRIV_H_
 #define _DIST_PRIV_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE distributor
@@ -51,10 +53,10 @@
  * the next cache line to worker 0, we pad this out to three cache lines.
  * Only 64-bits of the memory is actually used though.
  */
-union rte_distributor_buffer_single {
+union __rte_cache_aligned rte_distributor_buffer_single {
 	volatile RTE_ATOMIC(int64_t) bufptr64;
 	char pad[RTE_CACHE_LINE_SIZE*3];
-} __rte_cache_aligned;
+};
 
 /*
  * Transfer up to 8 mbufs at a time to/from workers, and
@@ -62,12 +64,12 @@
  */
 #define RTE_DIST_BURST_SIZE 8
 
-struct rte_distributor_backlog {
+struct __rte_cache_aligned rte_distributor_backlog {
 	unsigned int start;
 	unsigned int count;
-	int64_t pkts[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pkts[RTE_DIST_BURST_SIZE];
 	uint16_t *tags; /* will point to second cacheline of inflights */
-} __rte_cache_aligned;
+};
 
 
 struct rte_distributor_returned_pkts {
@@ -113,17 +115,17 @@ enum rte_distributor_match_function {
  * There is a separate cacheline for returns in the burst API.
  */
 struct rte_distributor_buffer {
-	volatile RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= outgoing to worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE];
+		/* <= outgoing to worker */
 
-	int64_t pad1 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad1;    /* <= one cache line  */
 
-	volatile RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= incoming from worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE];
+		/* <= incoming from worker */
 
-	int64_t pad2 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad2;    /* <= one cache line  */
 
-	int count __rte_cache_aligned;       /* <= number of current mbufs */
+	alignas(RTE_CACHE_LINE_SIZE) int count;       /* <= number of current mbufs */
 };
 
 struct rte_distributor {
@@ -138,11 +140,11 @@ struct rte_distributor {
 	 * on the worker core. Second cache line are the backlog
 	 * that are going to go to the worker core.
 	 */
-	uint16_t in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t
+		in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2];
 
-	struct rte_distributor_backlog backlog[RTE_DISTRIB_MAX_WORKERS]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_distributor_backlog
+		backlog[RTE_DISTRIB_MAX_WORKERS];
 
 	struct rte_distributor_buffer bufs[RTE_DISTRIB_MAX_WORKERS];
 
diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index e842dc9..e58727c 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -447,7 +448,7 @@
 	struct rte_mbuf *next_mb = NULL;
 	int64_t next_value = 0;
 	uint16_t new_tag = 0;
-	uint16_t flows[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t flows[RTE_DIST_BURST_SIZE];
 	unsigned int i, j, w, wid, matching_required;
 
 	if (d->alg_type == RTE_DIST_ALG_SINGLE) {
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v6 14/39] acl: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/acl/acl_run.h         | 4 ++--
 lib/acl/acl_run_altivec.h | 6 ++++--
 lib/acl/acl_run_neon.h    | 6 ++++--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 3c30466..2d398ff 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -3,15 +3,17 @@
  * Copyright (C) IBM Corporation 2016.
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _altivec_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t xmm_ones_16;
 	rte_xmm_t range_base;
-} altivec_acl_const __rte_cache_aligned = {
+} altivec_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
index 69d1b6d..63074f8 100644
--- a/lib/acl/acl_run_neon.h
+++ b/lib/acl/acl_run_neon.h
@@ -2,14 +2,16 @@
  * Copyright(c) 2015 Cavium, Inc
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _neon_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t range_base;
-} neon_acl_const __rte_cache_aligned = {
+} neon_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
-- 
1.8.3.1

[PATCH v6 15/39] vhost: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
 lib/vhost/vhost.h        | 8 ++++----
 lib/vhost/vhost_crypto.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index f163ff7..af48393 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -272,7 +272,7 @@ struct vhost_async {
 /**
  * Structure contains variables relevant to RX/TX virtqueues.
  */
-struct vhost_virtqueue {
+struct __rte_cache_aligned vhost_virtqueue {
 	union {
 		struct vring_desc	*desc;
 		struct vring_packed_desc   *desc_packed;
@@ -351,7 +351,7 @@ struct vhost_virtqueue {
 	struct virtqueue_stats	stats;
 
 	RTE_ATOMIC(bool) irq_pending;
-} __rte_cache_aligned;
+};
 
 /* Virtio device status as per Virtio specification */
 #define VIRTIO_DEVICE_STATUS_RESET		0x00
@@ -479,7 +479,7 @@ struct inflight_mem_info {
  * Device structure contains all configuration information relating
  * to the device.
  */
-struct virtio_net {
+struct __rte_cache_aligned virtio_net {
 	/* Frontend (QEMU) memory and memory region information */
 	struct rte_vhost_memory	*mem;
 	uint64_t		features;
@@ -538,7 +538,7 @@ struct virtio_net {
 	struct rte_vhost_user_extern_ops extern_ops;
 
 	struct vhost_backend_ops *backend_ops;
-} __rte_cache_aligned;
+};
 
 static inline void
 vq_assert_lock__(struct virtio_net *dev, struct vhost_virtqueue *vq, const char *func)
diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
index 3704fbb..eb4a158 100644
--- a/lib/vhost/vhost_crypto.c
+++ b/lib/vhost/vhost_crypto.c
@@ -190,7 +190,7 @@ static int get_iv_len(enum rte_crypto_cipher_algorithm algo)
  * one DPDK crypto device that deals with all crypto workloads. It is declared
  * here and defined in vhost_crypto.c
  */
-struct vhost_crypto {
+struct __rte_cache_aligned vhost_crypto {
 	/** Used to lookup DPDK Cryptodev Session based on VIRTIO crypto
 	 *  session ID.
 	 */
@@ -213,7 +213,7 @@ struct vhost_crypto {
 	struct virtio_net *dev;
 
 	uint8_t option;
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_writeback_data {
 	uint8_t *src;
-- 
1.8.3.1

[PATCH v6 16/39] timer: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/timer/rte_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c
index 53ed221..bb8b6a6 100644
--- a/lib/timer/rte_timer.c
+++ b/lib/timer/rte_timer.c
@@ -24,7 +24,7 @@
 /**
  * Per-lcore info for timers.
  */
-struct priv_timer {
+struct __rte_cache_aligned priv_timer {
 	struct rte_timer pending_head;  /**< dummy timer instance to head up list */
 	rte_spinlock_t list_lock;       /**< lock to protect list access */
 
@@ -44,7 +44,7 @@ struct priv_timer {
 	/** per-lcore statistics */
 	struct rte_timer_debug_stats stats;
 #endif
-} __rte_cache_aligned;
+};
 
 #define FL_ALLOCATED	(1 << 0)
 struct rte_timer_data {
-- 
1.8.3.1

[PATCH v6 17/39] table: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/table/rte_swx_table_learner.c | 4 ++--
 lib/table/rte_table_acl.c         | 3 ++-
 lib/table/rte_table_array.c       | 7 ++++---
 lib/table/rte_table_hash_cuckoo.c | 4 +++-
 lib/table/rte_table_hash_ext.c    | 3 ++-
 lib/table/rte_table_hash_key16.c  | 4 +++-
 lib/table/rte_table_hash_key32.c  | 4 +++-
 lib/table/rte_table_hash_key8.c   | 4 +++-
 lib/table/rte_table_hash_lru.c    | 3 ++-
 lib/table/rte_table_lpm.c         | 3 ++-
 lib/table/rte_table_lpm_ipv6.c    | 3 ++-
 11 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lib/table/rte_swx_table_learner.c b/lib/table/rte_swx_table_learner.c
index 2b5e6bd..55a3645 100644
--- a/lib/table/rte_swx_table_learner.c
+++ b/lib/table/rte_swx_table_learner.c
@@ -145,13 +145,13 @@ struct table_params {
 	size_t total_size;
 };
 
-struct table {
+struct __rte_cache_aligned table {
 	/* Table parameters. */
 	struct table_params params;
 
 	/* Table buckets. */
 	uint8_t buckets[];
-} __rte_cache_aligned;
+};
 
 /* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
  * significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
diff --git a/lib/table/rte_table_acl.c b/lib/table/rte_table_acl.c
index 83411d2..2764cda 100644
--- a/lib/table/rte_table_acl.c
+++ b/lib/table/rte_table_acl.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_acl {
 	uint8_t *acl_rule_memory; /* Memory to store the rules */
 
 	/* Memory to store the action table and stack of free entries */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 
diff --git a/lib/table/rte_table_array.c b/lib/table/rte_table_array.c
index 80bc2a7..31a17d5 100644
--- a/lib/table/rte_table_array.c
+++ b/lib/table/rte_table_array.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -27,7 +28,7 @@
 
 #endif
 
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
 	struct rte_table_stats stats;
 
 	/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
 	uint32_t entry_pos_mask;
 
 	/* Internal table */
-	uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
 
 static void *
 rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
diff --git a/lib/table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
index 0f4900c..d3b60f3 100644
--- a/lib/table/rte_table_hash_cuckoo.c
+++ b/lib/table/rte_table_hash_cuckoo.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -42,7 +44,7 @@ struct rte_table_hash {
 	struct rte_hash *h_table;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
index 2148d83..61e3c79 100644
--- a/lib/table/rte_table_hash_ext.c
+++ b/lib/table/rte_table_hash_ext.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -99,7 +100,7 @@ struct rte_table_hash {
 	uint32_t *bkt_ext_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
index 7734aef..2af34a5 100644
--- a/lib/table/rte_table_hash_key16.c
+++ b/lib/table/rte_table_hash_key16.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
index fcb4348..06e5cf4 100644
--- a/lib/table/rte_table_hash_key32.c
+++ b/lib/table/rte_table_hash_key32.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
index bbe6562..2ab8e1b 100644
--- a/lib/table/rte_table_hash_key8.c
+++ b/lib/table/rte_table_hash_key8.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -79,7 +81,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
index cb4f329..8604a64 100644
--- a/lib/table/rte_table_hash_lru.c
+++ b/lib/table/rte_table_hash_lru.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -76,7 +77,7 @@ struct rte_table_hash {
 	uint32_t *key_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
index b9cff25..978d7e5 100644
--- a/lib/table/rte_table_lpm.c
+++ b/lib/table/rte_table_lpm.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_lpm {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
diff --git a/lib/table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
index e4e823a..1d54f83 100644
--- a/lib/table/rte_table_lpm_ipv6.c
+++ b/lib/table/rte_table_lpm_ipv6.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
-- 
1.8.3.1

[PATCH v6 18/39] reorder: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/reorder/rte_reorder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
index c080b2c..ae97e1a 100644
--- a/lib/reorder/rte_reorder.c
+++ b/lib/reorder/rte_reorder.c
@@ -37,16 +37,16 @@
 int rte_reorder_seqn_dynfield_offset = -1;
 
 /* A generic circular buffer */
-struct cir_buffer {
+struct __rte_cache_aligned cir_buffer {
 	unsigned int size;   /**< Number of entries that can be stored */
 	unsigned int mask;   /**< [buffer_size - 1]: used for wrap-around */
 	unsigned int head;   /**< insertion point in buffer */
 	unsigned int tail;   /**< extraction point in buffer */
 	struct rte_mbuf **entries;
-} __rte_cache_aligned;
+};
 
 /* The reorder buffer data structure itself */
-struct rte_reorder_buffer {
+struct __rte_cache_aligned rte_reorder_buffer {
 	char name[RTE_REORDER_NAMESIZE];
 	uint32_t min_seqn;  /**< Lowest seq. number that can be in the buffer */
 	unsigned int memsize; /**< memory area size of reorder buffer */
@@ -54,7 +54,7 @@ struct rte_reorder_buffer {
 
 	struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */
 	struct cir_buffer order_buf; /**< buffer used to reorder entries */
-} __rte_cache_aligned;
+};
 
 static void
 rte_reorder_free_mbufs(struct rte_reorder_buffer *b);
-- 
1.8.3.1

[PATCH v6 19/39] regexdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/regexdev/rte_regexdev_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
index 15ba712..32eef6e 100644
--- a/lib/regexdev/rte_regexdev_core.h
+++ b/lib/regexdev/rte_regexdev_core.h
@@ -144,13 +144,13 @@ enum rte_regexdev_state {
  * This structure is safe to place in shared memory to be common among different
  * processes in a multi-process configuration.
  */
-struct rte_regexdev_data {
+struct __rte_cache_aligned rte_regexdev_data {
 	void *dev_private; /**< PMD-specific private data. */
 	char dev_name[RTE_REGEXDEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	uint16_t dev_id; /**< Device [external]  identifier. */
 	struct rte_regexdev_config dev_conf; /**< RegEx configuration. */
 	uint8_t dev_started : 1; /**< Device started to work. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
@@ -162,7 +162,7 @@ struct rte_regexdev_data {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_regexdev {
+struct __rte_cache_aligned rte_regexdev {
 	regexdev_enqueue_t enqueue;
 	regexdev_dequeue_t dequeue;
 	const struct rte_regexdev_ops *dev_ops;
@@ -170,7 +170,7 @@ struct rte_regexdev {
 	struct rte_device *device; /**< Backing device */
 	enum rte_regexdev_state state; /**< The device state. */
 	struct rte_regexdev_data *data;  /**< Pointer to device data. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v6 20/39] rcu: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rcu/rte_rcu_qsbr.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
index e7ef788..d8ecf11 100644
--- a/lib/rcu/rte_rcu_qsbr.h
+++ b/lib/rcu/rte_rcu_qsbr.h
@@ -21,6 +21,8 @@
  * entered quiescent state.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -69,7 +71,7 @@
 #define RTE_QSBR_THRID_INVALID 0xffffffff
 
 /* Worker thread counter */
-struct rte_rcu_qsbr_cnt {
+struct __rte_cache_aligned rte_rcu_qsbr_cnt {
 	RTE_ATOMIC(uint64_t) cnt;
 	/**< Quiescent state counter. Value 0 indicates the thread is offline
 	 *   64b counter is used to avoid adding more code to address
@@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt {
 	 */
 	RTE_ATOMIC(uint32_t) lock_cnt;
 	/**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */
-} __rte_cache_aligned;
+};
 
 #define __RTE_QSBR_CNT_THR_OFFLINE 0
 #define __RTE_QSBR_CNT_INIT 1
@@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt {
  * 1) Quiescent state counter array
  * 2) Register thread ID array
  */
-struct rte_rcu_qsbr {
-	RTE_ATOMIC(uint64_t) token __rte_cache_aligned;
+struct __rte_cache_aligned rte_rcu_qsbr {
+	alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token;
 	/**< Counter to allow for multiple concurrent quiescent state queries */
 	RTE_ATOMIC(uint64_t) acked_token;
 	/**< Least token acked by all the threads in the last call to
 	 *   rte_rcu_qsbr_check API.
 	 */
 
-	uint32_t num_elems __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems;
 	/**< Number of elements in the thread ID array */
 	RTE_ATOMIC(uint32_t) num_threads;
 	/**< Number of threads currently using this QS variable */
 	uint32_t max_threads;
 	/**< Maximum number of threads using this QS variable */
 
-	struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0];
 	/**< Quiescent state counter array of 'max_threads' elements */
 
 	/**< Registered thread IDs are stored in a bitmap array,
 	 *   after the quiescent state counter array.
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Call back function called to free the resources.
-- 
1.8.3.1

[PATCH v6 21/39] power: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/power/power_acpi_cpufreq.c       | 4 ++--
 lib/power/power_amd_pstate_cpufreq.c | 4 ++--
 lib/power/power_cppc_cpufreq.c       | 4 ++--
 lib/power/power_intel_uncore.c       | 4 ++--
 lib/power/power_pstate_cpufreq.c     | 4 ++--
 lib/power/rte_power_pmd_mgmt.c       | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
index f8d978d..81996e1 100644
--- a/lib/power/power_acpi_cpufreq.c
+++ b/lib/power/power_acpi_cpufreq.c
@@ -41,7 +41,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct acpi_power_info {
+struct __rte_cache_aligned acpi_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -51,7 +51,7 @@ struct acpi_power_info {
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
-} __rte_cache_aligned;
+};
 
 static struct acpi_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
index 028f844..090a0d9 100644
--- a/lib/power/power_amd_pstate_cpufreq.c
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -45,7 +45,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct amd_pstate_power_info {
+struct __rte_cache_aligned amd_pstate_power_info {
 	uint32_t lcore_id;                   /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -58,7 +58,7 @@ struct amd_pstate_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c
index 3ddf39b..32aaacb 100644
--- a/lib/power/power_cppc_cpufreq.c
+++ b/lib/power/power_cppc_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct cppc_power_info {
+struct __rte_cache_aligned cppc_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -61,7 +61,7 @@ struct cppc_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_intel_uncore.c b/lib/power/power_intel_uncore.c
index 3ce8fcc..9c152e4 100644
--- a/lib/power/power_intel_uncore.c
+++ b/lib/power/power_intel_uncore.c
@@ -29,7 +29,7 @@
 		"/sys/devices/system/cpu/intel_uncore_frequency/package_%02u_die_%02u/initial_min_freq_khz"
 
 
-struct uncore_power_info {
+struct __rte_cache_aligned uncore_power_info {
 	unsigned int die;                  /* Core die id */
 	unsigned int pkg;                  /* Package id */
 	uint32_t freqs[MAX_UNCORE_FREQS];  /* Frequency array */
@@ -41,7 +41,7 @@ struct uncore_power_info {
 	uint32_t org_max_freq;             /* Original max freq of uncore */
 	uint32_t init_max_freq;            /* System max uncore freq */
 	uint32_t init_min_freq;            /* System min uncore freq */
-} __rte_cache_aligned;
+};
 
 static struct uncore_power_info uncore_info[RTE_MAX_NUMA_NODES][MAX_NUMA_DIE];
 
diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
index 73138dc..2343121 100644
--- a/lib/power/power_pstate_cpufreq.c
+++ b/lib/power/power_pstate_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 	POWER_UNKNOWN
 };
 
-struct pstate_power_info {
+struct __rte_cache_aligned pstate_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -64,7 +64,7 @@ struct pstate_power_info {
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint16_t priority_core;              /**< High Performance core */
-} __rte_cache_aligned;
+};
 
 
 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index 591fc69..b1c18a5 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -55,7 +55,7 @@ struct queue_list_entry {
 	const struct rte_eth_rxtx_callback *cb;
 };
 
-struct pmd_core_cfg {
+struct __rte_cache_aligned pmd_core_cfg {
 	TAILQ_HEAD(queue_list_head, queue_list_entry) head;
 	/**< List of queues associated with this lcore */
 	size_t n_queues;
@@ -68,7 +68,7 @@ struct pmd_core_cfg {
 	/**< Number of queues ready to enter power optimized state */
 	uint64_t sleep_target;
 	/**< Prevent a queue from triggering sleep multiple times */
-} __rte_cache_aligned;
+};
 static struct pmd_core_cfg lcore_cfgs[RTE_MAX_LCORE];
 
 static inline bool
-- 
1.8.3.1

[PATCH v6 22/39] rawdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rawdev/rte_rawdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
index 7d5764d..640037b 100644
--- a/lib/rawdev/rte_rawdev.h
+++ b/lib/rawdev/rte_rawdev.h
@@ -279,7 +279,7 @@
  * It is a placeholder for PMD specific data, encapsulating only information
  * related to framework.
  */
-struct rte_rawdev {
+struct __rte_cache_aligned rte_rawdev {
 	/**< Socket ID where memory is allocated */
 	int socket_id;
 	/**< Device ID for this instance */
@@ -300,7 +300,7 @@ struct rte_rawdev {
 	rte_rawdev_obj_t dev_private;
 	/**< Device name */
 	char name[RTE_RAWDEV_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 /** @internal The pool of rte_rawdev structures. */
 extern struct rte_rawdev *rte_rawdevs;
-- 
1.8.3.1

[PATCH v6 23/39] port: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/port/rte_port_frag.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index 883601a..0940f94 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -34,7 +34,7 @@
 			struct rte_mempool *pool_direct,
 			struct rte_mempool *pool_indirect);
 
-struct rte_port_ring_reader_frag {
+struct __rte_cache_aligned rte_port_ring_reader_frag {
 	struct rte_port_in_stats stats;
 
 	/* Input parameters */
@@ -53,7 +53,7 @@ struct rte_port_ring_reader_frag {
 	uint32_t pos_frags;
 
 	frag_op f_frag;
-} __rte_cache_aligned;
+};
 
 static void *
 rte_port_ring_reader_frag_create(void *params, int socket_id, int is_ipv4)
-- 
1.8.3.1

[PATCH v6 24/39] pdcp: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pdcp/rte_pdcp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/pdcp/rte_pdcp.h b/lib/pdcp/rte_pdcp.h
index dd8b6e4..f74524f 100644
--- a/lib/pdcp/rte_pdcp.h
+++ b/lib/pdcp/rte_pdcp.h
@@ -49,7 +49,7 @@ typedef uint16_t (*rte_pdcp_post_p_t)(const struct rte_pdcp_entity *entity,
  * A PDCP entity is associated either to the control plane or the user plane
  * depending on which radio bearer it is carrying data for.
  */
-struct rte_pdcp_entity {
+struct __rte_cache_aligned rte_pdcp_entity {
 	/** Entity specific pre-process handle. */
 	rte_pdcp_pre_p_t pre_process;
 	/** Entity specific post-process handle. */
@@ -66,7 +66,7 @@ struct rte_pdcp_entity {
 	 * hold additionally 'max_pkt_cache' number of packets.
 	 */
 	uint32_t max_pkt_cache;
-} __rte_cache_aligned;
+};
 
 /**
  * Callback function type for t-Reordering timer start, set during PDCP entity establish.
-- 
1.8.3.1

[PATCH v6 25/39] node: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/node/node_private.h | 4 ++--
 lib/node/pkt_cls.c      | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/node/node_private.h b/lib/node/node_private.h
index 2b9bad1..ff04659 100644
--- a/lib/node/node_private.h
+++ b/lib/node/node_private.h
@@ -51,9 +51,9 @@ struct node_mbuf_priv1 {
 /**
  * Node mbuf private area 2.
  */
-struct node_mbuf_priv2 {
+struct __rte_cache_aligned node_mbuf_priv2 {
 	uint64_t priv_data;
-} __rte_cache_aligned;
+};
 
 #define NODE_MBUF_PRIV2_SIZE sizeof(struct node_mbuf_priv2)
 
diff --git a/lib/node/pkt_cls.c b/lib/node/pkt_cls.c
index a8302b8..9d21b7f 100644
--- a/lib/node/pkt_cls.c
+++ b/lib/node/pkt_cls.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2020 Marvell.
  */
 
+#include <stdalign.h>
+
 #include <rte_graph.h>
 #include <rte_graph_worker.h>
 
@@ -9,7 +11,7 @@
 #include "node_private.h"
 
 /* Next node for each ptype, default is '0' is "pkt_drop" */
-static const uint8_t p_nxt[256] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint8_t p_nxt[256] = {
 	[RTE_PTYPE_L3_IPV4] = PKT_CLS_NEXT_IP4_LOOKUP,
 
 	[RTE_PTYPE_L3_IPV4_EXT] = PKT_CLS_NEXT_IP4_LOOKUP,
-- 
1.8.3.1

[PATCH v6 26/39] mldev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mldev/rte_mldev.h      | 4 ++--
 lib/mldev/rte_mldev_core.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/mldev/rte_mldev.h b/lib/mldev/rte_mldev.h
index 27e372f..02913f3 100644
--- a/lib/mldev/rte_mldev.h
+++ b/lib/mldev/rte_mldev.h
@@ -421,7 +421,7 @@ struct rte_ml_buff_seg {
  * This structure contains data related to performing an ML operation on the buffers using
  * the model specified through model_id.
  */
-struct rte_ml_op {
+struct __rte_cache_aligned rte_ml_op {
 	uint16_t model_id;
 	/**< Model ID to be used for the operation. */
 	uint16_t nb_batches;
@@ -469,7 +469,7 @@ struct rte_ml_op {
 	 * dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-} __rte_cache_aligned;
+};
 
 /* Enqueue/Dequeue operations */
 
diff --git a/lib/mldev/rte_mldev_core.h b/lib/mldev/rte_mldev_core.h
index 2279b1d..b3bd281 100644
--- a/lib/mldev/rte_mldev_core.h
+++ b/lib/mldev/rte_mldev_core.h
@@ -626,7 +626,7 @@ struct rte_ml_dev_data {
  *
  * The data structure associated with each ML device.
  */
-struct rte_ml_dev {
+struct __rte_cache_aligned rte_ml_dev {
 	/** Pointer to PMD enqueue function. */
 	mldev_enqueue_t enqueue_burst;
 
@@ -647,7 +647,7 @@ struct rte_ml_dev {
 
 	/** Flag indicating the device is attached. */
 	__extension__ uint8_t attached : 1;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v6 27/39] mempool: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index 6fa4d48..23fd5c8 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -34,6 +34,7 @@
  * user cache created with rte_mempool_cache_create().
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <inttypes.h>
@@ -66,7 +67,7 @@
  * captured since they can be calculated from other stats.
  * For example: put_cache_objs = put_objs - put_common_pool_objs.
  */
-struct rte_mempool_debug_stats {
+struct __rte_cache_aligned rte_mempool_debug_stats {
 	uint64_t put_bulk;             /**< Number of puts. */
 	uint64_t put_objs;             /**< Number of objects successfully put. */
 	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
@@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
 	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
 	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 #endif
 
 /**
  * A structure that stores a per-core object cache.
  */
-struct rte_mempool_cache {
+struct __rte_cache_aligned rte_mempool_cache {
 	uint32_t size;	      /**< Size of the cache */
 	uint32_t flushthresh; /**< Threshold before we flush excess elements */
 	uint32_t len;	      /**< Current cache count */
@@ -109,8 +110,8 @@ struct rte_mempool_cache {
 	 * Cache is allocated to this size to allow it to overflow in certain
 	 * cases to avoid needless emptying of cache.
 	 */
-	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
+};
 
 /**
  * A structure that stores the size of mempool elements.
@@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
  * The structure is cache-line aligned to avoid ABI breakages in
  * a number of cases when something small is added.
  */
-struct rte_mempool_info {
+struct __rte_cache_aligned rte_mempool_info {
 	/** Number of objects in the contiguous block */
 	unsigned int contig_block_size;
-} __rte_cache_aligned;
+};
 
 /**
  * The RTE mempool structure.
  */
-struct rte_mempool {
+struct __rte_cache_aligned rte_mempool {
 	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
 	union {
 		void *pool_data;         /**< Ring or pool to store objects. */
@@ -268,7 +269,7 @@ struct rte_mempool {
 	 */
 	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
 #endif
-}  __rte_cache_aligned;
+};
 
 /** Spreading among memory channels not required. */
 #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
@@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
 
 
 /** Structure defining mempool operations structure */
-struct rte_mempool_ops {
+struct __rte_cache_aligned rte_mempool_ops {
 	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
 	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
 	rte_mempool_free_t free;         /**< Free the external pool. */
@@ -713,7 +714,7 @@ struct rte_mempool_ops {
 	 * Dequeue a number of contiguous object blocks.
 	 */
 	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
-} __rte_cache_aligned;
+};
 
 #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
 
@@ -726,14 +727,14 @@ struct rte_mempool_ops {
  * any function pointers stored directly in the mempool struct would not be.
  * This results in us simply having "ops_index" in the mempool struct.
  */
-struct rte_mempool_ops_table {
+struct __rte_cache_aligned rte_mempool_ops_table {
 	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
 	uint32_t num_ops;      /**< Number of used ops structs in the table. */
 	/**
 	 * Storage for all possible ops structs.
 	 */
 	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
-} __rte_cache_aligned;
+};
 
 /** Array of registered ops structs. */
 extern struct rte_mempool_ops_table rte_mempool_ops_table;
-- 
1.8.3.1

[PATCH v6 28/39] member: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/member/rte_member.h        | 8 ++++----
 lib/member/rte_member_ht.h     | 4 ++--
 lib/member/rte_member_sketch.c | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/member/rte_member.h b/lib/member/rte_member.h
index 3278bbb..aec192e 100644
--- a/lib/member/rte_member.h
+++ b/lib/member/rte_member.h
@@ -139,7 +139,7 @@ typedef void (*sketch_delete_fn_t)(const struct rte_member_setsum *ss,
 				   const void *key);
 
 /** @internal setsummary structure. */
-struct rte_member_setsum {
+struct __rte_cache_aligned rte_member_setsum {
 	enum rte_member_setsum_type type; /* Type of the set summary. */
 	uint32_t key_len;		/* Length of key. */
 	uint32_t prim_hash_seed;	/* Primary hash function seed. */
@@ -185,14 +185,14 @@ struct rte_member_setsum {
 #ifdef RTE_ARCH_X86
 	bool use_avx512;
 #endif
-} __rte_cache_aligned;
+};
 
 /**
  * Parameters used when create the set summary table. Currently user can
  * specify two types of setsummary: HT based and vBF. For HT based, user can
  * specify cache or non-cache mode. Here is a table to describe some differences
  */
-struct rte_member_parameters {
+struct __rte_cache_aligned rte_member_parameters {
 	const char *name;			/**< Name of the hash. */
 
 	/**
@@ -326,7 +326,7 @@ struct rte_member_parameters {
 	uint32_t extra_flag;
 
 	int socket_id;			/**< NUMA Socket ID for memory. */
-} __rte_cache_aligned;
+};
 
 /**
  * Find an existing set-summary and return a pointer to it.
diff --git a/lib/member/rte_member_ht.h b/lib/member/rte_member_ht.h
index 9e24ccd..c9673e3 100644
--- a/lib/member/rte_member_ht.h
+++ b/lib/member/rte_member_ht.h
@@ -15,10 +15,10 @@
 typedef uint16_t member_sig_t;			/* signature size is 16 bit */
 
 /* The bucket struct for ht setsum */
-struct member_ht_bucket {
+struct __rte_cache_aligned member_ht_bucket {
 	member_sig_t sigs[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte signature */
 	member_set_t sets[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte set */
-} __rte_cache_aligned;
+};
 
 int
 rte_member_create_ht(struct rte_member_setsum *ss,
diff --git a/lib/member/rte_member_sketch.c b/lib/member/rte_member_sketch.c
index e006e83..15af678 100644
--- a/lib/member/rte_member_sketch.c
+++ b/lib/member/rte_member_sketch.c
@@ -23,7 +23,7 @@
 #include "rte_member_sketch_avx512.h"
 #endif /* CC_AVX512_SUPPORT */
 
-struct sketch_runtime {
+struct __rte_cache_aligned sketch_runtime {
 	uint64_t pkt_cnt;
 	uint32_t until_next;
 	int converged;
@@ -31,7 +31,7 @@ struct sketch_runtime {
 	struct node *report_array;
 	void *key_slots;
 	struct rte_ring *free_key_slots;
-} __rte_cache_aligned;
+};
 
 /*
  * Geometric sampling to calculate how many packets needs to be
-- 
1.8.3.1

[PATCH v6 29/39] lpm: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/lpm/rte_lpm.h  | 5 +++--
 lib/lpm/rte_lpm6.c | 8 ++++----
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index f57977b..f311fd9 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -11,6 +11,7 @@
  * RTE Longest Prefix Match (LPM)
  */
 
+#include <stdalign.h>
 #include <errno.h>
 #include <stdint.h>
 
@@ -118,8 +119,8 @@ struct rte_lpm_config {
 /** @internal LPM structure. */
 struct rte_lpm {
 	/* LPM Tables. */
-	struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 	struct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */
 };
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 271bc48..ed5970c 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -98,16 +98,16 @@ struct rte_lpm6 {
 
 	/* LPM Tables. */
 	struct rte_hash *rules_tbl; /**< LPM rules. */
-	struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 
 	uint32_t *tbl8_pool; /**< pool of indexes of free tbl8s */
 	uint32_t tbl8_pool_pos; /**< current position in the tbl8 pool */
 
 	struct rte_lpm_tbl8_hdr *tbl8_hdrs; /* array of tbl8 headers */
 
-	struct rte_lpm6_tbl_entry tbl8[0]
-			__rte_cache_aligned; /**< LPM tbl8 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl8[0];
+			/**< LPM tbl8 table. */
 };
 
 /*
-- 
1.8.3.1

[PATCH v6 30/39] ipsec: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ipsec/rte_ipsec.h | 4 ++--
 lib/ipsec/sa.h        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index 44cecab..f15f6f2 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
  * - pointer to security/crypto session, plus other related data
  * - session/device specific functions to prepare/process IPsec packets.
  */
-struct rte_ipsec_session {
+struct __rte_cache_aligned rte_ipsec_session {
 	/**
 	 * SA that session belongs to.
 	 * Note that multiple sessions can belong to the same SA.
@@ -77,7 +77,7 @@ struct rte_ipsec_session {
 	};
 	/** functions to prepare/process IPsec packets */
 	struct rte_ipsec_sa_pkt_func pkt_func;
-} __rte_cache_aligned;
+};
 
 /**
  * Checks that inside given rte_ipsec_session crypto/security fields
diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
index 4b30bea..2560d33 100644
--- a/lib/ipsec/sa.h
+++ b/lib/ipsec/sa.h
@@ -75,7 +75,7 @@ enum sa_algo_type	{
 	ALGO_TYPE_MAX
 };
 
-struct rte_ipsec_sa {
+struct __rte_cache_aligned rte_ipsec_sa {
 
 	uint64_t type;     /* type of given SA */
 	uint64_t udata;    /* user defined */
@@ -141,7 +141,7 @@ struct rte_ipsec_sa {
 		} errors;
 	} statistics;
 
-} __rte_cache_aligned;
+};
 
 int
 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
-- 
1.8.3.1

[PATCH v6 31/39] jobstats: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/jobstats/rte_jobstats.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/jobstats/rte_jobstats.h b/lib/jobstats/rte_jobstats.h
index 45b460e..bdd85fe 100644
--- a/lib/jobstats/rte_jobstats.h
+++ b/lib/jobstats/rte_jobstats.h
@@ -32,7 +32,7 @@
 typedef void (*rte_job_update_period_cb_t)(struct rte_jobstats *job,
 		int64_t job_result);
 
-struct rte_jobstats {
+struct __rte_cache_aligned rte_jobstats {
 	uint64_t period;
 	/**< Estimated period of execution. */
 
@@ -65,9 +65,9 @@ struct rte_jobstats {
 
 	struct rte_jobstats_context *context;
 	/**< Job stats context object that is executing this job. */
-} __rte_cache_aligned;
+};
 
-struct rte_jobstats_context {
+struct __rte_cache_aligned rte_jobstats_context {
 	/** Variable holding time at different points:
 	 * -# loop start time if loop was started but no job executed yet.
 	 * -# job start time if job is currently executing.
@@ -111,7 +111,7 @@ struct rte_jobstats_context {
 
 	uint64_t loop_cnt;
 	/**< Total count of executed loops with at least one executed job. */
-} __rte_cache_aligned;
+};
 
 /**
  * Initialize given context object with default values.
-- 
1.8.3.1

[PATCH v6 32/39] bpf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/bpf/bpf_pkt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
index 793a75d..aaca935 100644
--- a/lib/bpf/bpf_pkt.c
+++ b/lib/bpf/bpf_pkt.c
@@ -23,7 +23,7 @@
  * information about installed BPF rx/tx callback
  */
 
-struct bpf_eth_cbi {
+struct __rte_cache_aligned bpf_eth_cbi {
 	/* used by both data & control path */
 	RTE_ATOMIC(uint32_t) use;    /*usage counter */
 	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
@@ -33,7 +33,7 @@ struct bpf_eth_cbi {
 	LIST_ENTRY(bpf_eth_cbi) link;
 	uint16_t port;
 	uint16_t queue;
-} __rte_cache_aligned;
+};
 
 /*
  * Odd number means that callback is used by datapath.
-- 
1.8.3.1

[PATCH v6 33/39] compressdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/compressdev/rte_comp.h                 | 4 ++--
 lib/compressdev/rte_compressdev_internal.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
index 3606ebf..830a240 100644
--- a/lib/compressdev/rte_comp.h
+++ b/lib/compressdev/rte_comp.h
@@ -356,7 +356,7 @@ struct rte_comp_xform {
  * Comp operations are enqueued and dequeued in comp PMDs using the
  * rte_compressdev_enqueue_burst() / rte_compressdev_dequeue_burst() APIs
  */
-struct rte_comp_op {
+struct __rte_cache_aligned rte_comp_op {
 	enum rte_comp_op_type op_type;
 	union {
 		void *private_xform;
@@ -478,7 +478,7 @@ struct rte_comp_op {
 	 * will be set to RTE_COMP_OP_STATUS_SUCCESS after operation
 	 * is successfully processed by a PMD
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Creates an operation pool
diff --git a/lib/compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
index 01b7764..8a626d3 100644
--- a/lib/compressdev/rte_compressdev_internal.h
+++ b/lib/compressdev/rte_compressdev_internal.h
@@ -69,7 +69,7 @@ typedef uint16_t (*compressdev_enqueue_pkt_burst_t)(void *qp,
 		struct rte_comp_op **ops, uint16_t nb_ops);
 
 /** The data structure associated with each comp device. */
-struct rte_compressdev {
+struct __rte_cache_aligned rte_compressdev {
 	compressdev_dequeue_pkt_burst_t dequeue_burst;
 	/**< Pointer to PMD receive function */
 	compressdev_enqueue_pkt_burst_t enqueue_burst;
@@ -87,7 +87,7 @@ struct rte_compressdev {
 	__extension__
 	uint8_t attached : 1;
 	/**< Flag indicating the device is attached */
-} __rte_cache_aligned;
+};
 
 /**
  *
@@ -96,7 +96,7 @@ struct rte_compressdev {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_compressdev_data {
+struct __rte_cache_aligned rte_compressdev_data {
 	uint8_t dev_id;
 	/**< Compress device identifier */
 	int socket_id;
@@ -115,7 +115,7 @@ struct rte_compressdev_data {
 
 	void *dev_private;
 	/**< PMD-specific private data */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
-- 
1.8.3.1

[PATCH v6 34/39] cryptodev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/cryptodev/cryptodev_pmd.h      | 8 ++++----
 lib/cryptodev/rte_cryptodev_core.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 0732b35..6229ad4 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -61,7 +61,7 @@ struct rte_cryptodev_pmd_init_params {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_cryptodev_data {
+struct __rte_cache_aligned rte_cryptodev_data {
 	/** Device ID for this instance */
 	uint8_t dev_id;
 	/** Socket ID where memory is allocated */
@@ -82,10 +82,10 @@ struct rte_cryptodev_data {
 
 	/** PMD-specific private data */
 	void *dev_private;
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
+struct __rte_cache_aligned rte_cryptodev {
 	/** Pointer to PMD dequeue function. */
 	dequeue_pkt_burst_t dequeue_burst;
 	/** Pointer to PMD enqueue function. */
@@ -117,7 +117,7 @@ struct rte_cryptodev {
 	struct rte_cryptodev_cb_rcu *enq_cbs;
 	/** User application callback for post dequeue processing */
 	struct rte_cryptodev_cb_rcu *deq_cbs;
-} __rte_cache_aligned;
+};
 
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index 5de89d0..8d7e58d 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -40,7 +40,7 @@ struct rte_cryptodev_qpdata {
 	struct rte_cryptodev_cb_rcu *deq_cb;
 };
 
-struct rte_crypto_fp_ops {
+struct __rte_cache_aligned rte_crypto_fp_ops {
 	/** PMD enqueue burst function. */
 	enqueue_pkt_burst_t enqueue_burst;
 	/** PMD dequeue burst function. */
@@ -49,7 +49,7 @@ struct rte_crypto_fp_ops {
 	struct rte_cryptodev_qpdata qp;
 	/** Reserved for future ops. */
 	uintptr_t reserved[3];
-} __rte_cache_aligned;
+};
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v6 35/39] dispatcher: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/dispatcher/rte_dispatcher.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index f546d75..7934917 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -41,7 +41,7 @@ struct rte_dispatcher_finalizer {
 	void *finalize_data;
 };
 
-struct rte_dispatcher_lcore {
+struct __rte_cache_aligned rte_dispatcher_lcore {
 	uint8_t num_ports;
 	uint16_t num_handlers;
 	int32_t prio_count;
@@ -49,7 +49,7 @@ struct rte_dispatcher_lcore {
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 struct rte_dispatcher {
 	uint8_t event_dev_id;
-- 
1.8.3.1

[PATCH v6 36/39] fib: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@ struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@ struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t
-- 
1.8.3.1

[PATCH v6 37/39] gpudev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/gpudev/gpudev_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h
index 0b1e7f2..37b6ae3 100644
--- a/lib/gpudev/gpudev_driver.h
+++ b/lib/gpudev/gpudev_driver.h
@@ -72,7 +72,7 @@ struct rte_gpu_mpshared {
 	RTE_ATOMIC(uint16_t) process_refcnt; /* Updated by this library. */
 };
 
-struct rte_gpu {
+struct __rte_cache_aligned rte_gpu {
 	/* Backing device. */
 	struct rte_device *device;
 	/* Data shared between processes. */
@@ -85,7 +85,7 @@ struct rte_gpu {
 	enum rte_gpu_state process_state; /* Updated by this library. */
 	/* Driver-specific private data for the running process. */
 	void *process_private;
-} __rte_cache_aligned;
+};
 
 __rte_internal
 struct rte_gpu *rte_gpu_get_by_name(const char *name);
-- 
1.8.3.1

[PATCH v6 38/39] graph: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/graph/graph_private.h           |  4 ++--
 lib/graph/graph_stats.c             |  4 ++--
 lib/graph/rte_graph.h               |  4 ++--
 lib/graph/rte_graph_worker_common.h | 17 ++++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/graph/graph_private.h b/lib/graph/graph_private.h
index fb88d4b..7e4d9f8 100644
--- a/lib/graph/graph_private.h
+++ b/lib/graph/graph_private.h
@@ -71,11 +71,11 @@ struct node {
  * Structure that holds the graph scheduling workqueue node stream.
  * Used for mcore dispatch model.
  */
-struct graph_mcore_dispatch_wq_node {
+struct __rte_cache_aligned graph_mcore_dispatch_wq_node {
 	rte_graph_off_t node_off;
 	uint16_t nb_objs;
 	void *objs[RTE_GRAPH_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/graph/graph_stats.c b/lib/graph/graph_stats.c
index cc32245..2fb808b 100644
--- a/lib/graph/graph_stats.c
+++ b/lib/graph/graph_stats.c
@@ -28,7 +28,7 @@ struct cluster_node {
 	struct rte_node *nodes[];
 };
 
-struct rte_graph_cluster_stats {
+struct __rte_cache_aligned rte_graph_cluster_stats {
 	/* Header */
 	rte_graph_cluster_stats_cb_t fn;
 	uint32_t cluster_node_size; /* Size of struct cluster_node */
@@ -38,7 +38,7 @@ struct rte_graph_cluster_stats {
 	size_t sz;
 
 	struct cluster_node clusters[];
-} __rte_cache_aligned;
+};
 
 #define boarder_model_dispatch()                                                              \
 	fprintf(f, "+-------------------------------+---------------+--------" \
diff --git a/lib/graph/rte_graph.h b/lib/graph/rte_graph.h
index 2d37d5e..ecfec20 100644
--- a/lib/graph/rte_graph.h
+++ b/lib/graph/rte_graph.h
@@ -200,7 +200,7 @@ struct rte_graph_cluster_stats_param {
  *
  * @see struct rte_graph_cluster_stats_param::fn
  */
-struct rte_graph_cluster_node_stats {
+struct __rte_cache_aligned rte_graph_cluster_node_stats {
 	uint64_t ts;	    /**< Current timestamp. */
 	uint64_t calls;	    /**< Current number of calls made. */
 	uint64_t objs;      /**< Current number of objs processed. */
@@ -225,7 +225,7 @@ struct rte_graph_cluster_node_stats {
 	rte_node_t id;	/**< Node identifier of stats. */
 	uint64_t hz;	/**< Cycles per seconds. */
 	char name[RTE_NODE_NAMESIZE];	/**< Name of the node. */
-} __rte_cache_aligned;
+};
 
 /**
  * Create Graph.
diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_worker_common.h
index 4045a7a..36d864e 100644
--- a/lib/graph/rte_graph_worker_common.h
+++ b/lib/graph/rte_graph_worker_common.h
@@ -12,6 +12,8 @@
  * process, enqueue and move streams of objects to the next nodes.
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_cycles.h>
 #include <rte_prefetch.h>
@@ -43,7 +45,7 @@
  *
  * Data structure to hold graph data.
  */
-struct rte_graph {
+struct __rte_cache_aligned rte_graph {
 	/* Fast path area. */
 	uint32_t tail;		     /**< Tail of circular buffer. */
 	uint32_t head;		     /**< Head of circular buffer. */
@@ -57,7 +59,8 @@ struct rte_graph {
 	union {
 		/* Fast schedule area for mcore dispatch model */
 		struct {
-			struct rte_graph_rq_head *rq __rte_cache_aligned; /* The run-queue */
+			alignas(RTE_CACHE_LINE_SIZE) struct rte_graph_rq_head *rq;
+				/* The run-queue */
 			struct rte_graph_rq_head rq_head; /* The head for run-queue list */
 
 			unsigned int lcore_id;  /**< The graph running Lcore. */
@@ -77,14 +80,14 @@ struct rte_graph {
 	uint64_t nb_pkt_to_capture;
 	char pcap_filename[RTE_GRAPH_PCAP_FILE_SZ];  /**< Pcap filename. */
 	uint64_t fence;			/**< Fence. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
  *
  * Data structure to hold node data.
  */
-struct rte_node {
+struct __rte_cache_aligned rte_node {
 	/* Slow path area  */
 	uint64_t fence;		/**< Fence. */
 	rte_graph_off_t next;	/**< Index to next node. */
@@ -109,7 +112,7 @@ struct rte_node {
 	};
 	/* Fast path area  */
 #define RTE_NODE_CTX_SZ 16
-	uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Context. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t ctx[RTE_NODE_CTX_SZ]; /**< Node Context. */
 	uint16_t size;		/**< Total number of objects available. */
 	uint16_t idx;		/**< Number of objects used. */
 	rte_graph_off_t off;	/**< Offset of node in the graph reel. */
@@ -124,8 +127,8 @@ struct rte_node {
 			rte_node_process_t process; /**< Process function. */
 			uint64_t process_u64;
 		};
-	struct rte_node *nodes[] __rte_cache_min_aligned; /**< Next nodes. */
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) struct rte_node *nodes[]; /**< Next nodes. */
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v6 39/39] ip_frag: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/ip_frag/ip_reassembly.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
index a9f97ae..5443c73 100644
--- a/lib/ip_frag/ip_reassembly.h
+++ b/lib/ip_frag/ip_reassembly.h
@@ -47,7 +47,7 @@ struct ip_frag_key {
  * Fragmented packet to reassemble.
  * First two entries in the frags[] array are for the last and first fragments.
  */
-struct ip_frag_pkt {
+struct __rte_cache_aligned ip_frag_pkt {
 	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
 	struct ip_frag_key key;                /* fragmentation key */
 	uint64_t start;                        /* creation timestamp */
@@ -55,20 +55,20 @@ struct ip_frag_pkt {
 	uint32_t frag_size;                    /* size of fragments received */
 	uint32_t last_idx;                     /* index of next entry to fill */
 	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
-} __rte_cache_aligned;
+};
 
  /* fragments tailq */
 RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
 
 /* fragmentation table statistics */
-struct ip_frag_tbl_stat {
+struct __rte_cache_aligned ip_frag_tbl_stat {
 	uint64_t find_num;     /* total # of find/insert attempts. */
 	uint64_t add_num;      /* # of add ops. */
 	uint64_t del_num;      /* # of del ops. */
 	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
 	uint64_t fail_total;   /* total # of add failures. */
 	uint64_t fail_nospace; /* # of 'no space' add failures. */
-} __rte_cache_aligned;
+};
 
 /* fragmentation table */
 struct rte_ip_frag_tbl {
-- 
1.8.3.1

RE: [PATCH v6 01/39] eal: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 01/39] eal: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Expand __rte_aligned(a) to __declspec(align(a)) when building
>   with MSVC.
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
>  lib/eal/arm/include/rte_vect.h       |  4 ++--
>  lib/eal/common/malloc_elem.h         |  4 ++--
>  lib/eal/common/malloc_heap.h         |  4 ++--
>  lib/eal/common/rte_keepalive.c       |  3 ++-
>  lib/eal/common/rte_random.c          |  4 ++--
>  lib/eal/common/rte_service.c         |  8 ++++----
>  lib/eal/include/generic/rte_atomic.h |  4 ++--
>  lib/eal/include/rte_common.h         | 23 +++++++++++++++--------
>  lib/eal/loongarch/include/rte_vect.h |  8 ++++----
>  lib/eal/ppc/include/rte_vect.h       |  4 ++--
>  lib/eal/riscv/include/rte_vect.h     |  4 ++--
>  lib/eal/x86/include/rte_vect.h       |  4 ++--
>  lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
>  13 files changed, 47 insertions(+), 37 deletions(-)
> 
> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
> index 8cfe4bd..c97d299 100644
> --- a/lib/eal/arm/include/rte_vect.h
> +++ b/lib/eal/arm/include/rte_vect.h
> @@ -24,14 +24,14 @@
>  #define	XMM_SIZE	(sizeof(xmm_t))
>  #define	XMM_MASK	(XMM_SIZE - 1)
> 
> -typedef union rte_xmm {
> +typedef union __rte_aligned(16) rte_xmm {
>  	xmm_t    x;
>  	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
>  	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
>  	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
>  	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
>  	double   pd[XMM_SIZE / sizeof(double)];
> -} __rte_aligned(16) rte_xmm_t;
> +} rte_xmm_t;
> 
>  #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
>  /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
> diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
> index 952ce73..c7ff671 100644
> --- a/lib/eal/common/malloc_elem.h
> +++ b/lib/eal/common/malloc_elem.h
> @@ -20,7 +20,7 @@ enum elem_state {
>  	ELEM_PAD  /* element is a padding-only header */
>  };
> 
> -struct malloc_elem {
> +struct __rte_cache_aligned malloc_elem {
>  	struct malloc_heap *heap;
>  	struct malloc_elem *volatile prev;
>  	/**< points to prev elem in memseg */
> @@ -48,7 +48,7 @@ struct malloc_elem {
>  	size_t user_size;
>  	uint64_t asan_cookie[2]; /* must be next to header_cookie */
>  #endif
> -} __rte_cache_aligned;
> +};
> 
>  static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
> 
> diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
> index 8f3ab57..0c49588 100644
> --- a/lib/eal/common/malloc_heap.h
> +++ b/lib/eal/common/malloc_heap.h
> @@ -21,7 +21,7 @@
>  /**
>   * Structure to hold malloc heap
>   */
> -struct malloc_heap {
> +struct __rte_cache_aligned malloc_heap {
>  	rte_spinlock_t lock;
>  	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
>  	struct malloc_elem *volatile first;
> @@ -31,7 +31,7 @@ struct malloc_heap {
>  	unsigned int socket_id;
>  	size_t total_size;
>  	char name[RTE_HEAP_NAME_MAX_LEN];
> -} __rte_cache_aligned;
> +};
> 
>  void *
>  malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
> diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
> index f6db973..391c1be 100644
> --- a/lib/eal/common/rte_keepalive.c
> +++ b/lib/eal/common/rte_keepalive.c
> @@ -2,6 +2,7 @@
>   * Copyright(c) 2015-2016 Intel Corporation
>   */
> 
> +#include <stdalign.h>
>  #include <inttypes.h>
> 
>  #include <rte_common.h>
> @@ -19,7 +20,7 @@ struct rte_keepalive {
>  		/*
>  		 * Each element must be cache aligned to prevent false sharing.
>  		 */
> -		enum rte_keepalive_state core_state __rte_cache_aligned;
> +		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
>  	} live_data[RTE_KEEPALIVE_MAXCORES];
> 
>  	/** Last-seen-alive timestamps */
> diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
> index 7709b8f..90e91b3 100644
> --- a/lib/eal/common/rte_random.c
> +++ b/lib/eal/common/rte_random.c
> @@ -13,14 +13,14 @@
>  #include <rte_lcore.h>
>  #include <rte_random.h>
> 
> -struct rte_rand_state {
> +struct __rte_cache_aligned rte_rand_state {
>  	uint64_t z1;
>  	uint64_t z2;
>  	uint64_t z3;
>  	uint64_t z4;
>  	uint64_t z5;
>  	RTE_CACHE_GUARD;
> -} __rte_cache_aligned;
> +};
> 
>  /* One instance each for every lcore id-equipped thread, and one
>   * additional instance to be shared by all others threads (i.e., all
> diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
> index d959c91..5637993 100644
> --- a/lib/eal/common/rte_service.c
> +++ b/lib/eal/common/rte_service.c
> @@ -32,7 +32,7 @@
>  #define RUNSTATE_RUNNING 1
> 
>  /* internal representation of a service */
> -struct rte_service_spec_impl {
> +struct __rte_cache_aligned rte_service_spec_impl {
>  	/* public part of the struct */
>  	struct rte_service_spec spec;
> 
> @@ -53,7 +53,7 @@ struct rte_service_spec_impl {
>  	 * on currently.
>  	 */
>  	RTE_ATOMIC(uint32_t) num_mapped_cores;
> -} __rte_cache_aligned;
> +};
> 
>  struct service_stats {
>  	RTE_ATOMIC(uint64_t) calls;
> @@ -61,7 +61,7 @@ struct service_stats {
>  };
> 
>  /* the internal values of a service core */
> -struct core_state {
> +struct __rte_cache_aligned core_state {
>  	/* map of services IDs are run on this core */
>  	uint64_t service_mask;
>  	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
> @@ -71,7 +71,7 @@ struct core_state {
>  	RTE_ATOMIC(uint64_t) loops;
>  	RTE_ATOMIC(uint64_t) cycles;
>  	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
> -} __rte_cache_aligned;
> +};
> 
>  static uint32_t rte_service_count;
>  static struct rte_service_spec_impl *rte_services;
> diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
> index 0e639da..f859707 100644
> --- a/lib/eal/include/generic/rte_atomic.h
> +++ b/lib/eal/include/generic/rte_atomic.h
> @@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
>  /**
>   * 128-bit integer structure.
>   */
> -typedef struct {
> +typedef struct __rte_aligned(16) {
>  	union {
>  		uint64_t val[2];
>  #ifdef RTE_ARCH_64
> @@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
>  #endif
>  #endif
>  	};
> -} __rte_aligned(16) rte_int128_t;
> +} rte_int128_t;
> 
>  #ifdef __DOXYGEN__
> 
> diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
> index 1cc1222..0908aa0 100644
> --- a/lib/eal/include/rte_common.h
> +++ b/lib/eal/include/rte_common.h
> @@ -12,6 +12,8 @@
>   * for DPDK.
>   */
> 
> +#include <stdalign.h>
> +
>  #ifdef __cplusplus
>  extern "C" {
>  #endif
> @@ -63,10 +65,19 @@
>  #endif
> 
>  /**
> - * Force alignment
> + * Force type alignment
> + *
> + * This macro should be used when alignment of a struct or union type
> + * is required. For toolchain compatibility it should appear between
> + * the {struct,union} keyword and tag. e.g.
> + *
> + *   struct __rte_aligned(8) tag { ... };
> + *
> + * If alignment of an object/variable is required then this macro should
> + * not be used, instead prefer C11 alignas(a).
>   */
>  #ifdef RTE_TOOLCHAIN_MSVC
> -#define __rte_aligned(a)
> +#define __rte_aligned(a) __declspec(align(a))
>  #else
>  #define __rte_aligned(a) __attribute__((__aligned__(a)))
>  #endif
> @@ -538,18 +549,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
>  #define RTE_CACHE_LINE_MIN_SIZE 64
> 
>  /** Force alignment to cache line. */
> -#ifdef RTE_TOOLCHAIN_MSVC
> -#define __rte_cache_aligned
> -#else
>  #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
> -#endif
> 
>  /** Force minimum cache line alignment. */
>  #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
> 
>  #define _RTE_CACHE_GUARD_HELPER2(unique) \
> -	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
> -	__rte_cache_aligned
> +	alignas(RTE_CACHE_LINE_SIZE) \
> +	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
>  #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
>  /**
>   * Empty cache lines, to guard against false sharing-like effects
> diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
> index 1546515..aa334e8 100644
> --- a/lib/eal/loongarch/include/rte_vect.h
> +++ b/lib/eal/loongarch/include/rte_vect.h
> @@ -15,7 +15,7 @@
> 
>  #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
> 
> -typedef union xmm {
> +typedef union __rte_aligned(16) xmm {
>  	int8_t   i8[16];
>  	int16_t  i16[8];
>  	int32_t  i32[4];
> @@ -25,19 +25,19 @@
>  	uint32_t u32[4];
>  	uint64_t u64[2];
>  	double   pd[2];
> -} __rte_aligned(16) xmm_t;
> +} xmm_t;
> 
>  #define XMM_SIZE        (sizeof(xmm_t))
>  #define XMM_MASK        (XMM_SIZE - 1)
> 
> -typedef union rte_xmm {
> +typedef union __rte_aligned(16) rte_xmm {
>  	xmm_t	 x;
>  	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
>  	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
>  	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
>  	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
>  	double   pd[XMM_SIZE / sizeof(double)];
> -} __rte_aligned(16) rte_xmm_t;
> +} rte_xmm_t;
> 
>  static inline xmm_t
>  vect_load_128(void *p)
> diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
> index a5f009b..c8bace2 100644
> --- a/lib/eal/ppc/include/rte_vect.h
> +++ b/lib/eal/ppc/include/rte_vect.h
> @@ -22,14 +22,14 @@
>  #define	XMM_SIZE	(sizeof(xmm_t))
>  #define	XMM_MASK	(XMM_SIZE - 1)
> 
> -typedef union rte_xmm {
> +typedef union __rte_aligned(16) rte_xmm {
>  	xmm_t    x;
>  	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
>  	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
>  	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
>  	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
>  	double   pd[XMM_SIZE / sizeof(double)];
> -} __rte_aligned(16) rte_xmm_t;
> +} rte_xmm_t;
> 
>  #ifdef __cplusplus
>  }
> diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
> index da9092a..6df10fa 100644
> --- a/lib/eal/riscv/include/rte_vect.h
> +++ b/lib/eal/riscv/include/rte_vect.h
> @@ -22,14 +22,14 @@
>  #define XMM_SIZE	(sizeof(xmm_t))
>  #define XMM_MASK	(XMM_SIZE - 1)
> 
> -typedef union rte_xmm {
> +typedef union __rte_aligned(16) rte_xmm {
>  	xmm_t		x;
>  	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
>  	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
>  	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
>  	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
>  	double		pd[XMM_SIZE / sizeof(double)];
> -} __rte_aligned(16) rte_xmm_t;
> +} rte_xmm_t;
> 
>  static inline xmm_t
>  vect_load_128(void *p)
> diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
> index 560f9e4..a1a537e 100644
> --- a/lib/eal/x86/include/rte_vect.h
> +++ b/lib/eal/x86/include/rte_vect.h
> @@ -91,7 +91,7 @@
>  #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
>  #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
> 
> -typedef union __rte_x86_zmm {
> +typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
>  	__m512i	 z;
>  	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
>  	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
> @@ -100,7 +100,7 @@
>  	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
>  	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
>  	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
> -} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
> +} __rte_x86_zmm_t;
> 
>  #endif /* __AVX512F__ */
> 
> diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
> index 532a2e6..6d9b642 100644
> --- a/lib/eal/x86/rte_power_intrinsics.c
> +++ b/lib/eal/x86/rte_power_intrinsics.c
> @@ -2,6 +2,8 @@
>   * Copyright(c) 2020 Intel Corporation
>   */
> 
> +#include <stdalign.h>
> +
>  #include <rte_common.h>
>  #include <rte_lcore.h>
>  #include <rte_rtm.h>
> @@ -12,10 +14,10 @@
>  /*
>   * Per-lcore structure holding current status of C0.2 sleeps.
>   */
> -static struct power_wait_status {
> +static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
>  	rte_spinlock_t lock;
>  	volatile void *monitor_addr; /**< NULL if not currently sleeping */
> -} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
> +} wait_status[RTE_MAX_LCORE];
> 
>  /*
>   * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
> @@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
>  #endif
>  }
> 
> -static struct {
> +static alignas(RTE_CACHE_LINE_SIZE) struct {
>  	void (*mmonitor)(volatile void *addr);
>  	void (*mwait)(const uint64_t timeout);
> -} __rte_cache_aligned power_monitor_ops;
> +} power_monitor_ops;
> 
>  static inline void
>  __umwait_wakeup(volatile void *addr)
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>

> 1.8.3.1

RE: [PATCH v6 02/39] eal: redefine macro to be integer literal for MSVC

[Konstantin Ananyev]

> Subject: [PATCH v6 02/39] eal: redefine macro to be integer literal for MSVC
> 
> MSVC __declspec(align(#)) is limited and accepts only integer literals
> as opposed to constant expressions. define XMM_SIZE to be 16 instead of
> sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
> compatibility.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/eal/x86/include/rte_vect.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
> index a1a537e..5ac3ccf 100644
> --- a/lib/eal/x86/include/rte_vect.h
> +++ b/lib/eal/x86/include/rte_vect.h
> @@ -11,6 +11,7 @@
>   * RTE SSE/AVX related header.
>   */
> 
> +#include <assert.h>
>  #include <stdint.h>
>  #include <rte_config.h>
>  #include <rte_common.h>
> @@ -33,9 +34,11 @@
> 
>  typedef __m128i xmm_t;
> 
> -#define	XMM_SIZE	(sizeof(xmm_t))
> +#define	XMM_SIZE	16
>  #define	XMM_MASK	(XMM_SIZE - 1)
> 
> +static_assert(sizeof(xmm_t) == XMM_SIZE, "");
> +
>  typedef union rte_xmm {
>  	xmm_t    x;
>  	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 05/39] ring: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 05/39] ring: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/ring/rte_ring_core.h    | 16 +++++++++-------
>  lib/ring/rte_ring_peek_zc.h |  4 ++--
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
> index b770873..f958064 100644
> --- a/lib/ring/rte_ring_core.h
> +++ b/lib/ring/rte_ring_core.h
> @@ -19,6 +19,8 @@
>   * instead.
>   */
> 
> +#include <stdalign.h>
> +
>  #ifdef __cplusplus
>  extern "C" {
>  #endif
> @@ -78,7 +80,7 @@ struct rte_ring_headtail {
> 
>  union __rte_ring_rts_poscnt {
>  	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
> -	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
> +	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
>  	struct {
>  		uint32_t cnt; /**< head/tail reference counter */
>  		uint32_t pos; /**< head/tail position */
> @@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
> 
>  union __rte_ring_hts_pos {
>  	/** raw 8B value to read/write *head* and *tail* as one atomic op */
> -	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
> +	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
>  	struct {
>  		RTE_ATOMIC(uint32_t) head; /**< head position */
>  		RTE_ATOMIC(uint32_t) tail; /**< tail position */
> @@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
>   * a problem.
>   */
>  struct rte_ring {
> -	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
>  	/**< Name of the ring. */
>  	int flags;               /**< Flags supplied at creation. */
>  	const struct rte_memzone *memzone;
> @@ -129,20 +131,20 @@ struct rte_ring {
>  	RTE_CACHE_GUARD;
> 
>  	/** Ring producer status. */
> -	union {
> +	union __rte_cache_aligned {
>  		struct rte_ring_headtail prod;
>  		struct rte_ring_hts_headtail hts_prod;
>  		struct rte_ring_rts_headtail rts_prod;
> -	}  __rte_cache_aligned;
> +	};
> 
>  	RTE_CACHE_GUARD;
> 
>  	/** Ring consumer status. */
> -	union {
> +	union __rte_cache_aligned {
>  		struct rte_ring_headtail cons;
>  		struct rte_ring_hts_headtail hts_cons;
>  		struct rte_ring_rts_headtail rts_cons;
> -	}  __rte_cache_aligned;
> +	};
> 
>  	RTE_CACHE_GUARD;
>  };
> diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
> index 8fb279c..0b5e34b 100644
> --- a/lib/ring/rte_ring_peek_zc.h
> +++ b/lib/ring/rte_ring_peek_zc.h
> @@ -79,7 +79,7 @@
>   * This structure contains the pointers and length of the space
>   * reserved on the ring storage.
>   */
> -struct rte_ring_zc_data {
> +struct __rte_cache_aligned rte_ring_zc_data {
>  	/* Pointer to the first space in the ring */
>  	void *ptr1;
>  	/* Pointer to the second space in the ring if there is wrap-around.
> @@ -92,7 +92,7 @@ struct rte_ring_zc_data {
>  	 * will give the number of elements available at ptr2.
>  	 */
>  	unsigned int n1;
> -} __rte_cache_aligned;
> +};
> 
>  static __rte_always_inline void
>  __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 14/39] acl: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 14/39] acl: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/acl/acl_run.h         | 4 ++--
>  lib/acl/acl_run_altivec.h | 6 ++++--
>  lib/acl/acl_run_neon.h    | 6 ++++--
>  3 files changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
> index 7d215de..7f09241 100644
> --- a/lib/acl/acl_run.h
> +++ b/lib/acl/acl_run.h
> @@ -55,12 +55,12 @@ struct acl_flow_data {
>   * Structure to maintain running results for
>   * a single packet (up to 4 tries).
>   */
> -struct completion {
> +struct __rte_aligned(XMM_SIZE) completion {
>  	uint32_t *results;                          /* running results. */
>  	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
>  	uint32_t  count;                            /* num of remaining tries */
>  	/* true for allocated struct */
> -} __rte_aligned(XMM_SIZE);
> +};
> 
>  /*
>   * One parms structure for each slot in the search engine.
> diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
> index 3c30466..2d398ff 100644
> --- a/lib/acl/acl_run_altivec.h
> +++ b/lib/acl/acl_run_altivec.h
> @@ -3,15 +3,17 @@
>   * Copyright (C) IBM Corporation 2016.
>   */
> 
> +#include <stdalign.h>
> +
>  #include "acl_run.h"
>  #include "acl_vect.h"
> 
> -struct _altivec_acl_const {
> +alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
>  	rte_xmm_t xmm_shuffle_input;
>  	rte_xmm_t xmm_index_mask;
>  	rte_xmm_t xmm_ones_16;
>  	rte_xmm_t range_base;
> -} altivec_acl_const __rte_cache_aligned = {
> +} altivec_acl_const = {
>  	{
>  		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
>  	},
> diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
> index 69d1b6d..63074f8 100644
> --- a/lib/acl/acl_run_neon.h
> +++ b/lib/acl/acl_run_neon.h
> @@ -2,14 +2,16 @@
>   * Copyright(c) 2015 Cavium, Inc
>   */
> 
> +#include <stdalign.h>
> +
>  #include "acl_run.h"
>  #include "acl_vect.h"
> 
> -struct _neon_acl_const {
> +alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
>  	rte_xmm_t xmm_shuffle_input;
>  	rte_xmm_t xmm_index_mask;
>  	rte_xmm_t range_base;
> -} neon_acl_const __rte_cache_aligned = {
> +} neon_acl_const = {
>  	{
>  		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
>  	},
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 11/39] ethdev: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 11/39] ethdev: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/ethdev/ethdev_driver.h   |  8 ++++----
>  lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
>  lib/ethdev/rte_ethdev_core.h |  4 ++--
>  lib/ethdev/rte_flow_driver.h |  4 ++--
>  4 files changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
> index 0e4c1f0..bab3a8c 100644
> --- a/lib/ethdev/ethdev_driver.h
> +++ b/lib/ethdev/ethdev_driver.h
> @@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
>   * memory. This split allows the function pointer and driver data to be per-
>   * process, while the actual configuration data for the device is shared.
>   */
> -struct rte_eth_dev {
> +struct __rte_cache_aligned rte_eth_dev {
>  	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
>  	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
> 
> @@ -93,7 +93,7 @@ struct rte_eth_dev {
> 
>  	enum rte_eth_dev_state state; /**< Flag indicating the port state */
>  	void *security_ctx; /**< Context for security ops */
> -} __rte_cache_aligned;
> +};
> 
>  struct rte_eth_dev_sriov;
>  struct rte_eth_dev_owner;
> @@ -104,7 +104,7 @@ struct rte_eth_dev {
>   * device. This structure is safe to place in shared memory to be common
>   * among different processes in a multi-process configuration.
>   */
> -struct rte_eth_dev_data {
> +struct __rte_cache_aligned rte_eth_dev_data {
>  	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
> 
>  	void **rx_queues; /**< Array of pointers to Rx queues */
> @@ -190,7 +190,7 @@ struct rte_eth_dev_data {
>  	uint16_t backer_port_id;
> 
>  	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
> -} __rte_cache_aligned;
> +};
> 
>  /**
>   * @internal
> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
> index ed27360..2a92953 100644
> --- a/lib/ethdev/rte_ethdev.h
> +++ b/lib/ethdev/rte_ethdev.h
> @@ -333,12 +333,12 @@ struct rte_eth_stats {
>   * A structure used to retrieve link-level information of an Ethernet port.
>   */
>  __extension__
> -struct rte_eth_link {
> +struct __rte_aligned(8) rte_eth_link {
>  	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
>  	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
>  	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
>  	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
> -} __rte_aligned(8);      /**< aligned for atomic64 read/write */
> +};      /**< aligned for atomic64 read/write */
> 
>  /**@{@name Link negotiation
>   * Constants used in link management.
> @@ -1836,7 +1836,7 @@ struct rte_eth_dev_info {
>   * Ethernet device Rx queue information structure.
>   * Used to retrieve information about configured queue.
>   */
> -struct rte_eth_rxq_info {
> +struct __rte_cache_min_aligned rte_eth_rxq_info {
>  	struct rte_mempool *mp;     /**< mempool used by that queue. */
>  	struct rte_eth_rxconf conf; /**< queue config parameters. */
>  	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
> @@ -1850,17 +1850,17 @@ struct rte_eth_rxq_info {
>  	 * Value 0 means that the threshold monitoring is disabled.
>  	 */
>  	uint8_t avail_thresh;
> -} __rte_cache_min_aligned;
> +};
> 
>  /**
>   * Ethernet device Tx queue information structure.
>   * Used to retrieve information about configured queue.
>   */
> -struct rte_eth_txq_info {
> +struct __rte_cache_min_aligned rte_eth_txq_info {
>  	struct rte_eth_txconf conf; /**< queue config parameters. */
>  	uint16_t nb_desc;           /**< configured number of TXDs. */
>  	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
> -} __rte_cache_min_aligned;
> +};
> 
>  /**
>   * @warning
> @@ -1870,7 +1870,7 @@ struct rte_eth_txq_info {
>   * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
>   * them into Rx mbuf ring.
>   */
> -struct rte_eth_recycle_rxq_info {
> +struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
>  	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
>  	struct rte_mempool *mp;     /**< mempool of Rx queue. */
>  	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
> @@ -1884,7 +1884,7 @@ struct rte_eth_recycle_rxq_info {
>  	 * Value 0 means that PMD drivers have no requirement for this.
>  	 */
>  	uint16_t refill_requirement;
> -} __rte_cache_min_aligned;
> +};
> 
>  /* Generic Burst mode flag definition, values can be ORed. */
> 
> diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
> index a18f242..e55fb42 100644
> --- a/lib/ethdev/rte_ethdev_core.h
> +++ b/lib/ethdev/rte_ethdev_core.h
> @@ -84,7 +84,7 @@ struct rte_ethdev_qdata {
>   * On 64-bit systems contents of this structure occupy exactly two 64B lines.
>   * On 32-bit systems contents of this structure fits into one 64B line.
>   */
> -struct rte_eth_fp_ops {
> +struct __rte_cache_aligned rte_eth_fp_ops {
> 
>  	/**@{*/
>  	/**
> @@ -124,7 +124,7 @@ struct rte_eth_fp_ops {
>  	uintptr_t reserved2[1];
>  	/**@}*/
> 
> -} __rte_cache_aligned;
> +};
> 
>  extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
> 
> diff --git a/lib/ethdev/rte_flow_driver.h b/lib/ethdev/rte_flow_driver.h
> index 3c702e3..506d126 100644
> --- a/lib/ethdev/rte_flow_driver.h
> +++ b/lib/ethdev/rte_flow_driver.h
> @@ -432,7 +432,7 @@ typedef int (*rte_flow_async_action_list_handle_query_update_t)(
>   *
>   * Fast path async flow functions are held in a flat array, one entry per ethdev.
>   */
> -struct rte_flow_fp_ops {
> +struct __rte_cache_aligned rte_flow_fp_ops {
>  	rte_flow_async_create_t async_create;
>  	rte_flow_async_create_by_index_t async_create_by_index;
>  	rte_flow_async_actions_update_t async_actions_update;
> @@ -447,7 +447,7 @@ struct rte_flow_fp_ops {
>  	rte_flow_async_action_list_handle_create_t async_action_list_handle_create;
>  	rte_flow_async_action_list_handle_destroy_t async_action_list_handle_destroy;
>  	rte_flow_async_action_list_handle_query_update_t async_action_list_handle_query_update;
> -} __rte_cache_aligned;
> +};
> 
>  /**
>   * @internal
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 08/39] mbuf: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 08/39] mbuf: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/mbuf/rte_mbuf_core.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> index 5688683..917a811 100644
> --- a/lib/mbuf/rte_mbuf_core.h
> +++ b/lib/mbuf/rte_mbuf_core.h
> @@ -463,7 +463,7 @@ enum {
>  /**
>   * The generic rte_mbuf, containing a packet mbuf.
>   */
> -struct rte_mbuf {
> +struct __rte_cache_aligned rte_mbuf {
>  	RTE_MARKER cacheline0;
> 
>  	void *buf_addr;           /**< Virtual address of segment buffer. */
> @@ -476,7 +476,7 @@ struct rte_mbuf {
>  	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
>  	 * working on vector drivers easier.
>  	 */
> -	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> +	alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
>  #else
>  	/**
>  	 * Next segment of scattered packet.
> @@ -662,7 +662,7 @@ struct rte_mbuf {
>  	uint16_t timesync;
> 
>  	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
> -} __rte_cache_aligned;
> +};
> 
>  /**
>   * Function typedef of callback to free externally attached buffer.
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 27/39] mempool: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 27/39] mempool: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
>  1 file changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
> index 6fa4d48..23fd5c8 100644
> --- a/lib/mempool/rte_mempool.h
> +++ b/lib/mempool/rte_mempool.h
> @@ -34,6 +34,7 @@
>   * user cache created with rte_mempool_cache_create().
>   */
> 
> +#include <stdalign.h>
>  #include <stdio.h>
>  #include <stdint.h>
>  #include <inttypes.h>
> @@ -66,7 +67,7 @@
>   * captured since they can be calculated from other stats.
>   * For example: put_cache_objs = put_objs - put_common_pool_objs.
>   */
> -struct rte_mempool_debug_stats {
> +struct __rte_cache_aligned rte_mempool_debug_stats {
>  	uint64_t put_bulk;             /**< Number of puts. */
>  	uint64_t put_objs;             /**< Number of objects successfully put. */
>  	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
> @@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
>  	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
>  	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
>  	RTE_CACHE_GUARD;
> -} __rte_cache_aligned;
> +};
>  #endif
> 
>  /**
>   * A structure that stores a per-core object cache.
>   */
> -struct rte_mempool_cache {
> +struct __rte_cache_aligned rte_mempool_cache {
>  	uint32_t size;	      /**< Size of the cache */
>  	uint32_t flushthresh; /**< Threshold before we flush excess elements */
>  	uint32_t len;	      /**< Current cache count */
> @@ -109,8 +110,8 @@ struct rte_mempool_cache {
>  	 * Cache is allocated to this size to allow it to overflow in certain
>  	 * cases to avoid needless emptying of cache.
>  	 */
> -	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
> -} __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
> +};
> 
>  /**
>   * A structure that stores the size of mempool elements.
> @@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
>   * The structure is cache-line aligned to avoid ABI breakages in
>   * a number of cases when something small is added.
>   */
> -struct rte_mempool_info {
> +struct __rte_cache_aligned rte_mempool_info {
>  	/** Number of objects in the contiguous block */
>  	unsigned int contig_block_size;
> -} __rte_cache_aligned;
> +};
> 
>  /**
>   * The RTE mempool structure.
>   */
> -struct rte_mempool {
> +struct __rte_cache_aligned rte_mempool {
>  	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
>  	union {
>  		void *pool_data;         /**< Ring or pool to store objects. */
> @@ -268,7 +269,7 @@ struct rte_mempool {
>  	 */
>  	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
>  #endif
> -}  __rte_cache_aligned;
> +};
> 
>  /** Spreading among memory channels not required. */
>  #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
> @@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
> 
> 
>  /** Structure defining mempool operations structure */
> -struct rte_mempool_ops {
> +struct __rte_cache_aligned rte_mempool_ops {
>  	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
>  	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
>  	rte_mempool_free_t free;         /**< Free the external pool. */
> @@ -713,7 +714,7 @@ struct rte_mempool_ops {
>  	 * Dequeue a number of contiguous object blocks.
>  	 */
>  	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
> -} __rte_cache_aligned;
> +};
> 
>  #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
> 
> @@ -726,14 +727,14 @@ struct rte_mempool_ops {
>   * any function pointers stored directly in the mempool struct would not be.
>   * This results in us simply having "ops_index" in the mempool struct.
>   */
> -struct rte_mempool_ops_table {
> +struct __rte_cache_aligned rte_mempool_ops_table {
>  	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
>  	uint32_t num_ops;      /**< Number of used ops structs in the table. */
>  	/**
>  	 * Storage for all possible ops structs.
>  	 */
>  	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
> -} __rte_cache_aligned;
> +};
> 
>  /** Array of registered ops structs. */
>  extern struct rte_mempool_ops_table rte_mempool_ops_table;
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>

> 1.8.3.1

RE: [PATCH v6 30/39] ipsec: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 30/39] ipsec: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/ipsec/rte_ipsec.h | 4 ++--
>  lib/ipsec/sa.h        | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
> index 44cecab..f15f6f2 100644
> --- a/lib/ipsec/rte_ipsec.h
> +++ b/lib/ipsec/rte_ipsec.h
> @@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
>   * - pointer to security/crypto session, plus other related data
>   * - session/device specific functions to prepare/process IPsec packets.
>   */
> -struct rte_ipsec_session {
> +struct __rte_cache_aligned rte_ipsec_session {
>  	/**
>  	 * SA that session belongs to.
>  	 * Note that multiple sessions can belong to the same SA.
> @@ -77,7 +77,7 @@ struct rte_ipsec_session {
>  	};
>  	/** functions to prepare/process IPsec packets */
>  	struct rte_ipsec_sa_pkt_func pkt_func;
> -} __rte_cache_aligned;
> +};
> 
>  /**
>   * Checks that inside given rte_ipsec_session crypto/security fields
> diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
> index 4b30bea..2560d33 100644
> --- a/lib/ipsec/sa.h
> +++ b/lib/ipsec/sa.h
> @@ -75,7 +75,7 @@ enum sa_algo_type	{
>  	ALGO_TYPE_MAX
>  };
> 
> -struct rte_ipsec_sa {
> +struct __rte_cache_aligned rte_ipsec_sa {
> 
>  	uint64_t type;     /* type of given SA */
>  	uint64_t udata;    /* user defined */
> @@ -141,7 +141,7 @@ struct rte_ipsec_sa {
>  		} errors;
>  	} statistics;
> 
> -} __rte_cache_aligned;
> +};
> 
>  int
>  ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 32/39] bpf: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 32/39] bpf: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/bpf/bpf_pkt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
> index 793a75d..aaca935 100644
> --- a/lib/bpf/bpf_pkt.c
> +++ b/lib/bpf/bpf_pkt.c
> @@ -23,7 +23,7 @@
>   * information about installed BPF rx/tx callback
>   */
> 
> -struct bpf_eth_cbi {
> +struct __rte_cache_aligned bpf_eth_cbi {
>  	/* used by both data & control path */
>  	RTE_ATOMIC(uint32_t) use;    /*usage counter */
>  	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
> @@ -33,7 +33,7 @@ struct bpf_eth_cbi {
>  	LIST_ENTRY(bpf_eth_cbi) link;
>  	uint16_t port;
>  	uint16_t queue;
> -} __rte_cache_aligned;
> +};
> 
>  /*
>   * Odd number means that callback is used by datapath.
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

RE: [PATCH v6 39/39] ip_frag: use C11 alignas

[Konstantin Ananyev]

> Subject: [PATCH v6 39/39] ip_frag: use C11 alignas
> 
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
> 
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
> 
> To allow alignment for both compilers do the following:
> 
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
> 
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> 
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  lib/ip_frag/ip_reassembly.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
> index a9f97ae..5443c73 100644
> --- a/lib/ip_frag/ip_reassembly.h
> +++ b/lib/ip_frag/ip_reassembly.h
> @@ -47,7 +47,7 @@ struct ip_frag_key {
>   * Fragmented packet to reassemble.
>   * First two entries in the frags[] array are for the last and first fragments.
>   */
> -struct ip_frag_pkt {
> +struct __rte_cache_aligned ip_frag_pkt {
>  	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
>  	struct ip_frag_key key;                /* fragmentation key */
>  	uint64_t start;                        /* creation timestamp */
> @@ -55,20 +55,20 @@ struct ip_frag_pkt {
>  	uint32_t frag_size;                    /* size of fragments received */
>  	uint32_t last_idx;                     /* index of next entry to fill */
>  	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
> -} __rte_cache_aligned;
> +};
> 
>   /* fragments tailq */
>  RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
> 
>  /* fragmentation table statistics */
> -struct ip_frag_tbl_stat {
> +struct __rte_cache_aligned ip_frag_tbl_stat {
>  	uint64_t find_num;     /* total # of find/insert attempts. */
>  	uint64_t add_num;      /* # of add ops. */
>  	uint64_t del_num;      /* # of del ops. */
>  	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
>  	uint64_t fail_total;   /* total # of add failures. */
>  	uint64_t fail_nospace; /* # of 'no space' add failures. */
> -} __rte_cache_aligned;
> +};
> 
>  /* fragmentation table */
>  struct rte_ip_frag_tbl {
> --

Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
 

> 1.8.3.1

[PATCH v7 00/39] use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

** NOTE **

Finally, In the interest of not creating more API (internal or not) the
series does not introduce a wrapper for C11 alignas. If we don't introduce
a macro an application can't take a dependency.

v7:
  * no changes, rebase for merge conflict introduced by
    fix Doxygen processing of vector struct in
    commit f5746d3fa2f9f08179878c22a0ec1f598a7f15a1
  * add some Acked-by: to existing patches.

v6:
  * update static_assert to use XMM_SIZE instead of literal integer 16
  * update 2 explicit alignments of ring struct fields to use
  * alignas(sizeof(uint64_t)) instead of alignas(8)

v5:
  * rebase series.
  * reword all commit messages with why the change is necessary.
  * document guidance for the usage of __rte_aligned macro indicating
    that it should be used for type alignment only and advising that for
    variable alignment standard C11 alignas(a) should be preferred.

v4:
  * restore explicit alignment of 8-byte integers in mbuf and
    ring patches, natural alignment may be 4-bytes on 32-bit
    targets.
v3:
  * add missing patches for __rte_cache_aligned and
    __rte_cache_min_aligned
v2:
  * add missing #include <stdalign.h> for alignas macro.


Tyler Retzlaff (39):
  eal: use C11 alignas
  eal: redefine macro to be integer literal for MSVC
  stack: use C11 alignas
  sched: use C11 alignas
  ring: use C11 alignas
  pipeline: use C11 alignas
  net: use C11 alignas
  mbuf: use C11 alignas
  hash: use C11 alignas
  eventdev: use C11 alignas
  ethdev: use C11 alignas
  dmadev: use C11 alignas
  distributor: use C11 alignas
  acl: use C11 alignas
  vhost: use C11 alignas
  timer: use C11 alignas
  table: use C11 alignas
  reorder: use C11 alignas
  regexdev: use C11 alignas
  rcu: use C11 alignas
  power: use C11 alignas
  rawdev: use C11 alignas
  port: use C11 alignas
  pdcp: use C11 alignas
  node: use C11 alignas
  mldev: use C11 alignas
  mempool: use C11 alignas
  member: use C11 alignas
  lpm: use C11 alignas
  ipsec: use C11 alignas
  jobstats: use C11 alignas
  bpf: use C11 alignas
  compressdev: use C11 alignas
  cryptodev: use C11 alignas
  dispatcher: use C11 alignas
  fib: use C11 alignas
  gpudev: use C11 alignas
  graph: use C11 alignas
  ip_frag: use C11 alignas

 lib/acl/acl_run.h                          |  4 ++--
 lib/acl/acl_run_altivec.h                  |  6 ++++--
 lib/acl/acl_run_neon.h                     |  6 ++++--
 lib/bpf/bpf_pkt.c                          |  4 ++--
 lib/compressdev/rte_comp.h                 |  4 ++--
 lib/compressdev/rte_compressdev_internal.h |  8 +++----
 lib/cryptodev/cryptodev_pmd.h              |  8 +++----
 lib/cryptodev/rte_cryptodev_core.h         |  4 ++--
 lib/dispatcher/rte_dispatcher.c            |  4 ++--
 lib/distributor/distributor_private.h      | 34 ++++++++++++++++--------------
 lib/distributor/rte_distributor.c          |  5 +++--
 lib/dmadev/rte_dmadev_core.h               |  4 ++--
 lib/dmadev/rte_dmadev_pmd.h                |  8 +++----
 lib/eal/arm/include/rte_vect.h             |  4 ++--
 lib/eal/common/malloc_elem.h               |  4 ++--
 lib/eal/common/malloc_heap.h               |  4 ++--
 lib/eal/common/rte_keepalive.c             |  3 ++-
 lib/eal/common/rte_random.c                |  4 ++--
 lib/eal/common/rte_service.c               |  8 +++----
 lib/eal/include/generic/rte_atomic.h       |  4 ++--
 lib/eal/include/rte_common.h               | 23 +++++++++++++-------
 lib/eal/loongarch/include/rte_vect.h       |  8 +++----
 lib/eal/ppc/include/rte_vect.h             |  4 ++--
 lib/eal/riscv/include/rte_vect.h           |  4 ++--
 lib/eal/x86/include/rte_vect.h             |  9 +++++---
 lib/eal/x86/rte_power_intrinsics.c         | 10 +++++----
 lib/ethdev/ethdev_driver.h                 |  8 +++----
 lib/ethdev/rte_ethdev.h                    | 16 +++++++-------
 lib/ethdev/rte_ethdev_core.h               |  4 ++--
 lib/ethdev/rte_flow_driver.h               |  4 ++--
 lib/eventdev/event_timer_adapter_pmd.h     |  4 ++--
 lib/eventdev/eventdev_pmd.h                |  8 +++----
 lib/eventdev/rte_event_crypto_adapter.c    | 16 +++++++-------
 lib/eventdev/rte_event_dma_adapter.c       | 16 +++++++-------
 lib/eventdev/rte_event_eth_rx_adapter.c    |  8 +++----
 lib/eventdev/rte_event_eth_tx_adapter.c    |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c     |  9 ++++----
 lib/eventdev/rte_event_timer_adapter.h     |  8 +++----
 lib/eventdev/rte_eventdev.h                | 10 +++------
 lib/eventdev/rte_eventdev_core.h           |  4 ++--
 lib/fib/dir24_8.h                          |  4 +++-
 lib/fib/trie.h                             |  4 +++-
 lib/gpudev/gpudev_driver.h                 |  4 ++--
 lib/graph/graph_private.h                  |  4 ++--
 lib/graph/graph_stats.c                    |  4 ++--
 lib/graph/rte_graph.h                      |  4 ++--
 lib/graph/rte_graph_worker_common.h        | 17 +++++++++------
 lib/hash/rte_cuckoo_hash.h                 | 16 ++++++++------
 lib/hash/rte_thash.c                       |  4 +++-
 lib/hash/rte_thash.h                       |  8 +++----
 lib/ip_frag/ip_reassembly.h                |  8 +++----
 lib/ipsec/rte_ipsec.h                      |  4 ++--
 lib/ipsec/sa.h                             |  4 ++--
 lib/jobstats/rte_jobstats.h                |  8 +++----
 lib/lpm/rte_lpm.h                          |  5 +++--
 lib/lpm/rte_lpm6.c                         |  8 +++----
 lib/mbuf/rte_mbuf_core.h                   |  6 +++---
 lib/member/rte_member.h                    |  8 +++----
 lib/member/rte_member_ht.h                 |  4 ++--
 lib/member/rte_member_sketch.c             |  4 ++--
 lib/mempool/rte_mempool.h                  | 27 ++++++++++++------------
 lib/mldev/rte_mldev.h                      |  4 ++--
 lib/mldev/rte_mldev_core.h                 |  4 ++--
 lib/net/net_crc_avx512.c                   | 14 ++++++------
 lib/net/net_crc_neon.c                     | 11 +++++-----
 lib/net/net_crc_sse.c                      | 17 ++++++++-------
 lib/net/rte_arp.h                          |  8 +++----
 lib/net/rte_ether.h                        |  8 +++----
 lib/node/node_private.h                    |  4 ++--
 lib/node/pkt_cls.c                         |  4 +++-
 lib/pdcp/rte_pdcp.h                        |  4 ++--
 lib/pipeline/rte_pipeline.c                |  4 ++--
 lib/pipeline/rte_port_in_action.c          |  3 ++-
 lib/pipeline/rte_swx_ipsec.c               |  4 +++-
 lib/pipeline/rte_table_action.c            | 24 ++++++++++-----------
 lib/port/rte_port_frag.c                   |  4 ++--
 lib/power/power_acpi_cpufreq.c             |  4 ++--
 lib/power/power_amd_pstate_cpufreq.c       |  4 ++--
 lib/power/power_cppc_cpufreq.c             |  4 ++--
 lib/power/power_intel_uncore.c             |  4 ++--
 lib/power/power_pstate_cpufreq.c           |  4 ++--
 lib/power/rte_power_pmd_mgmt.c             |  4 ++--
 lib/rawdev/rte_rawdev.h                    |  4 ++--
 lib/rcu/rte_rcu_qsbr.h                     | 16 ++++++++------
 lib/regexdev/rte_regexdev_core.h           |  8 +++----
 lib/reorder/rte_reorder.c                  |  8 +++----
 lib/ring/rte_ring_core.h                   | 16 ++++++++------
 lib/ring/rte_ring_peek_zc.h                |  4 ++--
 lib/sched/rte_sched.c                      | 21 +++++++++---------
 lib/sched/rte_sched_common.h               |  2 --
 lib/stack/rte_stack.h                      | 16 ++++++++------
 lib/table/rte_swx_table_learner.c          |  4 ++--
 lib/table/rte_table_acl.c                  |  3 ++-
 lib/table/rte_table_array.c                |  7 +++---
 lib/table/rte_table_hash_cuckoo.c          |  4 +++-
 lib/table/rte_table_hash_ext.c             |  3 ++-
 lib/table/rte_table_hash_key16.c           |  4 +++-
 lib/table/rte_table_hash_key32.c           |  4 +++-
 lib/table/rte_table_hash_key8.c            |  4 +++-
 lib/table/rte_table_hash_lru.c             |  3 ++-
 lib/table/rte_table_lpm.c                  |  3 ++-
 lib/table/rte_table_lpm_ipv6.c             |  3 ++-
 lib/timer/rte_timer.c                      |  4 ++--
 lib/vhost/vhost.h                          |  8 +++----
 lib/vhost/vhost_crypto.c                   |  4 ++--
 105 files changed, 407 insertions(+), 349 deletions(-)

-- 
1.8.3.1

[PATCH v7 01/39] eal: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Expand __rte_aligned(a) to __declspec(align(a)) when building
  with MSVC.

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/eal/arm/include/rte_vect.h       |  4 ++--
 lib/eal/common/malloc_elem.h         |  4 ++--
 lib/eal/common/malloc_heap.h         |  4 ++--
 lib/eal/common/rte_keepalive.c       |  3 ++-
 lib/eal/common/rte_random.c          |  4 ++--
 lib/eal/common/rte_service.c         |  8 ++++----
 lib/eal/include/generic/rte_atomic.h |  4 ++--
 lib/eal/include/rte_common.h         | 23 +++++++++++++++--------
 lib/eal/loongarch/include/rte_vect.h |  8 ++++----
 lib/eal/ppc/include/rte_vect.h       |  4 ++--
 lib/eal/riscv/include/rte_vect.h     |  4 ++--
 lib/eal/x86/include/rte_vect.h       |  4 ++--
 lib/eal/x86/rte_power_intrinsics.c   | 10 ++++++----
 13 files changed, 47 insertions(+), 37 deletions(-)

diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 8cfe4bd..c97d299 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -24,14 +24,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #if defined(RTE_ARCH_ARM) && defined(RTE_ARCH_32)
 /* NEON intrinsic vqtbl1q_u8() is not supported in ARMv7-A(AArch32) */
diff --git a/lib/eal/common/malloc_elem.h b/lib/eal/common/malloc_elem.h
index 952ce73..c7ff671 100644
--- a/lib/eal/common/malloc_elem.h
+++ b/lib/eal/common/malloc_elem.h
@@ -20,7 +20,7 @@ enum elem_state {
 	ELEM_PAD  /* element is a padding-only header */
 };
 
-struct malloc_elem {
+struct __rte_cache_aligned malloc_elem {
 	struct malloc_heap *heap;
 	struct malloc_elem *volatile prev;
 	/**< points to prev elem in memseg */
@@ -48,7 +48,7 @@ struct malloc_elem {
 	size_t user_size;
 	uint64_t asan_cookie[2]; /* must be next to header_cookie */
 #endif
-} __rte_cache_aligned;
+};
 
 static const unsigned int MALLOC_ELEM_HEADER_LEN = sizeof(struct malloc_elem);
 
diff --git a/lib/eal/common/malloc_heap.h b/lib/eal/common/malloc_heap.h
index 8f3ab57..0c49588 100644
--- a/lib/eal/common/malloc_heap.h
+++ b/lib/eal/common/malloc_heap.h
@@ -21,7 +21,7 @@
 /**
  * Structure to hold malloc heap
  */
-struct malloc_heap {
+struct __rte_cache_aligned malloc_heap {
 	rte_spinlock_t lock;
 	LIST_HEAD(, malloc_elem) free_head[RTE_HEAP_NUM_FREELISTS];
 	struct malloc_elem *volatile first;
@@ -31,7 +31,7 @@ struct malloc_heap {
 	unsigned int socket_id;
 	size_t total_size;
 	char name[RTE_HEAP_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 void *
 malloc_heap_alloc(const char *type, size_t size, int socket, unsigned int flags,
diff --git a/lib/eal/common/rte_keepalive.c b/lib/eal/common/rte_keepalive.c
index f6db973..391c1be 100644
--- a/lib/eal/common/rte_keepalive.c
+++ b/lib/eal/common/rte_keepalive.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2015-2016 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <inttypes.h>
 
 #include <rte_common.h>
@@ -19,7 +20,7 @@ struct rte_keepalive {
 		/*
 		 * Each element must be cache aligned to prevent false sharing.
 		 */
-		enum rte_keepalive_state core_state __rte_cache_aligned;
+		alignas(RTE_CACHE_LINE_SIZE) enum rte_keepalive_state core_state;
 	} live_data[RTE_KEEPALIVE_MAXCORES];
 
 	/** Last-seen-alive timestamps */
diff --git a/lib/eal/common/rte_random.c b/lib/eal/common/rte_random.c
index 7709b8f..90e91b3 100644
--- a/lib/eal/common/rte_random.c
+++ b/lib/eal/common/rte_random.c
@@ -13,14 +13,14 @@
 #include <rte_lcore.h>
 #include <rte_random.h>
 
-struct rte_rand_state {
+struct __rte_cache_aligned rte_rand_state {
 	uint64_t z1;
 	uint64_t z2;
 	uint64_t z3;
 	uint64_t z4;
 	uint64_t z5;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 /* One instance each for every lcore id-equipped thread, and one
  * additional instance to be shared by all others threads (i.e., all
diff --git a/lib/eal/common/rte_service.c b/lib/eal/common/rte_service.c
index d959c91..5637993 100644
--- a/lib/eal/common/rte_service.c
+++ b/lib/eal/common/rte_service.c
@@ -32,7 +32,7 @@
 #define RUNSTATE_RUNNING 1
 
 /* internal representation of a service */
-struct rte_service_spec_impl {
+struct __rte_cache_aligned rte_service_spec_impl {
 	/* public part of the struct */
 	struct rte_service_spec spec;
 
@@ -53,7 +53,7 @@ struct rte_service_spec_impl {
 	 * on currently.
 	 */
 	RTE_ATOMIC(uint32_t) num_mapped_cores;
-} __rte_cache_aligned;
+};
 
 struct service_stats {
 	RTE_ATOMIC(uint64_t) calls;
@@ -61,7 +61,7 @@ struct service_stats {
 };
 
 /* the internal values of a service core */
-struct core_state {
+struct __rte_cache_aligned core_state {
 	/* map of services IDs are run on this core */
 	uint64_t service_mask;
 	RTE_ATOMIC(uint8_t) runstate; /* running or stopped */
@@ -71,7 +71,7 @@ struct core_state {
 	RTE_ATOMIC(uint64_t) loops;
 	RTE_ATOMIC(uint64_t) cycles;
 	struct service_stats service_stats[RTE_SERVICE_NUM_MAX];
-} __rte_cache_aligned;
+};
 
 static uint32_t rte_service_count;
 static struct rte_service_spec_impl *rte_services;
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 0e639da..f859707 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -1094,7 +1094,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 /**
  * 128-bit integer structure.
  */
-typedef struct {
+typedef struct __rte_aligned(16) {
 	union {
 		uint64_t val[2];
 #ifdef RTE_ARCH_64
@@ -1103,7 +1103,7 @@ static inline void rte_atomic64_clear(rte_atomic64_t *v)
 #endif
 #endif
 	};
-} __rte_aligned(16) rte_int128_t;
+} rte_int128_t;
 
 #ifdef __DOXYGEN__
 
diff --git a/lib/eal/include/rte_common.h b/lib/eal/include/rte_common.h
index 1cc1222..0908aa0 100644
--- a/lib/eal/include/rte_common.h
+++ b/lib/eal/include/rte_common.h
@@ -12,6 +12,8 @@
  * for DPDK.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -63,10 +65,19 @@
 #endif
 
 /**
- * Force alignment
+ * Force type alignment
+ *
+ * This macro should be used when alignment of a struct or union type
+ * is required. For toolchain compatibility it should appear between
+ * the {struct,union} keyword and tag. e.g.
+ *
+ *   struct __rte_aligned(8) tag { ... };
+ *
+ * If alignment of an object/variable is required then this macro should
+ * not be used, instead prefer C11 alignas(a).
  */
 #ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_aligned(a)
+#define __rte_aligned(a) __declspec(align(a))
 #else
 #define __rte_aligned(a) __attribute__((__aligned__(a)))
 #endif
@@ -538,18 +549,14 @@ static void __attribute__((destructor(RTE_PRIO(prio)), used)) func(void)
 #define RTE_CACHE_LINE_MIN_SIZE 64
 
 /** Force alignment to cache line. */
-#ifdef RTE_TOOLCHAIN_MSVC
-#define __rte_cache_aligned
-#else
 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-#endif
 
 /** Force minimum cache line alignment. */
 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
 
 #define _RTE_CACHE_GUARD_HELPER2(unique) \
-	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES] \
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) \
+	char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINES]
 #define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique)
 /**
  * Empty cache lines, to guard against false sharing-like effects
diff --git a/lib/eal/loongarch/include/rte_vect.h b/lib/eal/loongarch/include/rte_vect.h
index 1546515..aa334e8 100644
--- a/lib/eal/loongarch/include/rte_vect.h
+++ b/lib/eal/loongarch/include/rte_vect.h
@@ -15,7 +15,7 @@
 
 #define RTE_VECT_DEFAULT_SIMD_BITWIDTH RTE_VECT_SIMD_DISABLED
 
-typedef union xmm {
+typedef union __rte_aligned(16) xmm {
 	int8_t   i8[16];
 	int16_t  i16[8];
 	int32_t  i32[4];
@@ -25,19 +25,19 @@
 	uint32_t u32[4];
 	uint64_t u64[2];
 	double   pd[2];
-} __rte_aligned(16) xmm_t;
+} xmm_t;
 
 #define XMM_SIZE        (sizeof(xmm_t))
 #define XMM_MASK        (XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t	 x;
 	uint8_t	 u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
index a5f009b..c8bace2 100644
--- a/lib/eal/ppc/include/rte_vect.h
+++ b/lib/eal/ppc/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define	XMM_SIZE	(sizeof(xmm_t))
 #define	XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 	double   pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 #ifdef __cplusplus
 }
diff --git a/lib/eal/riscv/include/rte_vect.h b/lib/eal/riscv/include/rte_vect.h
index da9092a..6df10fa 100644
--- a/lib/eal/riscv/include/rte_vect.h
+++ b/lib/eal/riscv/include/rte_vect.h
@@ -22,14 +22,14 @@
 #define XMM_SIZE	(sizeof(xmm_t))
 #define XMM_MASK	(XMM_SIZE - 1)
 
-typedef union rte_xmm {
+typedef union __rte_aligned(16) rte_xmm {
 	xmm_t		x;
 	uint8_t		u8[XMM_SIZE / sizeof(uint8_t)];
 	uint16_t	u16[XMM_SIZE / sizeof(uint16_t)];
 	uint32_t	u32[XMM_SIZE / sizeof(uint32_t)];
 	uint64_t	u64[XMM_SIZE / sizeof(uint64_t)];
 	double		pd[XMM_SIZE / sizeof(double)];
-} __rte_aligned(16) rte_xmm_t;
+} rte_xmm_t;
 
 static inline xmm_t
 vect_load_128(void *p)
diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index 560f9e4..a1a537e 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -91,7 +91,7 @@
 #define RTE_X86_ZMM_SIZE	(sizeof(__m512i))
 #define RTE_X86_ZMM_MASK	(RTE_X86_ZMM_SIZE - 1)
 
-typedef union __rte_x86_zmm {
+typedef union __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm {
 	__m512i	 z;
 	ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
 	xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
@@ -100,7 +100,7 @@
 	uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
 	uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
 	double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
-} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
+} __rte_x86_zmm_t;
 
 #endif /* __AVX512F__ */
 
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 532a2e6..6d9b642 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2020 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_lcore.h>
 #include <rte_rtm.h>
@@ -12,10 +14,10 @@
 /*
  * Per-lcore structure holding current status of C0.2 sleeps.
  */
-static struct power_wait_status {
+static alignas(RTE_CACHE_LINE_SIZE) struct power_wait_status {
 	rte_spinlock_t lock;
 	volatile void *monitor_addr; /**< NULL if not currently sleeping */
-} __rte_cache_aligned wait_status[RTE_MAX_LCORE];
+} wait_status[RTE_MAX_LCORE];
 
 /*
  * This function uses UMONITOR/UMWAIT instructions and will enter C0.2 state.
@@ -85,10 +87,10 @@ static void amd_mwaitx(const uint64_t timeout)
 #endif
 }
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	void (*mmonitor)(volatile void *addr);
 	void (*mwait)(const uint64_t timeout);
-} __rte_cache_aligned power_monitor_ops;
+} power_monitor_ops;
 
 static inline void
 __umwait_wakeup(volatile void *addr)
-- 
1.8.3.1

[PATCH v7 02/39] eal: redefine macro to be integer literal for MSVC

[Tyler Retzlaff]

MSVC __declspec(align(#)) is limited and accepts only integer literals
as opposed to constant expressions. define XMM_SIZE to be 16 instead of
sizeof(xmm_t) and static_assert that sizeof(xmm_t) == 16 for
compatibility.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/eal/x86/include/rte_vect.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
index a1a537e..5ac3ccf 100644
--- a/lib/eal/x86/include/rte_vect.h
+++ b/lib/eal/x86/include/rte_vect.h
@@ -11,6 +11,7 @@
  * RTE SSE/AVX related header.
  */
 
+#include <assert.h>
 #include <stdint.h>
 #include <rte_config.h>
 #include <rte_common.h>
@@ -33,9 +34,11 @@
 
 typedef __m128i xmm_t;
 
-#define	XMM_SIZE	(sizeof(xmm_t))
+#define	XMM_SIZE	16
 #define	XMM_MASK	(XMM_SIZE - 1)
 
+static_assert(sizeof(xmm_t) == XMM_SIZE, "");
+
 typedef union rte_xmm {
 	xmm_t    x;
 	uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
-- 
1.8.3.1

[PATCH v7 03/39] stack: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/stack/rte_stack.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/stack/rte_stack.h b/lib/stack/rte_stack.h
index a379300..8ff0659 100644
--- a/lib/stack/rte_stack.h
+++ b/lib/stack/rte_stack.h
@@ -15,6 +15,8 @@
 #ifndef _RTE_STACK_H_
 #define _RTE_STACK_H_
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -42,7 +44,7 @@ struct rte_stack_lf_head {
 
 struct rte_stack_lf_list {
 	/** List head */
-	struct rte_stack_lf_head head __rte_aligned(16);
+	alignas(16) struct rte_stack_lf_head head;
 	/** List len */
 	RTE_ATOMIC(uint64_t) len;
 };
@@ -52,11 +54,11 @@ struct rte_stack_lf_list {
  */
 struct rte_stack_lf {
 	/** LIFO list of elements */
-	struct rte_stack_lf_list used __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list used;
 	/** LIFO list of free elements */
-	struct rte_stack_lf_list free __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_list free;
 	/** LIFO elements */
-	struct rte_stack_lf_elem elems[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_stack_lf_elem elems[];
 };
 
 /* Structure containing the LIFO, its current length, and a lock for mutual
@@ -71,9 +73,9 @@ struct rte_stack_std {
 /* The RTE stack structure contains the LIFO structure itself, plus metadata
  * such as its name and memzone pointer.
  */
-struct rte_stack {
+struct __rte_cache_aligned rte_stack {
 	/** Name of the stack. */
-	char name[RTE_STACK_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_STACK_NAMESIZE];
 	/** Memzone containing the rte_stack structure. */
 	const struct rte_memzone *memzone;
 	uint32_t capacity; /**< Usable size of the stack. */
@@ -82,7 +84,7 @@ struct rte_stack {
 		struct rte_stack_lf stack_lf; /**< Lock-free LIFO structure. */
 		struct rte_stack_std stack_std;	/**< LIFO structure. */
 	};
-} __rte_cache_aligned;
+};
 
 /**
  * The stack uses lock-free push and pop functions. This flag is only
-- 
1.8.3.1

[PATCH v7 04/39] sched: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@ struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@ struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@ struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@ struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@ struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@ struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@ struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)
-- 
1.8.3.1

[PATCH v7 05/39] ring: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/ring/rte_ring_core.h    | 16 +++++++++-------
 lib/ring/rte_ring_peek_zc.h |  4 ++--
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/lib/ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
index b770873..f958064 100644
--- a/lib/ring/rte_ring_core.h
+++ b/lib/ring/rte_ring_core.h
@@ -19,6 +19,8 @@
  * instead.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -78,7 +80,7 @@ struct rte_ring_headtail {
 
 union __rte_ring_rts_poscnt {
 	/** raw 8B value to read/write *cnt* and *pos* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		uint32_t cnt; /**< head/tail reference counter */
 		uint32_t pos; /**< head/tail position */
@@ -94,7 +96,7 @@ struct rte_ring_rts_headtail {
 
 union __rte_ring_hts_pos {
 	/** raw 8B value to read/write *head* and *tail* as one atomic op */
-	RTE_ATOMIC(uint64_t) raw __rte_aligned(8);
+	alignas(sizeof(uint64_t)) RTE_ATOMIC(uint64_t) raw;
 	struct {
 		RTE_ATOMIC(uint32_t) head; /**< head position */
 		RTE_ATOMIC(uint32_t) tail; /**< tail position */
@@ -117,7 +119,7 @@ struct rte_ring_hts_headtail {
  * a problem.
  */
 struct rte_ring {
-	char name[RTE_RING_NAMESIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char name[RTE_RING_NAMESIZE];
 	/**< Name of the ring. */
 	int flags;               /**< Flags supplied at creation. */
 	const struct rte_memzone *memzone;
@@ -129,20 +131,20 @@ struct rte_ring {
 	RTE_CACHE_GUARD;
 
 	/** Ring producer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail prod;
 		struct rte_ring_hts_headtail hts_prod;
 		struct rte_ring_rts_headtail rts_prod;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 
 	/** Ring consumer status. */
-	union {
+	union __rte_cache_aligned {
 		struct rte_ring_headtail cons;
 		struct rte_ring_hts_headtail hts_cons;
 		struct rte_ring_rts_headtail rts_cons;
-	}  __rte_cache_aligned;
+	};
 
 	RTE_CACHE_GUARD;
 };
diff --git a/lib/ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
index 8fb279c..0b5e34b 100644
--- a/lib/ring/rte_ring_peek_zc.h
+++ b/lib/ring/rte_ring_peek_zc.h
@@ -79,7 +79,7 @@
  * This structure contains the pointers and length of the space
  * reserved on the ring storage.
  */
-struct rte_ring_zc_data {
+struct __rte_cache_aligned rte_ring_zc_data {
 	/* Pointer to the first space in the ring */
 	void *ptr1;
 	/* Pointer to the second space in the ring if there is wrap-around.
@@ -92,7 +92,7 @@ struct rte_ring_zc_data {
 	 * will give the number of elements available at ptr2.
 	 */
 	unsigned int n1;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 __rte_ring_get_elem_addr(struct rte_ring *r, uint32_t head,
-- 
1.8.3.1

[PATCH v7 06/39] pipeline: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pipeline/rte_pipeline.c       |  4 ++--
 lib/pipeline/rte_port_in_action.c |  3 ++-
 lib/pipeline/rte_swx_ipsec.c      |  4 +++-
 lib/pipeline/rte_table_action.c   | 24 ++++++++++++------------
 4 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index 945bb02..a09a89f 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -104,7 +104,7 @@ struct rte_table {
 
 #define RTE_PIPELINE_MAX_NAME_SZ                           124
 
-struct rte_pipeline {
+struct __rte_cache_aligned rte_pipeline {
 	/* Input parameters */
 	char name[RTE_PIPELINE_MAX_NAME_SZ];
 	int socket_id;
@@ -132,7 +132,7 @@ struct rte_pipeline {
 	uint64_t pkts_mask;
 	uint64_t n_pkts_ah_drop;
 	uint64_t pkts_drop_mask;
-} __rte_cache_aligned;
+};
 
 static inline uint32_t
 rte_mask_get_next(uint64_t mask, uint32_t pos)
diff --git a/lib/pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
index 5818973..bbacaff 100644
--- a/lib/pipeline/rte_port_in_action.c
+++ b/lib/pipeline/rte_port_in_action.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2018 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdlib.h>
 #include <string.h>
 
@@ -282,7 +283,7 @@ struct rte_port_in_action_profile *
 struct rte_port_in_action {
 	struct ap_config cfg;
 	struct ap_data data;
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static __rte_always_inline void *
diff --git a/lib/pipeline/rte_swx_ipsec.c b/lib/pipeline/rte_swx_ipsec.c
index 28576c2..76b853f 100644
--- a/lib/pipeline/rte_swx_ipsec.c
+++ b/lib/pipeline/rte_swx_ipsec.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2022 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
@@ -154,7 +156,7 @@ struct rte_swx_ipsec {
 	/*
 	 * Table memory.
 	 */
-	uint8_t memory[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[];
 };
 
 static inline struct ipsec_sa *
diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
index dfdbc66..87c3e0e 100644
--- a/lib/pipeline/rte_table_action.c
+++ b/lib/pipeline/rte_table_action.c
@@ -465,11 +465,11 @@ struct encap_qinq_data {
 	((((uint64_t)(s)) & 0x1LLU) << 8) |                \
 	(((uint64_t)(ttl)) & 0xFFLLU)))
 
-struct encap_mpls_data {
+struct __rte_aligned(2) encap_mpls_data {
 	struct rte_ether_hdr ether;
 	uint32_t mpls[RTE_TABLE_ACTION_MPLS_LABELS_MAX];
 	uint32_t mpls_count;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 #define PPP_PROTOCOL_IP                                    0x0021
 
@@ -487,42 +487,42 @@ struct encap_pppoe_data {
 
 #define IP_PROTO_UDP                                       17
 
-struct encap_vxlan_ipv4_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv4_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv4_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv4_hdr ipv4;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_data {
 	struct rte_ether_hdr ether;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_vxlan_ipv6_vlan_data {
+struct __rte_aligned(2) encap_vxlan_ipv6_vlan_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr vlan;
 	struct rte_ipv6_hdr ipv6;
 	struct rte_udp_hdr udp;
 	struct rte_vxlan_hdr vxlan;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct encap_qinq_pppoe_data {
+struct __rte_aligned(2) encap_qinq_pppoe_data {
 	struct rte_ether_hdr ether;
 	struct rte_vlan_hdr svlan;
 	struct rte_vlan_hdr cvlan;
 	struct pppoe_ppp_hdr pppoe_ppp;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 static size_t
 encap_data_size(struct rte_table_action_encap_config *encap)
-- 
1.8.3.1

[PATCH v7 07/39] net: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/net/net_crc_avx512.c | 14 ++++++++------
 lib/net/net_crc_neon.c   | 11 ++++++-----
 lib/net/net_crc_sse.c    | 17 +++++++++--------
 lib/net/rte_arp.h        |  8 ++++----
 lib/net/rte_ether.h      |  8 ++++----
 5 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/lib/net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
index f6a3ce9..0f48ca0 100644
--- a/lib/net/net_crc_avx512.c
+++ b/lib/net/net_crc_avx512.c
@@ -3,6 +3,8 @@
  */
 
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 
 #include "net_crc.h"
@@ -20,8 +22,8 @@ struct crc_vpclmulqdq_ctx {
 	__m128i fold_1x128b;
 };
 
-static struct crc_vpclmulqdq_ctx crc32_eth __rte_aligned(64);
-static struct crc_vpclmulqdq_ctx crc16_ccitt __rte_aligned(64);
+static alignas(64) struct crc_vpclmulqdq_ctx crc32_eth;
+static alignas(64) struct crc_vpclmulqdq_ctx crc16_ccitt;
 
 static uint16_t byte_len_to_mask_table[] = {
 	0x0000, 0x0001, 0x0003, 0x0007,
@@ -30,18 +32,18 @@ struct crc_vpclmulqdq_ctx {
 	0x0fff, 0x1fff, 0x3fff, 0x7fff,
 	0xffff};
 
-static const uint8_t shf_table[32] __rte_aligned(16) = {
+static const alignas(16) uint8_t shf_table[32] = {
 	0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 	0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 	0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
 };
 
-static const uint32_t mask[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask[4] = {
 	0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 };
 
-static const uint32_t mask2[4] __rte_aligned(16) = {
+static const alignas(16) uint32_t mask2[4] = {
 	0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 };
 
@@ -93,7 +95,7 @@ struct crc_vpclmulqdq_ctx {
 	uint32_t offset;
 	__m128i res2, res3, res4, pshufb_shf;
 
-	const uint32_t mask3[4] __rte_aligned(16) = {
+	const alignas(16) uint32_t mask3[4] = {
 		   0x80808080, 0x80808080, 0x80808080, 0x80808080
 	};
 
diff --git a/lib/net/net_crc_neon.c b/lib/net/net_crc_neon.c
index f61d75a..cee75dd 100644
--- a/lib/net/net_crc_neon.c
+++ b/lib/net/net_crc_neon.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Cavium, Inc
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -19,8 +20,8 @@ struct crc_pmull_ctx {
 	uint64x2_t rk7_rk8;
 };
 
-struct crc_pmull_ctx crc32_eth_pmull __rte_aligned(16);
-struct crc_pmull_ctx crc16_ccitt_pmull __rte_aligned(16);
+alignas(16) struct crc_pmull_ctx crc32_eth_pmull;
+alignas(16) struct crc_pmull_ctx crc16_ccitt_pmull;
 
 /**
  * @brief Performs one folding round
@@ -96,10 +97,10 @@ struct crc_pmull_ctx {
 crcr32_reduce_64_to_32(uint64x2_t data64,
 	uint64x2_t precomp)
 {
-	static uint32_t mask1[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
-	static uint32_t mask2[4] __rte_aligned(16) = {
+	static alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	uint64x2_t tmp0, tmp1, tmp2;
@@ -148,7 +149,7 @@ struct crc_pmull_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
diff --git a/lib/net/net_crc_sse.c b/lib/net/net_crc_sse.c
index dd75845..d673ae3 100644
--- a/lib/net/net_crc_sse.c
+++ b/lib/net/net_crc_sse.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017-2020 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 
 #include <rte_common.h>
@@ -18,8 +19,8 @@ struct crc_pclmulqdq_ctx {
 	__m128i rk7_rk8;
 };
 
-static struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq __rte_aligned(16);
-static struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq __rte_aligned(16);
+static alignas(16) struct crc_pclmulqdq_ctx crc32_eth_pclmulqdq;
+static alignas(16) struct crc_pclmulqdq_ctx crc16_ccitt_pclmulqdq;
 /**
  * @brief Performs one folding round
  *
@@ -96,11 +97,11 @@ struct crc_pclmulqdq_ctx {
 static __rte_always_inline uint32_t
 crcr32_reduce_64_to_32(__m128i data64, __m128i precomp)
 {
-	static const uint32_t mask1[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask1[4] = {
 		0xffffffff, 0xffffffff, 0x00000000, 0x00000000
 	};
 
-	static const uint32_t mask2[4] __rte_aligned(16) = {
+	static const alignas(16) uint32_t mask2[4] = {
 		0x00000000, 0xffffffff, 0xffffffff, 0xffffffff
 	};
 	__m128i tmp0, tmp1, tmp2;
@@ -118,7 +119,7 @@ struct crc_pclmulqdq_ctx {
 	return _mm_extract_epi32(tmp2, 2);
 }
 
-static const uint8_t crc_xmm_shift_tab[48] __rte_aligned(16) = {
+static const alignas(16) uint8_t crc_xmm_shift_tab[48] = {
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
@@ -175,7 +176,7 @@ struct crc_pclmulqdq_ctx {
 
 		if (unlikely(data_len < 16)) {
 			/* 0 to 15 bytes */
-			uint8_t buffer[16] __rte_aligned(16);
+			alignas(16) uint8_t buffer[16];
 
 			memset(buffer, 0, sizeof(buffer));
 			memcpy(buffer, data, data_len);
@@ -212,11 +213,11 @@ struct crc_pclmulqdq_ctx {
 partial_bytes:
 	if (likely(n < data_len)) {
 
-		const uint32_t mask3[4] __rte_aligned(16) = {
+		const alignas(16) uint32_t mask3[4] = {
 			0x80808080, 0x80808080, 0x80808080, 0x80808080
 		};
 
-		const uint8_t shf_table[32] __rte_aligned(16) = {
+		const alignas(16) uint8_t shf_table[32] = {
 			0x00, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
 			0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
 			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
diff --git a/lib/net/rte_arp.h b/lib/net/rte_arp.h
index c3cd0af..668cea1 100644
--- a/lib/net/rte_arp.h
+++ b/lib/net/rte_arp.h
@@ -21,17 +21,17 @@
 /**
  * ARP header IPv4 payload.
  */
-struct rte_arp_ipv4 {
+struct __rte_aligned(2) rte_arp_ipv4 {
 	struct rte_ether_addr arp_sha;  /**< sender hardware address */
 	rte_be32_t            arp_sip;  /**< sender IP address */
 	struct rte_ether_addr arp_tha;  /**< target hardware address */
 	rte_be32_t            arp_tip;  /**< target IP address */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * ARP header.
  */
-struct rte_arp_hdr {
+struct __rte_aligned(2) rte_arp_hdr {
 	rte_be16_t arp_hardware; /**< format of hardware address */
 #define RTE_ARP_HRD_ETHER     1  /**< ARP Ethernet address format */
 
@@ -47,7 +47,7 @@ struct rte_arp_hdr {
 #define	RTE_ARP_OP_INVREPLY   9  /**< response identifying peer */
 
 	struct rte_arp_ipv4 arp_data;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /**
  * Make a RARP packet based on MAC addr.
diff --git a/lib/net/rte_ether.h b/lib/net/rte_ether.h
index 75285bd..32ed515 100644
--- a/lib/net/rte_ether.h
+++ b/lib/net/rte_ether.h
@@ -71,9 +71,9 @@
  * administrator and does not contain OUIs.
  * See http://standards.ieee.org/regauth/groupmac/tutorial.html
  */
-struct rte_ether_addr {
+struct __rte_aligned(2) rte_ether_addr {
 	uint8_t addr_bytes[RTE_ETHER_ADDR_LEN]; /**< Addr bytes in tx order */
-} __rte_aligned(2);
+};
 
 #define RTE_ETHER_LOCAL_ADMIN_ADDR 0x02 /**< Locally assigned Eth. address. */
 #define RTE_ETHER_GROUP_ADDR  0x01 /**< Multicast or broadcast Eth. address. */
@@ -290,11 +290,11 @@ static inline int rte_is_valid_assigned_ether_addr(const struct rte_ether_addr *
  * Ethernet header: Contains the destination address, source address
  * and frame type.
  */
-struct rte_ether_hdr {
+struct __rte_aligned(2) rte_ether_hdr {
 	struct rte_ether_addr dst_addr; /**< Destination address. */
 	struct rte_ether_addr src_addr; /**< Source address. */
 	rte_be16_t ether_type; /**< Frame type. */
-} __rte_aligned(2);
+};
 
 /**
  * Ethernet VLAN Header.
-- 
1.8.3.1

[PATCH v7 08/39] mbuf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/mbuf/rte_mbuf_core.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
index 5688683..917a811 100644
--- a/lib/mbuf/rte_mbuf_core.h
+++ b/lib/mbuf/rte_mbuf_core.h
@@ -463,7 +463,7 @@ enum {
 /**
  * The generic rte_mbuf, containing a packet mbuf.
  */
-struct rte_mbuf {
+struct __rte_cache_aligned rte_mbuf {
 	RTE_MARKER cacheline0;
 
 	void *buf_addr;           /**< Virtual address of segment buffer. */
@@ -476,7 +476,7 @@ struct rte_mbuf {
 	 * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
 	 * working on vector drivers easier.
 	 */
-	rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
+	alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
 #else
 	/**
 	 * Next segment of scattered packet.
@@ -662,7 +662,7 @@ struct rte_mbuf {
 	uint16_t timesync;
 
 	uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * Function typedef of callback to free externally attached buffer.
-- 
1.8.3.1

[PATCH v7 09/39] hash: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/hash/rte_cuckoo_hash.h | 16 +++++++++-------
 lib/hash/rte_thash.c       |  4 +++-
 lib/hash/rte_thash.h       |  8 ++++----
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.h b/lib/hash/rte_cuckoo_hash.h
index 8ea793c..a528f1d 100644
--- a/lib/hash/rte_cuckoo_hash.h
+++ b/lib/hash/rte_cuckoo_hash.h
@@ -11,6 +11,8 @@
 #ifndef _RTE_CUCKOO_HASH_H_
 #define _RTE_CUCKOO_HASH_H_
 
+#include <stdalign.h>
+
 #if defined(RTE_ARCH_X86)
 #include "rte_cmp_x86.h"
 #endif
@@ -117,10 +119,10 @@ enum cmp_jump_table_case {
 
 #define RTE_HASH_TSX_MAX_RETRY  10
 
-struct lcore_cache {
+struct __rte_cache_aligned lcore_cache {
 	unsigned len; /**< Cache len */
 	uint32_t objs[LCORE_CACHE_SIZE]; /**< Cache objects */
-} __rte_cache_aligned;
+};
 
 /* Structure that stores key-value pair */
 struct rte_hash_key {
@@ -141,7 +143,7 @@ enum rte_hash_sig_compare_function {
 };
 
 /** Bucket structure */
-struct rte_hash_bucket {
+struct __rte_cache_aligned rte_hash_bucket {
 	uint16_t sig_current[RTE_HASH_BUCKET_ENTRIES];
 
 	RTE_ATOMIC(uint32_t) key_idx[RTE_HASH_BUCKET_ENTRIES];
@@ -149,10 +151,10 @@ struct rte_hash_bucket {
 	uint8_t flag[RTE_HASH_BUCKET_ENTRIES];
 
 	void *next;
-} __rte_cache_aligned;
+};
 
 /** A hash table structure. */
-struct rte_hash {
+struct __rte_cache_aligned rte_hash {
 	char name[RTE_HASH_NAMESIZE];   /**< Name of the hash. */
 	uint32_t entries;               /**< Total table entries. */
 	uint32_t num_buckets;           /**< Number of buckets in table. */
@@ -170,7 +172,7 @@ struct rte_hash {
 
 	/* Fields used in lookup */
 
-	uint32_t key_len __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t key_len;
 	/**< Length of hash key. */
 	uint8_t hw_trans_mem_support;
 	/**< If hardware transactional memory is used. */
@@ -220,7 +222,7 @@ struct rte_hash {
 	uint32_t *ext_bkt_to_free;
 	RTE_ATOMIC(uint32_t) *tbl_chng_cnt;
 	/**< Indicates if the hash table changed from last read. */
-} __rte_cache_aligned;
+};
 
 struct queue_node {
 	struct rte_hash_bucket *bkt; /* Current bucket on the bfs search */
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index e8de071..6464fd3 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -2,6 +2,8 @@
  * Copyright(c) 2021 Intel Corporation
  */
 
+#include <stdalign.h>
+
 #include <sys/queue.h>
 
 #include <rte_thash.h>
@@ -80,7 +82,7 @@ struct rte_thash_subtuple_helper {
 	uint32_t	tuple_offset;	/** < Offset in bits of the subtuple */
 	uint32_t	tuple_len;	/** < Length in bits of the subtuple */
 	uint32_t	lsb_msk;	/** < (1 << reta_sz_log) - 1 */
-	__extension__ uint32_t	compl_table[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint32_t	compl_table[0];
 	/** < Complementary table */
 };
 
diff --git a/lib/hash/rte_thash.h b/lib/hash/rte_thash.h
index 2681b1b..30b657e 100644
--- a/lib/hash/rte_thash.h
+++ b/lib/hash/rte_thash.h
@@ -99,14 +99,14 @@ struct rte_ipv6_tuple {
 	};
 };
 
+#ifdef RTE_ARCH_X86
+union __rte_aligned(XMM_SIZE) rte_thash_tuple {
+#else
 union rte_thash_tuple {
+#endif
 	struct rte_ipv4_tuple	v4;
 	struct rte_ipv6_tuple	v6;
-#ifdef RTE_ARCH_X86
-} __rte_aligned(XMM_SIZE);
-#else
 };
-#endif
 
 /**
  * Prepare special converted key to use with rte_softrss_be()
-- 
1.8.3.1

[PATCH v7 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/eventdev/event_timer_adapter_pmd.h  |  4 ++--
 lib/eventdev/eventdev_pmd.h             |  8 ++++----
 lib/eventdev/rte_event_crypto_adapter.c | 16 ++++++++--------
 lib/eventdev/rte_event_dma_adapter.c    | 16 ++++++++--------
 lib/eventdev/rte_event_eth_rx_adapter.c |  8 ++++----
 lib/eventdev/rte_event_eth_tx_adapter.c |  4 ++--
 lib/eventdev/rte_event_timer_adapter.c  |  9 +++++----
 lib/eventdev/rte_event_timer_adapter.h  |  8 ++++----
 lib/eventdev/rte_eventdev.h             | 10 +++-------
 lib/eventdev/rte_eventdev_core.h        |  4 ++--
 10 files changed, 42 insertions(+), 45 deletions(-)

diff --git a/lib/eventdev/event_timer_adapter_pmd.h b/lib/eventdev/event_timer_adapter_pmd.h
index 65b421b..cd5127f 100644
--- a/lib/eventdev/event_timer_adapter_pmd.h
+++ b/lib/eventdev/event_timer_adapter_pmd.h
@@ -86,7 +86,7 @@ struct event_timer_adapter_ops {
  * @internal Adapter data; structure to be placed in shared memory to be
  * accessible by various processes in a multi-process configuration.
  */
-struct rte_event_timer_adapter_data {
+struct __rte_cache_aligned rte_event_timer_adapter_data {
 	uint8_t id;
 	/**< Event timer adapter ID */
 	uint8_t event_dev_id;
@@ -110,7 +110,7 @@ struct rte_event_timer_adapter_data {
 
 	uint8_t started : 1;
 	/**< Flag to indicate adapter started. */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
diff --git a/lib/eventdev/eventdev_pmd.h b/lib/eventdev/eventdev_pmd.h
index 2ad8802..7a5699f 100644
--- a/lib/eventdev/eventdev_pmd.h
+++ b/lib/eventdev/eventdev_pmd.h
@@ -105,7 +105,7 @@ struct rte_eventdev_global {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_eventdev_data {
+struct __rte_cache_aligned rte_eventdev_data {
 	int socket_id;
 	/**< Socket ID where memory is allocated */
 	uint8_t dev_id;
@@ -144,10 +144,10 @@ struct rte_eventdev_data {
 
 	uint64_t reserved_64s[4]; /**< Reserved for future fields */
 	void *reserved_ptrs[4];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each event device. */
-struct rte_eventdev {
+struct __rte_cache_aligned rte_eventdev {
 	struct rte_eventdev_data *data;
 	/**< Pointer to device data */
 	struct eventdev_ops *dev_ops;
@@ -187,7 +187,7 @@ struct rte_eventdev {
 
 	uint64_t reserved_64s[3]; /**< Reserved for future fields */
 	void *reserved_ptrs[3];	  /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 extern struct rte_eventdev *rte_eventdevs;
 /** @internal The pool of rte_eventdev structures. */
diff --git a/lib/eventdev/rte_event_crypto_adapter.c b/lib/eventdev/rte_event_crypto_adapter.c
index 9903f96..db1c7f3 100644
--- a/lib/eventdev/rte_event_crypto_adapter.c
+++ b/lib/eventdev/rte_event_crypto_adapter.c
@@ -42,7 +42,7 @@
 
 #define ECA_ADAPTER_ARRAY "crypto_adapter_array"
 
-struct crypto_ops_circular_buffer {
+struct __rte_cache_aligned crypto_ops_circular_buffer {
 	/* index of head element in circular buffer */
 	uint16_t head;
 	/* index of tail element in circular buffer */
@@ -53,9 +53,9 @@ struct crypto_ops_circular_buffer {
 	uint16_t size;
 	/* Pointer to hold rte_crypto_ops for batching */
 	struct rte_crypto_op **op_buffer;
-} __rte_cache_aligned;
+};
 
-struct event_crypto_adapter {
+struct __rte_cache_aligned event_crypto_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 	/* Event port identifier */
@@ -98,10 +98,10 @@ struct event_crypto_adapter {
 	uint16_t nb_qps;
 	/* Adapter mode */
 	enum rte_event_crypto_adapter_mode mode;
-} __rte_cache_aligned;
+};
 
 /* Per crypto device information */
-struct crypto_device_info {
+struct __rte_cache_aligned crypto_device_info {
 	/* Pointer to cryptodev */
 	struct rte_cryptodev *dev;
 	/* Pointer to queue pair info */
@@ -118,15 +118,15 @@ struct crypto_device_info {
 	 * be invoked if not already invoked
 	 */
 	uint16_t num_qpairs;
-} __rte_cache_aligned;
+};
 
 /* Per queue pair information */
-struct crypto_queue_pair_info {
+struct __rte_cache_aligned crypto_queue_pair_info {
 	/* Set to indicate queue pair is enabled */
 	bool qp_enabled;
 	/* Circular buffer for batching crypto ops to cdev */
 	struct crypto_ops_circular_buffer cbuf;
-} __rte_cache_aligned;
+};
 
 static struct event_crypto_adapter **event_crypto_adapter;
 
diff --git a/lib/eventdev/rte_event_dma_adapter.c b/lib/eventdev/rte_event_dma_adapter.c
index 4196164..24dff55 100644
--- a/lib/eventdev/rte_event_dma_adapter.c
+++ b/lib/eventdev/rte_event_dma_adapter.c
@@ -26,7 +26,7 @@
 	} while (0)
 
 /* DMA ops circular buffer */
-struct dma_ops_circular_buffer {
+struct __rte_cache_aligned dma_ops_circular_buffer {
 	/* Index of head element */
 	uint16_t head;
 
@@ -41,19 +41,19 @@ struct dma_ops_circular_buffer {
 
 	/* Pointer to hold rte_event_dma_adapter_op for processing */
 	struct rte_event_dma_adapter_op **op_buffer;
-} __rte_cache_aligned;
+};
 
 /* Vchan information */
-struct dma_vchan_info {
+struct __rte_cache_aligned dma_vchan_info {
 	/* Set to indicate vchan queue is enabled */
 	bool vq_enabled;
 
 	/* Circular buffer for batching DMA ops to dma_dev */
 	struct dma_ops_circular_buffer dma_buf;
-} __rte_cache_aligned;
+};
 
 /* DMA device information */
-struct dma_device_info {
+struct __rte_cache_aligned dma_device_info {
 	/* Pointer to vchan queue info */
 	struct dma_vchan_info *vchanq;
 
@@ -81,9 +81,9 @@ struct dma_device_info {
 	 * transfer uses a hardware mechanism
 	 */
 	uint8_t internal_event_port;
-} __rte_cache_aligned;
+};
 
-struct event_dma_adapter {
+struct __rte_cache_aligned event_dma_adapter {
 	/* Event device identifier */
 	uint8_t eventdev_id;
 
@@ -145,7 +145,7 @@ struct event_dma_adapter {
 
 	/* Per instance stats structure */
 	struct rte_event_dma_adapter_stats dma_stats;
-} __rte_cache_aligned;
+};
 
 static struct event_dma_adapter **event_dma_adapter;
 
diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c b/lib/eventdev/rte_event_eth_rx_adapter.c
index 1b83a55..3ee20d9 100644
--- a/lib/eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/eventdev/rte_event_eth_rx_adapter.c
@@ -72,7 +72,7 @@ struct eth_rx_poll_entry {
 	uint16_t eth_rx_qid;
 };
 
-struct eth_rx_vector_data {
+struct __rte_cache_aligned eth_rx_vector_data {
 	TAILQ_ENTRY(eth_rx_vector_data) next;
 	uint16_t port;
 	uint16_t queue;
@@ -82,7 +82,7 @@ struct eth_rx_vector_data {
 	uint64_t vector_timeout_ticks;
 	struct rte_mempool *vector_pool;
 	struct rte_event_vector *vector_ev;
-} __rte_cache_aligned;
+};
 
 TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
 
@@ -103,7 +103,7 @@ struct eth_event_enqueue_buffer {
 	uint16_t last_mask;
 };
 
-struct event_eth_rx_adapter {
+struct __rte_cache_aligned event_eth_rx_adapter {
 	/* RSS key */
 	uint8_t rss_key_be[RSS_KEY_SIZE];
 	/* Event device identifier */
@@ -188,7 +188,7 @@ struct event_eth_rx_adapter {
 	uint8_t rxa_started;
 	/* Adapter ID */
 	uint8_t id;
-} __rte_cache_aligned;
+};
 
 /* Per eth device */
 struct eth_device_info {
diff --git a/lib/eventdev/rte_event_eth_tx_adapter.c b/lib/eventdev/rte_event_eth_tx_adapter.c
index 56435be..67fff8b 100644
--- a/lib/eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/eventdev/rte_event_eth_tx_adapter.c
@@ -109,7 +109,7 @@ struct txa_service_queue_info {
 };
 
 /* PMD private structure */
-struct txa_service_data {
+struct __rte_cache_aligned txa_service_data {
 	/* Max mbufs processed in any service function invocation */
 	uint32_t max_nb_tx;
 	/* Number of Tx queues in adapter */
@@ -144,7 +144,7 @@ struct txa_service_data {
 	int64_t service_id;
 	/* Memory allocation name */
 	char mem_name[TXA_MEM_NAME_LEN];
-} __rte_cache_aligned;
+};
 
 /* Per eth device structure */
 struct txa_service_ethdev {
diff --git a/lib/eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
index a3c6fb7..fdeeece 100644
--- a/lib/eventdev/rte_event_timer_adapter.c
+++ b/lib/eventdev/rte_event_timer_adapter.c
@@ -4,6 +4,7 @@
  */
 
 #include <ctype.h>
+#include <stdalign.h>
 #include <string.h>
 #include <inttypes.h>
 #include <stdbool.h>
@@ -511,11 +512,11 @@ struct rte_event_timer_adapter *
 
 #define EXP_TIM_BUF_SZ 128
 
-struct event_buffer {
+struct __rte_cache_aligned event_buffer {
 	size_t head;
 	size_t tail;
 	struct rte_event events[EVENT_BUFFER_SZ];
-} __rte_cache_aligned;
+};
 
 static inline bool
 event_buffer_full(struct event_buffer *bufp)
@@ -631,9 +632,9 @@ struct swtim {
 	/* Identifier of timer data instance */
 	uint32_t timer_data_id;
 	/* Track which cores have actually armed a timer */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		RTE_ATOMIC(uint16_t) v;
-	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
+	} in_use[RTE_MAX_LCORE];
 	/* Track which cores' timer lists should be polled */
 	RTE_ATOMIC(unsigned int) poll_lcores[RTE_MAX_LCORE];
 	/* The number of lists that should be polled */
diff --git a/lib/eventdev/rte_event_timer_adapter.h b/lib/eventdev/rte_event_timer_adapter.h
index c133dec..0bd1b30 100644
--- a/lib/eventdev/rte_event_timer_adapter.h
+++ b/lib/eventdev/rte_event_timer_adapter.h
@@ -473,7 +473,7 @@ enum rte_event_timer_state {
  * The generic *rte_event_timer* structure to hold the event timer attributes
  * for arm and cancel operations.
  */
-struct rte_event_timer {
+struct __rte_cache_aligned rte_event_timer {
 	struct rte_event ev;
 	/**<
 	 * Expiry event attributes.  On successful event timer timeout,
@@ -504,7 +504,7 @@ struct rte_event_timer {
 	/**< Memory to store user specific metadata.
 	 * The event timer adapter implementation should not modify this area.
 	 */
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*rte_event_timer_arm_burst_t)(
 		const struct rte_event_timer_adapter *adapter,
@@ -526,7 +526,7 @@ typedef uint16_t (*rte_event_timer_cancel_burst_t)(
 /**
  * @internal Data structure associated with each event timer adapter.
  */
-struct rte_event_timer_adapter {
+struct __rte_cache_aligned rte_event_timer_adapter {
 	rte_event_timer_arm_burst_t arm_burst;
 	/**< Pointer to driver arm_burst function. */
 	rte_event_timer_arm_tmo_tick_burst_t arm_tmo_tick_burst;
@@ -540,7 +540,7 @@ struct rte_event_timer_adapter {
 
 	uint8_t allocated : 1;
 	/**< Flag to indicate that this adapter has been allocated */
-} __rte_cache_aligned;
+};
 
 #define ADAPTER_VALID_OR_ERR_RET(adapter, retval) do {		\
 	if (adapter == NULL || !adapter->allocated)		\
diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index 3af4686..08e5f93 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1338,7 +1338,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1376,23 +1376,19 @@ struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-#ifndef __DOXYGEN__
-} __rte_aligned(16);
-#else
 };
-#endif
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0
diff --git a/lib/eventdev/rte_eventdev_core.h b/lib/eventdev/rte_eventdev_core.h
index 5b40551..fc8e155 100644
--- a/lib/eventdev/rte_eventdev_core.h
+++ b/lib/eventdev/rte_eventdev_core.h
@@ -49,7 +49,7 @@ typedef uint16_t (*event_dma_adapter_enqueue_t)(void *port, struct rte_event ev[
 typedef int (*event_profile_switch_t)(void *port, uint8_t profile);
 /**< @internal Switch active link profile on the event port. */
 
-struct rte_event_fp_ops {
+struct __rte_cache_aligned rte_event_fp_ops {
 	void **data;
 	/**< points to array of internal port data pointers */
 	event_enqueue_t enqueue;
@@ -77,7 +77,7 @@ struct rte_event_fp_ops {
 	event_profile_switch_t profile_switch;
 	/**< PMD Event switch profile function. */
 	uintptr_t reserved[4];
-} __rte_cache_aligned;
+};
 
 extern struct rte_event_fp_ops rte_event_fp_ops[RTE_EVENT_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v7 11/39] ethdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/ethdev/ethdev_driver.h   |  8 ++++----
 lib/ethdev/rte_ethdev.h      | 16 ++++++++--------
 lib/ethdev/rte_ethdev_core.h |  4 ++--
 lib/ethdev/rte_flow_driver.h |  4 ++--
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 0e4c1f0..bab3a8c 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -48,7 +48,7 @@ struct rte_eth_rxtx_callback {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_eth_dev {
+struct __rte_cache_aligned rte_eth_dev {
 	eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function */
 	eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function */
 
@@ -93,7 +93,7 @@ struct rte_eth_dev {
 
 	enum rte_eth_dev_state state; /**< Flag indicating the port state */
 	void *security_ctx; /**< Context for security ops */
-} __rte_cache_aligned;
+};
 
 struct rte_eth_dev_sriov;
 struct rte_eth_dev_owner;
@@ -104,7 +104,7 @@ struct rte_eth_dev {
  * device. This structure is safe to place in shared memory to be common
  * among different processes in a multi-process configuration.
  */
-struct rte_eth_dev_data {
+struct __rte_cache_aligned rte_eth_dev_data {
 	char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */
 
 	void **rx_queues; /**< Array of pointers to Rx queues */
@@ -190,7 +190,7 @@ struct rte_eth_dev_data {
 	uint16_t backer_port_id;
 
 	pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h
index ed27360..2a92953 100644
--- a/lib/ethdev/rte_ethdev.h
+++ b/lib/ethdev/rte_ethdev.h
@@ -333,12 +333,12 @@ struct rte_eth_stats {
  * A structure used to retrieve link-level information of an Ethernet port.
  */
 __extension__
-struct rte_eth_link {
+struct __rte_aligned(8) rte_eth_link {
 	uint32_t link_speed;        /**< RTE_ETH_SPEED_NUM_ */
 	uint16_t link_duplex  : 1;  /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */
 	uint16_t link_autoneg : 1;  /**< RTE_ETH_LINK_[AUTONEG/FIXED] */
 	uint16_t link_status  : 1;  /**< RTE_ETH_LINK_[DOWN/UP] */
-} __rte_aligned(8);      /**< aligned for atomic64 read/write */
+};      /**< aligned for atomic64 read/write */
 
 /**@{@name Link negotiation
  * Constants used in link management.
@@ -1836,7 +1836,7 @@ struct rte_eth_dev_info {
  * Ethernet device Rx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_rxq_info {
+struct __rte_cache_min_aligned rte_eth_rxq_info {
 	struct rte_mempool *mp;     /**< mempool used by that queue. */
 	struct rte_eth_rxconf conf; /**< queue config parameters. */
 	uint8_t scattered_rx;       /**< scattered packets Rx supported. */
@@ -1850,17 +1850,17 @@ struct rte_eth_rxq_info {
 	 * Value 0 means that the threshold monitoring is disabled.
 	 */
 	uint8_t avail_thresh;
-} __rte_cache_min_aligned;
+};
 
 /**
  * Ethernet device Tx queue information structure.
  * Used to retrieve information about configured queue.
  */
-struct rte_eth_txq_info {
+struct __rte_cache_min_aligned rte_eth_txq_info {
 	struct rte_eth_txconf conf; /**< queue config parameters. */
 	uint16_t nb_desc;           /**< configured number of TXDs. */
 	uint8_t queue_state;        /**< one of RTE_ETH_QUEUE_STATE_*. */
-} __rte_cache_min_aligned;
+};
 
 /**
  * @warning
@@ -1870,7 +1870,7 @@ struct rte_eth_txq_info {
  * Used to retrieve Rx queue information when Tx queue reusing mbufs and moving
  * them into Rx mbuf ring.
  */
-struct rte_eth_recycle_rxq_info {
+struct __rte_cache_min_aligned rte_eth_recycle_rxq_info {
 	struct rte_mbuf **mbuf_ring; /**< mbuf ring of Rx queue. */
 	struct rte_mempool *mp;     /**< mempool of Rx queue. */
 	uint16_t *refill_head;      /**< head of Rx queue refilling mbufs. */
@@ -1884,7 +1884,7 @@ struct rte_eth_recycle_rxq_info {
 	 * Value 0 means that PMD drivers have no requirement for this.
 	 */
 	uint16_t refill_requirement;
-} __rte_cache_min_aligned;
+};
 
 /* Generic Burst mode flag definition, values can be ORed. */
 
diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
index a18f242..e55fb42 100644
--- a/lib/ethdev/rte_ethdev_core.h
+++ b/lib/ethdev/rte_ethdev_core.h
@@ -84,7 +84,7 @@ struct rte_ethdev_qdata {
  * On 64-bit systems contents of this structure occupy exactly two 64B lines.
  * On 32-bit systems contents of this structure fits into one 64B line.
  */
-struct rte_eth_fp_ops {
+struct __rte_cache_aligned rte_eth_fp_ops {
 
 	/**@{*/
 	/**
@@ -124,7 +124,7 @@ struct rte_eth_fp_ops {
 	uintptr_t reserved2[1];
 	/**@}*/
 
-} __rte_cache_aligned;
+};
 
 extern struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
 
diff --git a/lib/ethdev/rte_flow_driver.h b/lib/ethdev/rte_flow_driver.h
index 3c702e3..506d126 100644
--- a/lib/ethdev/rte_flow_driver.h
+++ b/lib/ethdev/rte_flow_driver.h
@@ -432,7 +432,7 @@ typedef int (*rte_flow_async_action_list_handle_query_update_t)(
  *
  * Fast path async flow functions are held in a flat array, one entry per ethdev.
  */
-struct rte_flow_fp_ops {
+struct __rte_cache_aligned rte_flow_fp_ops {
 	rte_flow_async_create_t async_create;
 	rte_flow_async_create_by_index_t async_create_by_index;
 	rte_flow_async_actions_update_t async_actions_update;
@@ -447,7 +447,7 @@ struct rte_flow_fp_ops {
 	rte_flow_async_action_list_handle_create_t async_action_list_handle_create;
 	rte_flow_async_action_list_handle_destroy_t async_action_list_handle_destroy;
 	rte_flow_async_action_list_handle_query_update_t async_action_list_handle_query_update;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v7 12/39] dmadev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Chengwen Feng <fengchengwen@huawei.com>
---
 lib/dmadev/rte_dmadev_core.h | 4 ++--
 lib/dmadev/rte_dmadev_pmd.h  | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
index e8239c2..29f5251 100644
--- a/lib/dmadev/rte_dmadev_core.h
+++ b/lib/dmadev/rte_dmadev_core.h
@@ -61,7 +61,7 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,
  * The 'dev_private' field was placed in the first cache line to optimize
  * performance because the PMD mainly depends on this field.
  */
-struct rte_dma_fp_object {
+struct __rte_cache_aligned rte_dma_fp_object {
 	/** PMD-specific private data. The driver should copy
 	 * rte_dma_dev.data->dev_private to this field during initialization.
 	 */
@@ -73,7 +73,7 @@ struct rte_dma_fp_object {
 	rte_dma_completed_t        completed;
 	rte_dma_completed_status_t completed_status;
 	rte_dma_burst_capacity_t   burst_capacity;
-} __rte_cache_aligned;
+};
 
 extern struct rte_dma_fp_object *rte_dma_fp_objs;
 
diff --git a/lib/dmadev/rte_dmadev_pmd.h b/lib/dmadev/rte_dmadev_pmd.h
index 7f354f6..5872908 100644
--- a/lib/dmadev/rte_dmadev_pmd.h
+++ b/lib/dmadev/rte_dmadev_pmd.h
@@ -94,7 +94,7 @@ struct rte_dma_dev_ops {
  *
  * @see struct rte_dma_dev::data
  */
-struct rte_dma_dev_data {
+struct __rte_cache_aligned rte_dma_dev_data {
 	char dev_name[RTE_DEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	int16_t dev_id; /**< Device [external] identifier. */
 	int16_t numa_node; /**< Local NUMA memory ID. -1 if unknown. */
@@ -103,7 +103,7 @@ struct rte_dma_dev_data {
 	__extension__
 	uint8_t dev_started : 1; /**< Device state: STARTED(1)/STOPPED(0). */
 	uint64_t reserved[2]; /**< Reserved for future fields */
-} __rte_cache_aligned;
+};
 
 /**
  * Possible states of a DMA device.
@@ -122,7 +122,7 @@ enum rte_dma_dev_state {
  * @internal
  * The generic data structure associated with each DMA device.
  */
-struct rte_dma_dev {
+struct __rte_cache_aligned rte_dma_dev {
 	/** Device info which supplied during device initialization. */
 	struct rte_device *device;
 	struct rte_dma_dev_data *data; /**< Pointer to shared device data. */
@@ -132,7 +132,7 @@ struct rte_dma_dev {
 	const struct rte_dma_dev_ops *dev_ops;
 	enum rte_dma_dev_state state; /**< Flag indicating the device state. */
 	uint64_t reserved[2]; /**< Reserved for future fields. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v7 13/39] distributor: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/distributor/distributor_private.h | 34 ++++++++++++++++++----------------
 lib/distributor/rte_distributor.c     |  5 +++--
 2 files changed, 21 insertions(+), 18 deletions(-)

diff --git a/lib/distributor/distributor_private.h b/lib/distributor/distributor_private.h
index dfeb9b5..07c2c05 100644
--- a/lib/distributor/distributor_private.h
+++ b/lib/distributor/distributor_private.h
@@ -5,6 +5,8 @@
 #ifndef _DIST_PRIV_H_
 #define _DIST_PRIV_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE distributor
@@ -51,10 +53,10 @@
  * the next cache line to worker 0, we pad this out to three cache lines.
  * Only 64-bits of the memory is actually used though.
  */
-union rte_distributor_buffer_single {
+union __rte_cache_aligned rte_distributor_buffer_single {
 	volatile RTE_ATOMIC(int64_t) bufptr64;
 	char pad[RTE_CACHE_LINE_SIZE*3];
-} __rte_cache_aligned;
+};
 
 /*
  * Transfer up to 8 mbufs at a time to/from workers, and
@@ -62,12 +64,12 @@
  */
 #define RTE_DIST_BURST_SIZE 8
 
-struct rte_distributor_backlog {
+struct __rte_cache_aligned rte_distributor_backlog {
 	unsigned int start;
 	unsigned int count;
-	int64_t pkts[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pkts[RTE_DIST_BURST_SIZE];
 	uint16_t *tags; /* will point to second cacheline of inflights */
-} __rte_cache_aligned;
+};
 
 
 struct rte_distributor_returned_pkts {
@@ -113,17 +115,17 @@ enum rte_distributor_match_function {
  * There is a separate cacheline for returns in the burst API.
  */
 struct rte_distributor_buffer {
-	volatile RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= outgoing to worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) bufptr64[RTE_DIST_BURST_SIZE];
+		/* <= outgoing to worker */
 
-	int64_t pad1 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad1;    /* <= one cache line  */
 
-	volatile RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE]
-		__rte_cache_aligned; /* <= incoming from worker */
+	volatile alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(int64_t) retptr64[RTE_DIST_BURST_SIZE];
+		/* <= incoming from worker */
 
-	int64_t pad2 __rte_cache_aligned;    /* <= one cache line  */
+	alignas(RTE_CACHE_LINE_SIZE) int64_t pad2;    /* <= one cache line  */
 
-	int count __rte_cache_aligned;       /* <= number of current mbufs */
+	alignas(RTE_CACHE_LINE_SIZE) int count;       /* <= number of current mbufs */
 };
 
 struct rte_distributor {
@@ -138,11 +140,11 @@ struct rte_distributor {
 	 * on the worker core. Second cache line are the backlog
 	 * that are going to go to the worker core.
 	 */
-	uint16_t in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t
+		in_flight_tags[RTE_DISTRIB_MAX_WORKERS][RTE_DIST_BURST_SIZE*2];
 
-	struct rte_distributor_backlog backlog[RTE_DISTRIB_MAX_WORKERS]
-			__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_distributor_backlog
+		backlog[RTE_DISTRIB_MAX_WORKERS];
 
 	struct rte_distributor_buffer bufs[RTE_DISTRIB_MAX_WORKERS];
 
diff --git a/lib/distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
index e842dc9..e58727c 100644
--- a/lib/distributor/rte_distributor.c
+++ b/lib/distributor/rte_distributor.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/queue.h>
@@ -447,7 +448,7 @@
 	struct rte_mbuf *next_mb = NULL;
 	int64_t next_value = 0;
 	uint16_t new_tag = 0;
-	uint16_t flows[RTE_DIST_BURST_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t flows[RTE_DIST_BURST_SIZE];
 	unsigned int i, j, w, wid, matching_required;
 
 	if (d->alg_type == RTE_DIST_ALG_SINGLE) {
@@ -477,7 +478,7 @@
 		return 0;
 
 	while (next_idx < num_mbufs) {
-		uint16_t matches[RTE_DIST_BURST_SIZE] __rte_aligned(128);
+		alignas(128) uint16_t matches[RTE_DIST_BURST_SIZE];
 		unsigned int pkts;
 
 		if ((num_mbufs - next_idx) < RTE_DIST_BURST_SIZE)
-- 
1.8.3.1

[PATCH v7 14/39] acl: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/acl/acl_run.h         | 4 ++--
 lib/acl/acl_run_altivec.h | 6 ++++--
 lib/acl/acl_run_neon.h    | 6 ++++--
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/lib/acl/acl_run.h b/lib/acl/acl_run.h
index 7d215de..7f09241 100644
--- a/lib/acl/acl_run.h
+++ b/lib/acl/acl_run.h
@@ -55,12 +55,12 @@ struct acl_flow_data {
  * Structure to maintain running results for
  * a single packet (up to 4 tries).
  */
-struct completion {
+struct __rte_aligned(XMM_SIZE) completion {
 	uint32_t *results;                          /* running results. */
 	int32_t   priority[RTE_ACL_MAX_CATEGORIES]; /* running priorities. */
 	uint32_t  count;                            /* num of remaining tries */
 	/* true for allocated struct */
-} __rte_aligned(XMM_SIZE);
+};
 
 /*
  * One parms structure for each slot in the search engine.
diff --git a/lib/acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
index 3c30466..2d398ff 100644
--- a/lib/acl/acl_run_altivec.h
+++ b/lib/acl/acl_run_altivec.h
@@ -3,15 +3,17 @@
  * Copyright (C) IBM Corporation 2016.
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _altivec_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _altivec_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t xmm_ones_16;
 	rte_xmm_t range_base;
-} altivec_acl_const __rte_cache_aligned = {
+} altivec_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
diff --git a/lib/acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
index 69d1b6d..63074f8 100644
--- a/lib/acl/acl_run_neon.h
+++ b/lib/acl/acl_run_neon.h
@@ -2,14 +2,16 @@
  * Copyright(c) 2015 Cavium, Inc
  */
 
+#include <stdalign.h>
+
 #include "acl_run.h"
 #include "acl_vect.h"
 
-struct _neon_acl_const {
+alignas(RTE_CACHE_LINE_SIZE) struct _neon_acl_const {
 	rte_xmm_t xmm_shuffle_input;
 	rte_xmm_t xmm_index_mask;
 	rte_xmm_t range_base;
-} neon_acl_const __rte_cache_aligned = {
+} neon_acl_const = {
 	{
 		.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
 	},
-- 
1.8.3.1

[PATCH v7 15/39] vhost: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
 lib/vhost/vhost.h        | 8 ++++----
 lib/vhost/vhost_crypto.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index 08e4ab9..cd3fa55 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -272,7 +272,7 @@ struct vhost_async {
 /**
  * Structure contains variables relevant to RX/TX virtqueues.
  */
-struct vhost_virtqueue {
+struct __rte_cache_aligned vhost_virtqueue {
 	union {
 		struct vring_desc	*desc;
 		struct vring_packed_desc   *desc_packed;
@@ -351,7 +351,7 @@ struct vhost_virtqueue {
 	struct virtqueue_stats	stats;
 
 	RTE_ATOMIC(bool) irq_pending;
-} __rte_cache_aligned;
+};
 
 /* Virtio device status as per Virtio specification */
 #define VIRTIO_DEVICE_STATUS_RESET		0x00
@@ -479,7 +479,7 @@ struct inflight_mem_info {
  * Device structure contains all configuration information relating
  * to the device.
  */
-struct virtio_net {
+struct __rte_cache_aligned virtio_net {
 	/* Frontend (QEMU) memory and memory region information */
 	struct rte_vhost_memory	*mem;
 	uint64_t		features;
@@ -538,7 +538,7 @@ struct virtio_net {
 	struct rte_vhost_user_extern_ops extern_ops;
 
 	struct vhost_backend_ops *backend_ops;
-} __rte_cache_aligned;
+};
 
 static inline void
 vq_assert_lock__(struct virtio_net *dev, struct vhost_virtqueue *vq, const char *func)
diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
index 75f1a9a..7caf6d9 100644
--- a/lib/vhost/vhost_crypto.c
+++ b/lib/vhost/vhost_crypto.c
@@ -191,7 +191,7 @@ static int get_iv_len(enum rte_crypto_cipher_algorithm algo)
  * one DPDK crypto device that deals with all crypto workloads. It is declared
  * here and defined in vhost_crypto.c
  */
-struct vhost_crypto {
+struct __rte_cache_aligned vhost_crypto {
 	/** Used to lookup DPDK Cryptodev Session based on VIRTIO crypto
 	 *  session ID.
 	 */
@@ -214,7 +214,7 @@ struct vhost_crypto {
 	struct virtio_net *dev;
 
 	uint8_t option;
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_writeback_data {
 	uint8_t *src;
-- 
1.8.3.1

[PATCH v7 16/39] timer: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/timer/rte_timer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/timer/rte_timer.c b/lib/timer/rte_timer.c
index 53ed221..bb8b6a6 100644
--- a/lib/timer/rte_timer.c
+++ b/lib/timer/rte_timer.c
@@ -24,7 +24,7 @@
 /**
  * Per-lcore info for timers.
  */
-struct priv_timer {
+struct __rte_cache_aligned priv_timer {
 	struct rte_timer pending_head;  /**< dummy timer instance to head up list */
 	rte_spinlock_t list_lock;       /**< lock to protect list access */
 
@@ -44,7 +44,7 @@ struct priv_timer {
 	/** per-lcore statistics */
 	struct rte_timer_debug_stats stats;
 #endif
-} __rte_cache_aligned;
+};
 
 #define FL_ALLOCATED	(1 << 0)
 struct rte_timer_data {
-- 
1.8.3.1

[PATCH v7 17/39] table: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/table/rte_swx_table_learner.c | 4 ++--
 lib/table/rte_table_acl.c         | 3 ++-
 lib/table/rte_table_array.c       | 7 ++++---
 lib/table/rte_table_hash_cuckoo.c | 4 +++-
 lib/table/rte_table_hash_ext.c    | 3 ++-
 lib/table/rte_table_hash_key16.c  | 4 +++-
 lib/table/rte_table_hash_key32.c  | 4 +++-
 lib/table/rte_table_hash_key8.c   | 4 +++-
 lib/table/rte_table_hash_lru.c    | 3 ++-
 lib/table/rte_table_lpm.c         | 3 ++-
 lib/table/rte_table_lpm_ipv6.c    | 3 ++-
 11 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/lib/table/rte_swx_table_learner.c b/lib/table/rte_swx_table_learner.c
index 2b5e6bd..55a3645 100644
--- a/lib/table/rte_swx_table_learner.c
+++ b/lib/table/rte_swx_table_learner.c
@@ -145,13 +145,13 @@ struct table_params {
 	size_t total_size;
 };
 
-struct table {
+struct __rte_cache_aligned table {
 	/* Table parameters. */
 	struct table_params params;
 
 	/* Table buckets. */
 	uint8_t buckets[];
-} __rte_cache_aligned;
+};
 
 /* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
  * significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
diff --git a/lib/table/rte_table_acl.c b/lib/table/rte_table_acl.c
index 83411d2..2764cda 100644
--- a/lib/table/rte_table_acl.c
+++ b/lib/table/rte_table_acl.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_acl {
 	uint8_t *acl_rule_memory; /* Memory to store the rules */
 
 	/* Memory to store the action table and stack of free entries */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 
diff --git a/lib/table/rte_table_array.c b/lib/table/rte_table_array.c
index 80bc2a7..31a17d5 100644
--- a/lib/table/rte_table_array.c
+++ b/lib/table/rte_table_array.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -27,7 +28,7 @@
 
 #endif
 
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
 	struct rte_table_stats stats;
 
 	/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
 	uint32_t entry_pos_mask;
 
 	/* Internal table */
-	uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
 
 static void *
 rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
diff --git a/lib/table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
index 0f4900c..d3b60f3 100644
--- a/lib/table/rte_table_hash_cuckoo.c
+++ b/lib/table/rte_table_hash_cuckoo.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -42,7 +44,7 @@ struct rte_table_hash {
 	struct rte_hash *h_table;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
index 2148d83..61e3c79 100644
--- a/lib/table/rte_table_hash_ext.c
+++ b/lib/table/rte_table_hash_ext.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -99,7 +100,7 @@ struct rte_table_hash {
 	uint32_t *bkt_ext_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
index 7734aef..2af34a5 100644
--- a/lib/table/rte_table_hash_key16.c
+++ b/lib/table/rte_table_hash_key16.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
index fcb4348..06e5cf4 100644
--- a/lib/table/rte_table_hash_key32.c
+++ b/lib/table/rte_table_hash_key32.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -83,7 +85,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
index bbe6562..2ab8e1b 100644
--- a/lib/table/rte_table_hash_key8.c
+++ b/lib/table/rte_table_hash_key8.c
@@ -1,6 +1,8 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2010-2017 Intel Corporation
  */
+
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -79,7 +81,7 @@ struct rte_table_hash {
 	uint32_t *stack;
 
 	/* Lookup table */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
index cb4f329..8604a64 100644
--- a/lib/table/rte_table_hash_lru.c
+++ b/lib/table/rte_table_hash_lru.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -76,7 +77,7 @@ struct rte_table_hash {
 	uint32_t *key_stack;
 
 	/* Table memory */
-	uint8_t memory[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
 };
 
 static int
diff --git a/lib/table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
index b9cff25..978d7e5 100644
--- a/lib/table/rte_table_lpm.c
+++ b/lib/table/rte_table_lpm.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -47,7 +48,7 @@ struct rte_table_lpm {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
diff --git a/lib/table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
index e4e823a..1d54f83 100644
--- a/lib/table/rte_table_lpm_ipv6.c
+++ b/lib/table/rte_table_lpm_ipv6.c
@@ -2,6 +2,7 @@
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <string.h>
 #include <stdio.h>
 
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
 
 	/* Next Hop Table (NHT) */
 	uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
-	uint8_t nht[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
 };
 
 static void *
-- 
1.8.3.1

[PATCH v7 18/39] reorder: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/reorder/rte_reorder.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
index c080b2c..ae97e1a 100644
--- a/lib/reorder/rte_reorder.c
+++ b/lib/reorder/rte_reorder.c
@@ -37,16 +37,16 @@
 int rte_reorder_seqn_dynfield_offset = -1;
 
 /* A generic circular buffer */
-struct cir_buffer {
+struct __rte_cache_aligned cir_buffer {
 	unsigned int size;   /**< Number of entries that can be stored */
 	unsigned int mask;   /**< [buffer_size - 1]: used for wrap-around */
 	unsigned int head;   /**< insertion point in buffer */
 	unsigned int tail;   /**< extraction point in buffer */
 	struct rte_mbuf **entries;
-} __rte_cache_aligned;
+};
 
 /* The reorder buffer data structure itself */
-struct rte_reorder_buffer {
+struct __rte_cache_aligned rte_reorder_buffer {
 	char name[RTE_REORDER_NAMESIZE];
 	uint32_t min_seqn;  /**< Lowest seq. number that can be in the buffer */
 	unsigned int memsize; /**< memory area size of reorder buffer */
@@ -54,7 +54,7 @@ struct rte_reorder_buffer {
 
 	struct cir_buffer ready_buf; /**< temp buffer for dequeued entries */
 	struct cir_buffer order_buf; /**< buffer used to reorder entries */
-} __rte_cache_aligned;
+};
 
 static void
 rte_reorder_free_mbufs(struct rte_reorder_buffer *b);
-- 
1.8.3.1

[PATCH v7 19/39] regexdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/regexdev/rte_regexdev_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
index 15ba712..32eef6e 100644
--- a/lib/regexdev/rte_regexdev_core.h
+++ b/lib/regexdev/rte_regexdev_core.h
@@ -144,13 +144,13 @@ enum rte_regexdev_state {
  * This structure is safe to place in shared memory to be common among different
  * processes in a multi-process configuration.
  */
-struct rte_regexdev_data {
+struct __rte_cache_aligned rte_regexdev_data {
 	void *dev_private; /**< PMD-specific private data. */
 	char dev_name[RTE_REGEXDEV_NAME_MAX_LEN]; /**< Unique identifier name */
 	uint16_t dev_id; /**< Device [external]  identifier. */
 	struct rte_regexdev_config dev_conf; /**< RegEx configuration. */
 	uint8_t dev_started : 1; /**< Device started to work. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
@@ -162,7 +162,7 @@ struct rte_regexdev_data {
  * memory. This split allows the function pointer and driver data to be per-
  * process, while the actual configuration data for the device is shared.
  */
-struct rte_regexdev {
+struct __rte_cache_aligned rte_regexdev {
 	regexdev_enqueue_t enqueue;
 	regexdev_dequeue_t dequeue;
 	const struct rte_regexdev_ops *dev_ops;
@@ -170,7 +170,7 @@ struct rte_regexdev {
 	struct rte_device *device; /**< Backing device */
 	enum rte_regexdev_state state; /**< The device state. */
 	struct rte_regexdev_data *data;  /**< Pointer to device data. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v7 20/39] rcu: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rcu/rte_rcu_qsbr.h | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
index 7022b5a..5f180fb 100644
--- a/lib/rcu/rte_rcu_qsbr.h
+++ b/lib/rcu/rte_rcu_qsbr.h
@@ -21,6 +21,8 @@
  * entered quiescent state.
  */
 
+#include <stdalign.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -69,7 +71,7 @@
 #define RTE_QSBR_THRID_INVALID 0xffffffff
 
 /* Worker thread counter */
-struct rte_rcu_qsbr_cnt {
+struct __rte_cache_aligned rte_rcu_qsbr_cnt {
 	RTE_ATOMIC(uint64_t) cnt;
 	/**< Quiescent state counter. Value 0 indicates the thread is offline
 	 *   64b counter is used to avoid adding more code to address
@@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt {
 	 */
 	RTE_ATOMIC(uint32_t) lock_cnt;
 	/**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */
-} __rte_cache_aligned;
+};
 
 #define __RTE_QSBR_CNT_THR_OFFLINE 0
 #define __RTE_QSBR_CNT_INIT 1
@@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt {
  * 1) Quiescent state counter array
  * 2) Register thread ID array
  */
-struct rte_rcu_qsbr {
-	RTE_ATOMIC(uint64_t) token __rte_cache_aligned;
+struct __rte_cache_aligned rte_rcu_qsbr {
+	alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token;
 	/**< Counter to allow for multiple concurrent quiescent state queries */
 	RTE_ATOMIC(uint64_t) acked_token;
 	/**< Least token acked by all the threads in the last call to
 	 *   rte_rcu_qsbr_check API.
 	 */
 
-	uint32_t num_elems __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems;
 	/**< Number of elements in the thread ID array */
 	RTE_ATOMIC(uint32_t) num_threads;
 	/**< Number of threads currently using this QS variable */
 	uint32_t max_threads;
 	/**< Maximum number of threads using this QS variable */
 
-	struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0];
 	/**< Quiescent state counter array of 'max_threads' elements */
 
 	/**< Registered thread IDs are stored in a bitmap array,
 	 *   after the quiescent state counter array.
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Call back function called to free the resources.
-- 
1.8.3.1

[PATCH v7 21/39] power: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/power/power_acpi_cpufreq.c       | 4 ++--
 lib/power/power_amd_pstate_cpufreq.c | 4 ++--
 lib/power/power_cppc_cpufreq.c       | 4 ++--
 lib/power/power_intel_uncore.c       | 4 ++--
 lib/power/power_pstate_cpufreq.c     | 4 ++--
 lib/power/rte_power_pmd_mgmt.c       | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
index f8d978d..81996e1 100644
--- a/lib/power/power_acpi_cpufreq.c
+++ b/lib/power/power_acpi_cpufreq.c
@@ -41,7 +41,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct acpi_power_info {
+struct __rte_cache_aligned acpi_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -51,7 +51,7 @@ struct acpi_power_info {
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
-} __rte_cache_aligned;
+};
 
 static struct acpi_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
index 028f844..090a0d9 100644
--- a/lib/power/power_amd_pstate_cpufreq.c
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -45,7 +45,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct amd_pstate_power_info {
+struct __rte_cache_aligned amd_pstate_power_info {
 	uint32_t lcore_id;                   /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -58,7 +58,7 @@ struct amd_pstate_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c
index 3ddf39b..32aaacb 100644
--- a/lib/power/power_cppc_cpufreq.c
+++ b/lib/power/power_cppc_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 /**
  * Power info per lcore.
  */
-struct cppc_power_info {
+struct __rte_cache_aligned cppc_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	RTE_ATOMIC(uint32_t) state;          /**< Power in use state */
 	FILE *f;                             /**< FD of scaling_setspeed */
@@ -61,7 +61,7 @@ struct cppc_power_info {
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint32_t nb_freqs;                   /**< number of available freqs */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
-} __rte_cache_aligned;
+};
 
 static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
 
diff --git a/lib/power/power_intel_uncore.c b/lib/power/power_intel_uncore.c
index 3ce8fcc..9c152e4 100644
--- a/lib/power/power_intel_uncore.c
+++ b/lib/power/power_intel_uncore.c
@@ -29,7 +29,7 @@
 		"/sys/devices/system/cpu/intel_uncore_frequency/package_%02u_die_%02u/initial_min_freq_khz"
 
 
-struct uncore_power_info {
+struct __rte_cache_aligned uncore_power_info {
 	unsigned int die;                  /* Core die id */
 	unsigned int pkg;                  /* Package id */
 	uint32_t freqs[MAX_UNCORE_FREQS];  /* Frequency array */
@@ -41,7 +41,7 @@ struct uncore_power_info {
 	uint32_t org_max_freq;             /* Original max freq of uncore */
 	uint32_t init_max_freq;            /* System max uncore freq */
 	uint32_t init_min_freq;            /* System min uncore freq */
-} __rte_cache_aligned;
+};
 
 static struct uncore_power_info uncore_info[RTE_MAX_NUMA_NODES][MAX_NUMA_DIE];
 
diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
index 73138dc..2343121 100644
--- a/lib/power/power_pstate_cpufreq.c
+++ b/lib/power/power_pstate_cpufreq.c
@@ -49,7 +49,7 @@ enum power_state {
 	POWER_UNKNOWN
 };
 
-struct pstate_power_info {
+struct __rte_cache_aligned pstate_power_info {
 	unsigned int lcore_id;               /**< Logical core id */
 	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
 	uint32_t nb_freqs;                   /**< number of available freqs */
@@ -64,7 +64,7 @@ struct pstate_power_info {
 	uint16_t turbo_available;            /**< Turbo Boost available */
 	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
 	uint16_t priority_core;              /**< High Performance core */
-} __rte_cache_aligned;
+};
 
 
 static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index 591fc69..b1c18a5 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -55,7 +55,7 @@ struct queue_list_entry {
 	const struct rte_eth_rxtx_callback *cb;
 };
 
-struct pmd_core_cfg {
+struct __rte_cache_aligned pmd_core_cfg {
 	TAILQ_HEAD(queue_list_head, queue_list_entry) head;
 	/**< List of queues associated with this lcore */
 	size_t n_queues;
@@ -68,7 +68,7 @@ struct pmd_core_cfg {
 	/**< Number of queues ready to enter power optimized state */
 	uint64_t sleep_target;
 	/**< Prevent a queue from triggering sleep multiple times */
-} __rte_cache_aligned;
+};
 static struct pmd_core_cfg lcore_cfgs[RTE_MAX_LCORE];
 
 static inline bool
-- 
1.8.3.1

[PATCH v7 22/39] rawdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/rawdev/rte_rawdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
index 7d5764d..640037b 100644
--- a/lib/rawdev/rte_rawdev.h
+++ b/lib/rawdev/rte_rawdev.h
@@ -279,7 +279,7 @@
  * It is a placeholder for PMD specific data, encapsulating only information
  * related to framework.
  */
-struct rte_rawdev {
+struct __rte_cache_aligned rte_rawdev {
 	/**< Socket ID where memory is allocated */
 	int socket_id;
 	/**< Device ID for this instance */
@@ -300,7 +300,7 @@ struct rte_rawdev {
 	rte_rawdev_obj_t dev_private;
 	/**< Device name */
 	char name[RTE_RAWDEV_NAME_MAX_LEN];
-} __rte_cache_aligned;
+};
 
 /** @internal The pool of rte_rawdev structures. */
 extern struct rte_rawdev *rte_rawdevs;
-- 
1.8.3.1

[PATCH v7 23/39] port: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/port/rte_port_frag.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index 883601a..0940f94 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -34,7 +34,7 @@
 			struct rte_mempool *pool_direct,
 			struct rte_mempool *pool_indirect);
 
-struct rte_port_ring_reader_frag {
+struct __rte_cache_aligned rte_port_ring_reader_frag {
 	struct rte_port_in_stats stats;
 
 	/* Input parameters */
@@ -53,7 +53,7 @@ struct rte_port_ring_reader_frag {
 	uint32_t pos_frags;
 
 	frag_op f_frag;
-} __rte_cache_aligned;
+};
 
 static void *
 rte_port_ring_reader_frag_create(void *params, int socket_id, int is_ipv4)
-- 
1.8.3.1

[PATCH v7 24/39] pdcp: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/pdcp/rte_pdcp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/pdcp/rte_pdcp.h b/lib/pdcp/rte_pdcp.h
index dd8b6e4..f74524f 100644
--- a/lib/pdcp/rte_pdcp.h
+++ b/lib/pdcp/rte_pdcp.h
@@ -49,7 +49,7 @@ typedef uint16_t (*rte_pdcp_post_p_t)(const struct rte_pdcp_entity *entity,
  * A PDCP entity is associated either to the control plane or the user plane
  * depending on which radio bearer it is carrying data for.
  */
-struct rte_pdcp_entity {
+struct __rte_cache_aligned rte_pdcp_entity {
 	/** Entity specific pre-process handle. */
 	rte_pdcp_pre_p_t pre_process;
 	/** Entity specific post-process handle. */
@@ -66,7 +66,7 @@ struct rte_pdcp_entity {
 	 * hold additionally 'max_pkt_cache' number of packets.
 	 */
 	uint32_t max_pkt_cache;
-} __rte_cache_aligned;
+};
 
 /**
  * Callback function type for t-Reordering timer start, set during PDCP entity establish.
-- 
1.8.3.1

[PATCH v7 25/39] node: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/node/node_private.h | 4 ++--
 lib/node/pkt_cls.c      | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/lib/node/node_private.h b/lib/node/node_private.h
index 64843f7..1de7306 100644
--- a/lib/node/node_private.h
+++ b/lib/node/node_private.h
@@ -50,9 +50,9 @@ struct node_mbuf_priv1 {
 /**
  * Node mbuf private area 2.
  */
-struct node_mbuf_priv2 {
+struct __rte_cache_aligned node_mbuf_priv2 {
 	uint64_t priv_data;
-} __rte_cache_aligned;
+};
 
 #define NODE_MBUF_PRIV2_SIZE sizeof(struct node_mbuf_priv2)
 
diff --git a/lib/node/pkt_cls.c b/lib/node/pkt_cls.c
index a8302b8..9d21b7f 100644
--- a/lib/node/pkt_cls.c
+++ b/lib/node/pkt_cls.c
@@ -2,6 +2,8 @@
  * Copyright (C) 2020 Marvell.
  */
 
+#include <stdalign.h>
+
 #include <rte_graph.h>
 #include <rte_graph_worker.h>
 
@@ -9,7 +11,7 @@
 #include "node_private.h"
 
 /* Next node for each ptype, default is '0' is "pkt_drop" */
-static const uint8_t p_nxt[256] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint8_t p_nxt[256] = {
 	[RTE_PTYPE_L3_IPV4] = PKT_CLS_NEXT_IP4_LOOKUP,
 
 	[RTE_PTYPE_L3_IPV4_EXT] = PKT_CLS_NEXT_IP4_LOOKUP,
-- 
1.8.3.1

[PATCH v7 26/39] mldev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/mldev/rte_mldev.h      | 4 ++--
 lib/mldev/rte_mldev_core.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/mldev/rte_mldev.h b/lib/mldev/rte_mldev.h
index 01577bd..634af3d 100644
--- a/lib/mldev/rte_mldev.h
+++ b/lib/mldev/rte_mldev.h
@@ -421,7 +421,7 @@ struct rte_ml_buff_seg {
  * This structure contains data related to performing an ML operation on the buffers using
  * the model specified through model_id.
  */
-struct rte_ml_op {
+struct __rte_cache_aligned rte_ml_op {
 	uint16_t model_id;
 	/**< Model ID to be used for the operation. */
 	uint16_t nb_batches;
@@ -469,7 +469,7 @@ struct rte_ml_op {
 	 * dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-} __rte_cache_aligned;
+};
 
 /* Enqueue/Dequeue operations */
 
diff --git a/lib/mldev/rte_mldev_core.h b/lib/mldev/rte_mldev_core.h
index 2279b1d..b3bd281 100644
--- a/lib/mldev/rte_mldev_core.h
+++ b/lib/mldev/rte_mldev_core.h
@@ -626,7 +626,7 @@ struct rte_ml_dev_data {
  *
  * The data structure associated with each ML device.
  */
-struct rte_ml_dev {
+struct __rte_cache_aligned rte_ml_dev {
 	/** Pointer to PMD enqueue function. */
 	mldev_enqueue_t enqueue_burst;
 
@@ -647,7 +647,7 @@ struct rte_ml_dev {
 
 	/** Flag indicating the device is attached. */
 	__extension__ uint8_t attached : 1;
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v7 27/39] mempool: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/mempool/rte_mempool.h | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index 6fa4d48..23fd5c8 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -34,6 +34,7 @@
  * user cache created with rte_mempool_cache_create().
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <inttypes.h>
@@ -66,7 +67,7 @@
  * captured since they can be calculated from other stats.
  * For example: put_cache_objs = put_objs - put_common_pool_objs.
  */
-struct rte_mempool_debug_stats {
+struct __rte_cache_aligned rte_mempool_debug_stats {
 	uint64_t put_bulk;             /**< Number of puts. */
 	uint64_t put_objs;             /**< Number of objects successfully put. */
 	uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
@@ -80,13 +81,13 @@ struct rte_mempool_debug_stats {
 	uint64_t get_success_blks;     /**< Successful allocation number of contiguous blocks. */
 	uint64_t get_fail_blks;        /**< Failed allocation number of contiguous blocks. */
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 #endif
 
 /**
  * A structure that stores a per-core object cache.
  */
-struct rte_mempool_cache {
+struct __rte_cache_aligned rte_mempool_cache {
 	uint32_t size;	      /**< Size of the cache */
 	uint32_t flushthresh; /**< Threshold before we flush excess elements */
 	uint32_t len;	      /**< Current cache count */
@@ -109,8 +110,8 @@ struct rte_mempool_cache {
 	 * Cache is allocated to this size to allow it to overflow in certain
 	 * cases to avoid needless emptying of cache.
 	 */
-	void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *objs[RTE_MEMPOOL_CACHE_MAX_SIZE * 2];
+};
 
 /**
  * A structure that stores the size of mempool elements.
@@ -218,15 +219,15 @@ struct rte_mempool_memhdr {
  * The structure is cache-line aligned to avoid ABI breakages in
  * a number of cases when something small is added.
  */
-struct rte_mempool_info {
+struct __rte_cache_aligned rte_mempool_info {
 	/** Number of objects in the contiguous block */
 	unsigned int contig_block_size;
-} __rte_cache_aligned;
+};
 
 /**
  * The RTE mempool structure.
  */
-struct rte_mempool {
+struct __rte_cache_aligned rte_mempool {
 	char name[RTE_MEMPOOL_NAMESIZE]; /**< Name of mempool. */
 	union {
 		void *pool_data;         /**< Ring or pool to store objects. */
@@ -268,7 +269,7 @@ struct rte_mempool {
 	 */
 	struct rte_mempool_debug_stats stats[RTE_MAX_LCORE + 1];
 #endif
-}  __rte_cache_aligned;
+};
 
 /** Spreading among memory channels not required. */
 #define RTE_MEMPOOL_F_NO_SPREAD		0x0001
@@ -688,7 +689,7 @@ typedef int (*rte_mempool_get_info_t)(const struct rte_mempool *mp,
 
 
 /** Structure defining mempool operations structure */
-struct rte_mempool_ops {
+struct __rte_cache_aligned rte_mempool_ops {
 	char name[RTE_MEMPOOL_OPS_NAMESIZE]; /**< Name of mempool ops struct. */
 	rte_mempool_alloc_t alloc;       /**< Allocate private data. */
 	rte_mempool_free_t free;         /**< Free the external pool. */
@@ -713,7 +714,7 @@ struct rte_mempool_ops {
 	 * Dequeue a number of contiguous object blocks.
 	 */
 	rte_mempool_dequeue_contig_blocks_t dequeue_contig_blocks;
-} __rte_cache_aligned;
+};
 
 #define RTE_MEMPOOL_MAX_OPS_IDX 16  /**< Max registered ops structs */
 
@@ -726,14 +727,14 @@ struct rte_mempool_ops {
  * any function pointers stored directly in the mempool struct would not be.
  * This results in us simply having "ops_index" in the mempool struct.
  */
-struct rte_mempool_ops_table {
+struct __rte_cache_aligned rte_mempool_ops_table {
 	rte_spinlock_t sl;     /**< Spinlock for add/delete. */
 	uint32_t num_ops;      /**< Number of used ops structs in the table. */
 	/**
 	 * Storage for all possible ops structs.
 	 */
 	struct rte_mempool_ops ops[RTE_MEMPOOL_MAX_OPS_IDX];
-} __rte_cache_aligned;
+};
 
 /** Array of registered ops structs. */
 extern struct rte_mempool_ops_table rte_mempool_ops_table;
-- 
1.8.3.1

[PATCH v7 28/39] member: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/member/rte_member.h        | 8 ++++----
 lib/member/rte_member_ht.h     | 4 ++--
 lib/member/rte_member_sketch.c | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/member/rte_member.h b/lib/member/rte_member.h
index 3278bbb..aec192e 100644
--- a/lib/member/rte_member.h
+++ b/lib/member/rte_member.h
@@ -139,7 +139,7 @@ typedef void (*sketch_delete_fn_t)(const struct rte_member_setsum *ss,
 				   const void *key);
 
 /** @internal setsummary structure. */
-struct rte_member_setsum {
+struct __rte_cache_aligned rte_member_setsum {
 	enum rte_member_setsum_type type; /* Type of the set summary. */
 	uint32_t key_len;		/* Length of key. */
 	uint32_t prim_hash_seed;	/* Primary hash function seed. */
@@ -185,14 +185,14 @@ struct rte_member_setsum {
 #ifdef RTE_ARCH_X86
 	bool use_avx512;
 #endif
-} __rte_cache_aligned;
+};
 
 /**
  * Parameters used when create the set summary table. Currently user can
  * specify two types of setsummary: HT based and vBF. For HT based, user can
  * specify cache or non-cache mode. Here is a table to describe some differences
  */
-struct rte_member_parameters {
+struct __rte_cache_aligned rte_member_parameters {
 	const char *name;			/**< Name of the hash. */
 
 	/**
@@ -326,7 +326,7 @@ struct rte_member_parameters {
 	uint32_t extra_flag;
 
 	int socket_id;			/**< NUMA Socket ID for memory. */
-} __rte_cache_aligned;
+};
 
 /**
  * Find an existing set-summary and return a pointer to it.
diff --git a/lib/member/rte_member_ht.h b/lib/member/rte_member_ht.h
index 9e24ccd..c9673e3 100644
--- a/lib/member/rte_member_ht.h
+++ b/lib/member/rte_member_ht.h
@@ -15,10 +15,10 @@
 typedef uint16_t member_sig_t;			/* signature size is 16 bit */
 
 /* The bucket struct for ht setsum */
-struct member_ht_bucket {
+struct __rte_cache_aligned member_ht_bucket {
 	member_sig_t sigs[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte signature */
 	member_set_t sets[RTE_MEMBER_BUCKET_ENTRIES];	/* 2-byte set */
-} __rte_cache_aligned;
+};
 
 int
 rte_member_create_ht(struct rte_member_setsum *ss,
diff --git a/lib/member/rte_member_sketch.c b/lib/member/rte_member_sketch.c
index e006e83..15af678 100644
--- a/lib/member/rte_member_sketch.c
+++ b/lib/member/rte_member_sketch.c
@@ -23,7 +23,7 @@
 #include "rte_member_sketch_avx512.h"
 #endif /* CC_AVX512_SUPPORT */
 
-struct sketch_runtime {
+struct __rte_cache_aligned sketch_runtime {
 	uint64_t pkt_cnt;
 	uint32_t until_next;
 	int converged;
@@ -31,7 +31,7 @@ struct sketch_runtime {
 	struct node *report_array;
 	void *key_slots;
 	struct rte_ring *free_key_slots;
-} __rte_cache_aligned;
+};
 
 /*
  * Geometric sampling to calculate how many packets needs to be
-- 
1.8.3.1

[PATCH v7 29/39] lpm: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/lpm/rte_lpm.h  | 5 +++--
 lib/lpm/rte_lpm6.c | 8 ++++----
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index f57977b..f311fd9 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -11,6 +11,7 @@
  * RTE Longest Prefix Match (LPM)
  */
 
+#include <stdalign.h>
 #include <errno.h>
 #include <stdint.h>
 
@@ -118,8 +119,8 @@ struct rte_lpm_config {
 /** @internal LPM structure. */
 struct rte_lpm {
 	/* LPM Tables. */
-	struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm_tbl_entry tbl24[RTE_LPM_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 	struct rte_lpm_tbl_entry *tbl8; /**< LPM tbl8 table. */
 };
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 271bc48..ed5970c 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -98,16 +98,16 @@ struct rte_lpm6 {
 
 	/* LPM Tables. */
 	struct rte_hash *rules_tbl; /**< LPM rules. */
-	struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES]
-			__rte_cache_aligned; /**< LPM tbl24 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl24[RTE_LPM6_TBL24_NUM_ENTRIES];
+			/**< LPM tbl24 table. */
 
 	uint32_t *tbl8_pool; /**< pool of indexes of free tbl8s */
 	uint32_t tbl8_pool_pos; /**< current position in the tbl8 pool */
 
 	struct rte_lpm_tbl8_hdr *tbl8_hdrs; /* array of tbl8 headers */
 
-	struct rte_lpm6_tbl_entry tbl8[0]
-			__rte_cache_aligned; /**< LPM tbl8 table. */
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_lpm6_tbl_entry tbl8[0];
+			/**< LPM tbl8 table. */
 };
 
 /*
-- 
1.8.3.1

[PATCH v7 30/39] ipsec: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/ipsec/rte_ipsec.h | 4 ++--
 lib/ipsec/sa.h        | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ipsec/rte_ipsec.h b/lib/ipsec/rte_ipsec.h
index 44cecab..f15f6f2 100644
--- a/lib/ipsec/rte_ipsec.h
+++ b/lib/ipsec/rte_ipsec.h
@@ -55,7 +55,7 @@ struct rte_ipsec_sa_pkt_func {
  * - pointer to security/crypto session, plus other related data
  * - session/device specific functions to prepare/process IPsec packets.
  */
-struct rte_ipsec_session {
+struct __rte_cache_aligned rte_ipsec_session {
 	/**
 	 * SA that session belongs to.
 	 * Note that multiple sessions can belong to the same SA.
@@ -77,7 +77,7 @@ struct rte_ipsec_session {
 	};
 	/** functions to prepare/process IPsec packets */
 	struct rte_ipsec_sa_pkt_func pkt_func;
-} __rte_cache_aligned;
+};
 
 /**
  * Checks that inside given rte_ipsec_session crypto/security fields
diff --git a/lib/ipsec/sa.h b/lib/ipsec/sa.h
index 4b30bea..2560d33 100644
--- a/lib/ipsec/sa.h
+++ b/lib/ipsec/sa.h
@@ -75,7 +75,7 @@ enum sa_algo_type	{
 	ALGO_TYPE_MAX
 };
 
-struct rte_ipsec_sa {
+struct __rte_cache_aligned rte_ipsec_sa {
 
 	uint64_t type;     /* type of given SA */
 	uint64_t udata;    /* user defined */
@@ -141,7 +141,7 @@ struct rte_ipsec_sa {
 		} errors;
 	} statistics;
 
-} __rte_cache_aligned;
+};
 
 int
 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
-- 
1.8.3.1

[PATCH v7 31/39] jobstats: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/jobstats/rte_jobstats.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/jobstats/rte_jobstats.h b/lib/jobstats/rte_jobstats.h
index 45b460e..bdd85fe 100644
--- a/lib/jobstats/rte_jobstats.h
+++ b/lib/jobstats/rte_jobstats.h
@@ -32,7 +32,7 @@
 typedef void (*rte_job_update_period_cb_t)(struct rte_jobstats *job,
 		int64_t job_result);
 
-struct rte_jobstats {
+struct __rte_cache_aligned rte_jobstats {
 	uint64_t period;
 	/**< Estimated period of execution. */
 
@@ -65,9 +65,9 @@ struct rte_jobstats {
 
 	struct rte_jobstats_context *context;
 	/**< Job stats context object that is executing this job. */
-} __rte_cache_aligned;
+};
 
-struct rte_jobstats_context {
+struct __rte_cache_aligned rte_jobstats_context {
 	/** Variable holding time at different points:
 	 * -# loop start time if loop was started but no job executed yet.
 	 * -# job start time if job is currently executing.
@@ -111,7 +111,7 @@ struct rte_jobstats_context {
 
 	uint64_t loop_cnt;
 	/**< Total count of executed loops with at least one executed job. */
-} __rte_cache_aligned;
+};
 
 /**
  * Initialize given context object with default values.
-- 
1.8.3.1

[PATCH v7 32/39] bpf: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/bpf/bpf_pkt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
index 793a75d..aaca935 100644
--- a/lib/bpf/bpf_pkt.c
+++ b/lib/bpf/bpf_pkt.c
@@ -23,7 +23,7 @@
  * information about installed BPF rx/tx callback
  */
 
-struct bpf_eth_cbi {
+struct __rte_cache_aligned bpf_eth_cbi {
 	/* used by both data & control path */
 	RTE_ATOMIC(uint32_t) use;    /*usage counter */
 	const struct rte_eth_rxtx_callback *cb;  /* callback handle */
@@ -33,7 +33,7 @@ struct bpf_eth_cbi {
 	LIST_ENTRY(bpf_eth_cbi) link;
 	uint16_t port;
 	uint16_t queue;
-} __rte_cache_aligned;
+};
 
 /*
  * Odd number means that callback is used by datapath.
-- 
1.8.3.1

[PATCH v7 33/39] compressdev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/compressdev/rte_comp.h                 | 4 ++--
 lib/compressdev/rte_compressdev_internal.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
index 3606ebf..830a240 100644
--- a/lib/compressdev/rte_comp.h
+++ b/lib/compressdev/rte_comp.h
@@ -356,7 +356,7 @@ struct rte_comp_xform {
  * Comp operations are enqueued and dequeued in comp PMDs using the
  * rte_compressdev_enqueue_burst() / rte_compressdev_dequeue_burst() APIs
  */
-struct rte_comp_op {
+struct __rte_cache_aligned rte_comp_op {
 	enum rte_comp_op_type op_type;
 	union {
 		void *private_xform;
@@ -478,7 +478,7 @@ struct rte_comp_op {
 	 * will be set to RTE_COMP_OP_STATUS_SUCCESS after operation
 	 * is successfully processed by a PMD
 	 */
-} __rte_cache_aligned;
+};
 
 /**
  * Creates an operation pool
diff --git a/lib/compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
index 0bc8c87..67f8b51 100644
--- a/lib/compressdev/rte_compressdev_internal.h
+++ b/lib/compressdev/rte_compressdev_internal.h
@@ -69,7 +69,7 @@ typedef uint16_t (*compressdev_enqueue_pkt_burst_t)(void *qp,
 		struct rte_comp_op **ops, uint16_t nb_ops);
 
 /** The data structure associated with each comp device. */
-struct rte_compressdev {
+struct __rte_cache_aligned rte_compressdev {
 	compressdev_dequeue_pkt_burst_t dequeue_burst;
 	/**< Pointer to PMD receive function */
 	compressdev_enqueue_pkt_burst_t enqueue_burst;
@@ -87,7 +87,7 @@ struct rte_compressdev {
 	__extension__
 	uint8_t attached : 1;
 	/**< Flag indicating the device is attached */
-} __rte_cache_aligned;
+};
 
 /**
  *
@@ -96,7 +96,7 @@ struct rte_compressdev {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_compressdev_data {
+struct __rte_cache_aligned rte_compressdev_data {
 	uint8_t dev_id;
 	/**< Compress device identifier */
 	int socket_id;
@@ -115,7 +115,7 @@ struct rte_compressdev_data {
 
 	void *dev_private;
 	/**< PMD-specific private data */
-} __rte_cache_aligned;
+};
 
 #ifdef __cplusplus
 }
-- 
1.8.3.1

[PATCH v7 34/39] cryptodev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/cryptodev/cryptodev_pmd.h      | 8 ++++----
 lib/cryptodev/rte_cryptodev_core.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 0732b35..6229ad4 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -61,7 +61,7 @@ struct rte_cryptodev_pmd_init_params {
  * This structure is safe to place in shared memory to be common among
  * different processes in a multi-process configuration.
  */
-struct rte_cryptodev_data {
+struct __rte_cache_aligned rte_cryptodev_data {
 	/** Device ID for this instance */
 	uint8_t dev_id;
 	/** Socket ID where memory is allocated */
@@ -82,10 +82,10 @@ struct rte_cryptodev_data {
 
 	/** PMD-specific private data */
 	void *dev_private;
-} __rte_cache_aligned;
+};
 
 /** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
+struct __rte_cache_aligned rte_cryptodev {
 	/** Pointer to PMD dequeue function. */
 	dequeue_pkt_burst_t dequeue_burst;
 	/** Pointer to PMD enqueue function. */
@@ -117,7 +117,7 @@ struct rte_cryptodev {
 	struct rte_cryptodev_cb_rcu *enq_cbs;
 	/** User application callback for post dequeue processing */
 	struct rte_cryptodev_cb_rcu *deq_cbs;
-} __rte_cache_aligned;
+};
 
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index 5de89d0..8d7e58d 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -40,7 +40,7 @@ struct rte_cryptodev_qpdata {
 	struct rte_cryptodev_cb_rcu *deq_cb;
 };
 
-struct rte_crypto_fp_ops {
+struct __rte_cache_aligned rte_crypto_fp_ops {
 	/** PMD enqueue burst function. */
 	enqueue_pkt_burst_t enqueue_burst;
 	/** PMD dequeue burst function. */
@@ -49,7 +49,7 @@ struct rte_crypto_fp_ops {
 	struct rte_cryptodev_qpdata qp;
 	/** Reserved for future ops. */
 	uintptr_t reserved[3];
-} __rte_cache_aligned;
+};
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-- 
1.8.3.1

[PATCH v7 35/39] dispatcher: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/dispatcher/rte_dispatcher.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/dispatcher/rte_dispatcher.c b/lib/dispatcher/rte_dispatcher.c
index f546d75..7934917 100644
--- a/lib/dispatcher/rte_dispatcher.c
+++ b/lib/dispatcher/rte_dispatcher.c
@@ -41,7 +41,7 @@ struct rte_dispatcher_finalizer {
 	void *finalize_data;
 };
 
-struct rte_dispatcher_lcore {
+struct __rte_cache_aligned rte_dispatcher_lcore {
 	uint8_t num_ports;
 	uint16_t num_handlers;
 	int32_t prio_count;
@@ -49,7 +49,7 @@ struct rte_dispatcher_lcore {
 	struct rte_dispatcher_handler handlers[EVD_MAX_HANDLERS];
 	struct rte_dispatcher_stats stats;
 	RTE_CACHE_GUARD;
-} __rte_cache_aligned;
+};
 
 struct rte_dispatcher {
 	uint8_t event_dev_id;
-- 
1.8.3.1

[PATCH v7 36/39] fib: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/fib/dir24_8.h | 4 +++-
 lib/fib/trie.h    | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h
index b0d1a40..6d350f7 100644
--- a/lib/fib/dir24_8.h
+++ b/lib/fib/dir24_8.h
@@ -6,6 +6,8 @@
 #ifndef _DIR24_8_H_
 #define _DIR24_8_H_
 
+#include <stdalign.h>
+
 #include <rte_prefetch.h>
 #include <rte_branch_prediction.h>
 
@@ -32,7 +34,7 @@ struct dir24_8_tbl {
 	uint64_t	*tbl8;		/**< tbl8 table. */
 	uint64_t	*tbl8_idxes;	/**< bitmap containing free tbl8 idxes*/
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline void *
diff --git a/lib/fib/trie.h b/lib/fib/trie.h
index 3cf161a..36ce1fd 100644
--- a/lib/fib/trie.h
+++ b/lib/fib/trie.h
@@ -6,6 +6,8 @@
 #ifndef _TRIE_H_
 #define _TRIE_H_
 
+#include <stdalign.h>
+
 /**
  * @file
  * RTE IPv6 Longest Prefix Match (LPM)
@@ -36,7 +38,7 @@ struct rte_trie_tbl {
 	uint32_t	*tbl8_pool;	/**< bitmap containing free tbl8 idxes*/
 	uint32_t	tbl8_pool_pos;
 	/* tbl24 table. */
-	__extension__ uint64_t	tbl24[0] __rte_cache_aligned;
+	__extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t	tbl24[0];
 };
 
 static inline uint32_t
-- 
1.8.3.1

[PATCH v7 37/39] gpudev: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/gpudev/gpudev_driver.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/gpudev/gpudev_driver.h b/lib/gpudev/gpudev_driver.h
index 0b1e7f2..37b6ae3 100644
--- a/lib/gpudev/gpudev_driver.h
+++ b/lib/gpudev/gpudev_driver.h
@@ -72,7 +72,7 @@ struct rte_gpu_mpshared {
 	RTE_ATOMIC(uint16_t) process_refcnt; /* Updated by this library. */
 };
 
-struct rte_gpu {
+struct __rte_cache_aligned rte_gpu {
 	/* Backing device. */
 	struct rte_device *device;
 	/* Data shared between processes. */
@@ -85,7 +85,7 @@ struct rte_gpu {
 	enum rte_gpu_state process_state; /* Updated by this library. */
 	/* Driver-specific private data for the running process. */
 	void *process_private;
-} __rte_cache_aligned;
+};
 
 __rte_internal
 struct rte_gpu *rte_gpu_get_by_name(const char *name);
-- 
1.8.3.1

[PATCH v7 38/39] graph: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/graph/graph_private.h           |  4 ++--
 lib/graph/graph_stats.c             |  4 ++--
 lib/graph/rte_graph.h               |  4 ++--
 lib/graph/rte_graph_worker_common.h | 17 ++++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/graph/graph_private.h b/lib/graph/graph_private.h
index 04538ea..d557d55 100644
--- a/lib/graph/graph_private.h
+++ b/lib/graph/graph_private.h
@@ -70,11 +70,11 @@ struct node {
  * Structure that holds the graph scheduling workqueue node stream.
  * Used for mcore dispatch model.
  */
-struct graph_mcore_dispatch_wq_node {
+struct __rte_cache_aligned graph_mcore_dispatch_wq_node {
 	rte_graph_off_t node_off;
 	uint16_t nb_objs;
 	void *objs[RTE_GRAPH_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
diff --git a/lib/graph/graph_stats.c b/lib/graph/graph_stats.c
index cc32245..2fb808b 100644
--- a/lib/graph/graph_stats.c
+++ b/lib/graph/graph_stats.c
@@ -28,7 +28,7 @@ struct cluster_node {
 	struct rte_node *nodes[];
 };
 
-struct rte_graph_cluster_stats {
+struct __rte_cache_aligned rte_graph_cluster_stats {
 	/* Header */
 	rte_graph_cluster_stats_cb_t fn;
 	uint32_t cluster_node_size; /* Size of struct cluster_node */
@@ -38,7 +38,7 @@ struct rte_graph_cluster_stats {
 	size_t sz;
 
 	struct cluster_node clusters[];
-} __rte_cache_aligned;
+};
 
 #define boarder_model_dispatch()                                                              \
 	fprintf(f, "+-------------------------------+---------------+--------" \
diff --git a/lib/graph/rte_graph.h b/lib/graph/rte_graph.h
index 2d37d5e..ecfec20 100644
--- a/lib/graph/rte_graph.h
+++ b/lib/graph/rte_graph.h
@@ -200,7 +200,7 @@ struct rte_graph_cluster_stats_param {
  *
  * @see struct rte_graph_cluster_stats_param::fn
  */
-struct rte_graph_cluster_node_stats {
+struct __rte_cache_aligned rte_graph_cluster_node_stats {
 	uint64_t ts;	    /**< Current timestamp. */
 	uint64_t calls;	    /**< Current number of calls made. */
 	uint64_t objs;      /**< Current number of objs processed. */
@@ -225,7 +225,7 @@ struct rte_graph_cluster_node_stats {
 	rte_node_t id;	/**< Node identifier of stats. */
 	uint64_t hz;	/**< Cycles per seconds. */
 	char name[RTE_NODE_NAMESIZE];	/**< Name of the node. */
-} __rte_cache_aligned;
+};
 
 /**
  * Create Graph.
diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_worker_common.h
index 4045a7a..36d864e 100644
--- a/lib/graph/rte_graph_worker_common.h
+++ b/lib/graph/rte_graph_worker_common.h
@@ -12,6 +12,8 @@
  * process, enqueue and move streams of objects to the next nodes.
  */
 
+#include <stdalign.h>
+
 #include <rte_common.h>
 #include <rte_cycles.h>
 #include <rte_prefetch.h>
@@ -43,7 +45,7 @@
  *
  * Data structure to hold graph data.
  */
-struct rte_graph {
+struct __rte_cache_aligned rte_graph {
 	/* Fast path area. */
 	uint32_t tail;		     /**< Tail of circular buffer. */
 	uint32_t head;		     /**< Head of circular buffer. */
@@ -57,7 +59,8 @@ struct rte_graph {
 	union {
 		/* Fast schedule area for mcore dispatch model */
 		struct {
-			struct rte_graph_rq_head *rq __rte_cache_aligned; /* The run-queue */
+			alignas(RTE_CACHE_LINE_SIZE) struct rte_graph_rq_head *rq;
+				/* The run-queue */
 			struct rte_graph_rq_head rq_head; /* The head for run-queue list */
 
 			unsigned int lcore_id;  /**< The graph running Lcore. */
@@ -77,14 +80,14 @@ struct rte_graph {
 	uint64_t nb_pkt_to_capture;
 	char pcap_filename[RTE_GRAPH_PCAP_FILE_SZ];  /**< Pcap filename. */
 	uint64_t fence;			/**< Fence. */
-} __rte_cache_aligned;
+};
 
 /**
  * @internal
  *
  * Data structure to hold node data.
  */
-struct rte_node {
+struct __rte_cache_aligned rte_node {
 	/* Slow path area  */
 	uint64_t fence;		/**< Fence. */
 	rte_graph_off_t next;	/**< Index to next node. */
@@ -109,7 +112,7 @@ struct rte_node {
 	};
 	/* Fast path area  */
 #define RTE_NODE_CTX_SZ 16
-	uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Context. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t ctx[RTE_NODE_CTX_SZ]; /**< Node Context. */
 	uint16_t size;		/**< Total number of objects available. */
 	uint16_t idx;		/**< Number of objects used. */
 	rte_graph_off_t off;	/**< Offset of node in the graph reel. */
@@ -124,8 +127,8 @@ struct rte_node {
 			rte_node_process_t process; /**< Process function. */
 			uint64_t process_u64;
 		};
-	struct rte_node *nodes[] __rte_cache_min_aligned; /**< Next nodes. */
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) struct rte_node *nodes[]; /**< Next nodes. */
+};
 
 /**
  * @internal
-- 
1.8.3.1

[PATCH v7 39/39] ip_frag: use C11 alignas

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

* Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
---
 lib/ip_frag/ip_reassembly.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ip_frag/ip_reassembly.h b/lib/ip_frag/ip_reassembly.h
index a9f97ae..5443c73 100644
--- a/lib/ip_frag/ip_reassembly.h
+++ b/lib/ip_frag/ip_reassembly.h
@@ -47,7 +47,7 @@ struct ip_frag_key {
  * Fragmented packet to reassemble.
  * First two entries in the frags[] array are for the last and first fragments.
  */
-struct ip_frag_pkt {
+struct __rte_cache_aligned ip_frag_pkt {
 	RTE_TAILQ_ENTRY(ip_frag_pkt) lru;      /* LRU list */
 	struct ip_frag_key key;                /* fragmentation key */
 	uint64_t start;                        /* creation timestamp */
@@ -55,20 +55,20 @@ struct ip_frag_pkt {
 	uint32_t frag_size;                    /* size of fragments received */
 	uint32_t last_idx;                     /* index of next entry to fill */
 	struct ip_frag frags[IP_MAX_FRAG_NUM]; /* fragments */
-} __rte_cache_aligned;
+};
 
  /* fragments tailq */
 RTE_TAILQ_HEAD(ip_pkt_list, ip_frag_pkt);
 
 /* fragmentation table statistics */
-struct ip_frag_tbl_stat {
+struct __rte_cache_aligned ip_frag_tbl_stat {
 	uint64_t find_num;     /* total # of find/insert attempts. */
 	uint64_t add_num;      /* # of add ops. */
 	uint64_t del_num;      /* # of del ops. */
 	uint64_t reuse_num;    /* # of reuse (del/add) ops. */
 	uint64_t fail_total;   /* total # of add failures. */
 	uint64_t fail_nospace; /* # of 'no space' add failures. */
-} __rte_cache_aligned;
+};
 
 /* fragmentation table */
 struct rte_ip_frag_tbl {
-- 
1.8.3.1

Re: [PATCH v7 08/39] mbuf: use C11 alignas

[David Marchand]

On Mon, Mar 4, 2024 at 6:54 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
>
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
>
> To allow alignment for both compilers do the following:
>
> * Move __rte_aligned from the end of {struct,union} definitions to
>   be between {struct,union} and tag.
>
>   The placement between {struct,union} and the tag allows the desired
>   alignment to be imparted on the type regardless of the toolchain being
>   used for all of GCC, LLVM, MSVC compilers building both C and C++.
>
> * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
>
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
> ---
>  lib/mbuf/rte_mbuf_core.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> index 5688683..917a811 100644
> --- a/lib/mbuf/rte_mbuf_core.h
> +++ b/lib/mbuf/rte_mbuf_core.h
> @@ -463,7 +463,7 @@ enum {
>  /**
>   * The generic rte_mbuf, containing a packet mbuf.
>   */
> -struct rte_mbuf {
> +struct __rte_cache_aligned rte_mbuf {
>         RTE_MARKER cacheline0;
>
>         void *buf_addr;           /**< Virtual address of segment buffer. */
> @@ -476,7 +476,7 @@ struct rte_mbuf {
>          * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
>          * working on vector drivers easier.
>          */
> -       rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> +       alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
>  #else
>         /**
>          * Next segment of scattered packet.
> @@ -662,7 +662,7 @@ struct rte_mbuf {
>         uint16_t timesync;
>
>         uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
> -} __rte_cache_aligned;
> +};

I probably missed the discussion, but why is cacheline1 not handled in
this patch?
I was expecting a:
-       RTE_MARKER cacheline1 __rte_cache_min_aligned;
+       alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;


-- 
David Marchand

Re: [PATCH v7 10/39] eventdev: use C11 alignas

[David Marchand]

On Mon, Mar 4, 2024 at 6:54 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
> diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
> index 3af4686..08e5f93 100644
> --- a/lib/eventdev/rte_eventdev.h
> +++ b/lib/eventdev/rte_eventdev.h
> @@ -1338,7 +1338,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
>  /**
>   * Event vector structure.
>   */
> -struct rte_event_vector {
> +struct __rte_aligned(16) rte_event_vector {
>         uint16_t nb_elem;
>         /**< Number of elements valid in this event vector. */
>         uint16_t elem_offset : 12;
> @@ -1376,23 +1376,19 @@ struct rte_event_vector {
>          * value to share between dequeue and enqueue operation.
>          * The application should not modify this field.
>          */
> -       union {
> +       union __rte_aligned(16) {
>  #endif
>                 struct rte_mbuf *mbufs[0];
>                 void *ptrs[0];
>                 uint64_t u64s[0];
>  #ifndef __cplusplus
> -       } __rte_aligned(16);
> +       };
>  #endif
>         /**< Start of the vector array union. Depending upon the event type the
>          * vector array can be an array of mbufs or pointers or opaque u64
>          * values.
>          */
> -#ifndef __DOXYGEN__
> -} __rte_aligned(16);
> -#else
>  };
> -#endif

This part was a strange construct.
I see nothing wrong with the change (doxygen passes fine), but just a
heads up to Jerin.


-- 
David Marchand

Re: [PATCH v7 08/39] mbuf: use C11 alignas

[Tyler Retzlaff]

On Tue, Mar 05, 2024 at 03:30:49PM +0100, David Marchand wrote:
> On Mon, Mar 4, 2024 at 6:54 PM Tyler Retzlaff
> <roretzla@linux.microsoft.com> wrote:
> >
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> >
> > For variables standard C11 offers alignas(a) supported by conformant
> > compilers i.e. both MSVC and GCC.
> >
> > For types the standard offers no alignment facility that compatibly
> > interoperates with C and C++ but may be achieved by relocating the
> > placement of __rte_aligned(a) to the aforementioned location accepted
> > by all currently supported toolchains.
> >
> > To allow alignment for both compilers do the following:
> >
> > * Move __rte_aligned from the end of {struct,union} definitions to
> >   be between {struct,union} and tag.
> >
> >   The placement between {struct,union} and the tag allows the desired
> >   alignment to be imparted on the type regardless of the toolchain being
> >   used for all of GCC, LLVM, MSVC compilers building both C and C++.
> >
> > * Replace use of __rte_aligned(a) on variables/fields with alignas(a).
> >
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > Acked-by: Konstantin Ananyev <konstantin.ananyev@huawei.com>
> > ---
> >  lib/mbuf/rte_mbuf_core.h | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> > index 5688683..917a811 100644
> > --- a/lib/mbuf/rte_mbuf_core.h
> > +++ b/lib/mbuf/rte_mbuf_core.h
> > @@ -463,7 +463,7 @@ enum {
> >  /**
> >   * The generic rte_mbuf, containing a packet mbuf.
> >   */
> > -struct rte_mbuf {
> > +struct __rte_cache_aligned rte_mbuf {
> >         RTE_MARKER cacheline0;
> >
> >         void *buf_addr;           /**< Virtual address of segment buffer. */
> > @@ -476,7 +476,7 @@ struct rte_mbuf {
> >          * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
> >          * working on vector drivers easier.
> >          */
> > -       rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> > +       alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
> >  #else
> >         /**
> >          * Next segment of scattered packet.
> > @@ -662,7 +662,7 @@ struct rte_mbuf {
> >         uint16_t timesync;
> >
> >         uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
> > -} __rte_cache_aligned;
> > +};
> 
> I probably missed the discussion, but why is cacheline1 not handled in
> this patch?
> I was expecting a:
> -       RTE_MARKER cacheline1 __rte_cache_min_aligned;
> +       alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;

I should have replaced it I just missed it. Could I get you to fix it up?
We have 2 options.

1. You can leave it as is, eventually the other series I have dealing
   with the markers I will probably remove the cacheline1 marker anyway.

2. You could adjust it as you've identified above, just move alignas
   before the field type and name.

If you want me to submit a v8 for this let me know I'll do it right
away.

Thanks!

> 
> 
> -- 
> David Marchand

Re: [PATCH v7 10/39] eventdev: use C11 alignas

[Tyler Retzlaff]

On Tue, Mar 05, 2024 at 04:47:05PM +0100, David Marchand wrote:
> On Mon, Mar 4, 2024 at 6:54 PM Tyler Retzlaff
> <roretzla@linux.microsoft.com> wrote:
> > diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
> > index 3af4686..08e5f93 100644
> > --- a/lib/eventdev/rte_eventdev.h
> > +++ b/lib/eventdev/rte_eventdev.h
> > @@ -1338,7 +1338,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
> >  /**
> >   * Event vector structure.
> >   */
> > -struct rte_event_vector {
> > +struct __rte_aligned(16) rte_event_vector {
> >         uint16_t nb_elem;
> >         /**< Number of elements valid in this event vector. */
> >         uint16_t elem_offset : 12;
> > @@ -1376,23 +1376,19 @@ struct rte_event_vector {
> >          * value to share between dequeue and enqueue operation.
> >          * The application should not modify this field.
> >          */
> > -       union {
> > +       union __rte_aligned(16) {
> >  #endif
> >                 struct rte_mbuf *mbufs[0];
> >                 void *ptrs[0];
> >                 uint64_t u64s[0];
> >  #ifndef __cplusplus
> > -       } __rte_aligned(16);
> > +       };
> >  #endif
> >         /**< Start of the vector array union. Depending upon the event type the
> >          * vector array can be an array of mbufs or pointers or opaque u64
> >          * values.
> >          */
> > -#ifndef __DOXYGEN__
> > -} __rte_aligned(16);
> > -#else
> >  };
> > -#endif
> 
> This part was a strange construct.
> I see nothing wrong with the change (doxygen passes fine), but just a
> heads up to Jerin.

So there was another series merged recently that added this __DOXYGEN__
conditional I'm just removing it again.

Bruce pointed out that one of the benefits of moving __rte_aligned(16)
between struct <tag> doxygen no longer gets confused.

https://mails.dpdk.org/archives/dev/2024-March/289231.html

> 
> 
> -- 
> David Marchand

Re: [PATCH v7 08/39] mbuf: use C11 alignas

[David Marchand]

On Tue, Mar 5, 2024 at 6:37 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
> > > diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h
> > > index 5688683..917a811 100644
> > > --- a/lib/mbuf/rte_mbuf_core.h
> > > +++ b/lib/mbuf/rte_mbuf_core.h
> > > @@ -463,7 +463,7 @@ enum {
> > >  /**
> > >   * The generic rte_mbuf, containing a packet mbuf.
> > >   */
> > > -struct rte_mbuf {
> > > +struct __rte_cache_aligned rte_mbuf {
> > >         RTE_MARKER cacheline0;
> > >
> > >         void *buf_addr;           /**< Virtual address of segment buffer. */
> > > @@ -476,7 +476,7 @@ struct rte_mbuf {
> > >          * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes
> > >          * working on vector drivers easier.
> > >          */
> > > -       rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t));
> > > +       alignas(sizeof(rte_iova_t)) rte_iova_t buf_iova;
> > >  #else
> > >         /**
> > >          * Next segment of scattered packet.
> > > @@ -662,7 +662,7 @@ struct rte_mbuf {
> > >         uint16_t timesync;
> > >
> > >         uint32_t dynfield1[9]; /**< Reserved for dynamic fields. */
> > > -} __rte_cache_aligned;
> > > +};
> >
> > I probably missed the discussion, but why is cacheline1 not handled in
> > this patch?
> > I was expecting a:
> > -       RTE_MARKER cacheline1 __rte_cache_min_aligned;
> > +       alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;
>
> I should have replaced it I just missed it. Could I get you to fix it up?
> We have 2 options.
>
> 1. You can leave it as is, eventually the other series I have dealing
>    with the markers I will probably remove the cacheline1 marker anyway.
>
> 2. You could adjust it as you've identified above, just move alignas
>    before the field type and name.

I like consistency, let's go with option 2.

I'll adjust as I mentionned, no need for a v8.
I already tested it in my builds.

Thanks.

-- 
David Marchand

Re: [PATCH v7 00/39] use C11 alignas

[David Marchand]

On Mon, Mar 4, 2024 at 6:53 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
>
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
>
> ** NOTE **
>
> Finally, In the interest of not creating more API (internal or not) the
> series does not introduce a wrapper for C11 alignas. If we don't introduce
> a macro an application can't take a dependency.

I have been looking into adding some check so that we catch new
introductions of __rte_*aligned calls...
Wdyt of:

diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
index c47ea59501..632397f42d 100755
--- a/devtools/checkpatches.sh
+++ b/devtools/checkpatches.sh
@@ -336,6 +336,21 @@ check_internal_tags() { # <patch>
        return $res
 }

+check_aligned_attributes() { # <patch>
+       res=0
+
+       for token in __rte_aligned __rte_cache_aligned
__rte_cache_min_aligned; do
+               if [ $(grep -E '^\+.*\<'$token'\>' "$1" | \
+                               grep -vE
'\<(struct|union)[[:space:]]*'$token'\>' | \
+                               wc -l) != 0 ]; then
+                       echo "Please only use $token for struct or
union types alignment."
+                       res=1
+               fi
+       done
+
+       return $res
+}
+
 check_release_notes() { # <patch>
        rel_notes_prefix=doc/guides/rel_notes/release_
        IFS=. read year month release < VERSION
@@ -445,6 +460,14 @@ check () { # <patch-file> <commit>
                ret=1
        fi

+       ! $verbose || printf '\nChecking alignment attributes:\n'
+       report=$(check_aligned_attributes "$tmpinput")
+       if [ $? -ne 0 ] ; then
+               $headline_printed || print_headline "$subject"
+               printf '%s\n' "$report"
+               ret=1
+       fi
+
        ! $verbose || printf '\nChecking release notes updates:\n'
        report=$(check_release_notes "$tmpinput")
        if [ $? -ne 0 ] ; then


-- 
David Marchand

Re: [PATCH v7 10/39] eventdev: use C11 alignas

[David Marchand]

On Tue, Mar 5, 2024 at 6:41 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> On Tue, Mar 05, 2024 at 04:47:05PM +0100, David Marchand wrote:
> > On Mon, Mar 4, 2024 at 6:54 PM Tyler Retzlaff
> > <roretzla@linux.microsoft.com> wrote:
> > > diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
> > > index 3af4686..08e5f93 100644
> > > --- a/lib/eventdev/rte_eventdev.h
> > > +++ b/lib/eventdev/rte_eventdev.h
> > > @@ -1338,7 +1338,7 @@ int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
> > >  /**
> > >   * Event vector structure.
> > >   */
> > > -struct rte_event_vector {
> > > +struct __rte_aligned(16) rte_event_vector {
> > >         uint16_t nb_elem;
> > >         /**< Number of elements valid in this event vector. */
> > >         uint16_t elem_offset : 12;
> > > @@ -1376,23 +1376,19 @@ struct rte_event_vector {
> > >          * value to share between dequeue and enqueue operation.
> > >          * The application should not modify this field.
> > >          */
> > > -       union {
> > > +       union __rte_aligned(16) {
> > >  #endif
> > >                 struct rte_mbuf *mbufs[0];
> > >                 void *ptrs[0];
> > >                 uint64_t u64s[0];
> > >  #ifndef __cplusplus
> > > -       } __rte_aligned(16);
> > > +       };
> > >  #endif
> > >         /**< Start of the vector array union. Depending upon the event type the
> > >          * vector array can be an array of mbufs or pointers or opaque u64
> > >          * values.
> > >          */
> > > -#ifndef __DOXYGEN__
> > > -} __rte_aligned(16);
> > > -#else
> > >  };
> > > -#endif
> >
> > This part was a strange construct.
> > I see nothing wrong with the change (doxygen passes fine), but just a
> > heads up to Jerin.
>
> So there was another series merged recently that added this __DOXYGEN__
> conditional I'm just removing it again.
>
> Bruce pointed out that one of the benefits of moving __rte_aligned(16)
> between struct <tag> doxygen no longer gets confused.
>
> https://mails.dpdk.org/archives/dev/2024-March/289231.html

Thanks, I had indeed missed this point.
So nothing wrong with the change, except maybe a mention in the
commitlog (that I'll handle myself).


-- 
David Marchand

Re: [PATCH v7 00/39] use C11 alignas

[David Marchand]

Hello Tyler,

On Mon, Mar 4, 2024 at 6:53 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> For variables standard C11 offers alignas(a) supported by conformant
> compilers i.e. both MSVC and GCC.
>
> For types the standard offers no alignment facility that compatibly
> interoperates with C and C++ but may be achieved by relocating the
> placement of __rte_aligned(a) to the aforementioned location accepted
> by all currently supported toolchains.
>
> ** NOTE **
>
> Finally, In the interest of not creating more API (internal or not) the
> series does not introduce a wrapper for C11 alignas. If we don't introduce
> a macro an application can't take a dependency.

I reorganised the commits since those were global/mechanical changes in lib/.

As part of the alignas() conversion, I updated the references to
__rte_*aligned in the documentation so that there is no "bad example"
in doc/.

I converted the cacheline1 field to alignas in the mbuf library, but
also in eventdev and security libraries.
With this, there is no remaining construct like struct|union { ... }
__rte_*aligned in lib/.

I added a check in checkpatches.sh so that we don't reintroduce
wrongly placed __rte_*aligned tags.
I made this check global (iow not restricted to lib/) so that
developers touching drivers/ and other parts of DPDK are made aware of
this change of use of __rte_*aligned tags.

Series applied.

-- 
David Marchand

Re: [PATCH v7 00/39] use C11 alignas

[Tyler Retzlaff]

On Wed, Mar 06, 2024 at 10:55:36AM +0100, David Marchand wrote:
> Hello Tyler,
> 
> On Mon, Mar 4, 2024 at 6:53 PM Tyler Retzlaff
> <roretzla@linux.microsoft.com> wrote:
> >
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> >
> > For variables standard C11 offers alignas(a) supported by conformant
> > compilers i.e. both MSVC and GCC.
> >
> > For types the standard offers no alignment facility that compatibly
> > interoperates with C and C++ but may be achieved by relocating the
> > placement of __rte_aligned(a) to the aforementioned location accepted
> > by all currently supported toolchains.
> >
> > ** NOTE **
> >
> > Finally, In the interest of not creating more API (internal or not) the
> > series does not introduce a wrapper for C11 alignas. If we don't introduce
> > a macro an application can't take a dependency.
> 
> I reorganised the commits since those were global/mechanical changes in lib/.
> 
> As part of the alignas() conversion, I updated the references to
> __rte_*aligned in the documentation so that there is no "bad example"
> in doc/.
> 
> I converted the cacheline1 field to alignas in the mbuf library, but
> also in eventdev and security libraries.
> With this, there is no remaining construct like struct|union { ... }
> __rte_*aligned in lib/.
> 
> I added a check in checkpatches.sh so that we don't reintroduce
> wrongly placed __rte_*aligned tags.
> I made this check global (iow not restricted to lib/) so that
> developers touching drivers/ and other parts of DPDK are made aware of
> this change of use of __rte_*aligned tags.
> 
> Series applied.

Great to have this done, thank you David!

> 
> -- 
> David Marchand