From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8189143B6A; Mon, 4 Mar 2024 18:56:56 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3492542EB5; Mon, 4 Mar 2024 18:53:33 +0100 (CET) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 0C805410E7 for ; Mon, 4 Mar 2024 18:52:53 +0100 (CET) Received: by linux.microsoft.com (Postfix, from userid 1086) id 29E69208490A; Mon, 4 Mar 2024 09:52:50 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 29E69208490A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1709574772; bh=Bt7wYT6/5SVDNGQZnQ/KW80P6rk2GfJkoY/4ChRxq4o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UNaO+/p4Wx32ljCgz0JEiNGrt13QCVJ0L9SGfp/NFZ93i+Iz6ank1sSmGvATW1mq1 AGpK9ZR8WevX85ezNaQlo9HXh0mDqyK2G/+D7sYVvsG0wry6cI1uQWag3ocRxKMCeL q40yPLJf/5/2D8E/ql955JKwmPuzN6dYZSZWF5PU= From: Tyler Retzlaff To: dev@dpdk.org Cc: Andrew Rybchenko , Bruce Richardson , Chengwen Feng , Cristian Dumitrescu , David Christensen , David Hunt , Ferruh Yigit , Honnappa Nagarahalli , Jasvinder Singh , Jerin Jacob , Kevin Laatz , Konstantin Ananyev , Min Zhou , Ruifeng Wang , Sameh Gobriel , Stanislaw Kardach , Thomas Monjalon , Vladimir Medvedkin , Yipeng Wang , Tyler Retzlaff Subject: [PATCH v7 36/39] fib: use C11 alignas Date: Mon, 4 Mar 2024 09:52:41 -0800 Message-Id: <1709574764-9041-37-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1709574764-9041-1-git-send-email-roretzla@linux.microsoft.com> References: <1707873986-29352-1-git-send-email-roretzla@linux.microsoft.com> <1709574764-9041-1-git-send-email-roretzla@linux.microsoft.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The current location used for __rte_aligned(a) for alignment of types and variables is not compatible with MSVC. There is only a single location accepted by both toolchains. For variables standard C11 offers alignas(a) supported by conformant compilers i.e. both MSVC and GCC. For types the standard offers no alignment facility that compatibly interoperates with C and C++ but may be achieved by relocating the placement of __rte_aligned(a) to the aforementioned location accepted by all currently supported toolchains. To allow alignment for both compilers do the following: * Move __rte_aligned from the end of {struct,union} definitions to be between {struct,union} and tag. The placement between {struct,union} and the tag allows the desired alignment to be imparted on the type regardless of the toolchain being used for all of GCC, LLVM, MSVC compilers building both C and C++. * Replace use of __rte_aligned(a) on variables/fields with alignas(a). Signed-off-by: Tyler Retzlaff Acked-by: Morten Brørup --- lib/fib/dir24_8.h | 4 +++- lib/fib/trie.h | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/fib/dir24_8.h b/lib/fib/dir24_8.h index b0d1a40..6d350f7 100644 --- a/lib/fib/dir24_8.h +++ b/lib/fib/dir24_8.h @@ -6,6 +6,8 @@ #ifndef _DIR24_8_H_ #define _DIR24_8_H_ +#include + #include #include @@ -32,7 +34,7 @@ struct dir24_8_tbl { uint64_t *tbl8; /**< tbl8 table. */ uint64_t *tbl8_idxes; /**< bitmap containing free tbl8 idxes*/ /* tbl24 table. */ - __extension__ uint64_t tbl24[0] __rte_cache_aligned; + __extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t tbl24[0]; }; static inline void * diff --git a/lib/fib/trie.h b/lib/fib/trie.h index 3cf161a..36ce1fd 100644 --- a/lib/fib/trie.h +++ b/lib/fib/trie.h @@ -6,6 +6,8 @@ #ifndef _TRIE_H_ #define _TRIE_H_ +#include + /** * @file * RTE IPv6 Longest Prefix Match (LPM) @@ -36,7 +38,7 @@ struct rte_trie_tbl { uint32_t *tbl8_pool; /**< bitmap containing free tbl8 idxes*/ uint32_t tbl8_pool_pos; /* tbl24 table. */ - __extension__ uint64_t tbl24[0] __rte_cache_aligned; + __extension__ alignas(RTE_CACHE_LINE_SIZE) uint64_t tbl24[0]; }; static inline uint32_t -- 1.8.3.1