* [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO
@ 2017-05-03 6:55 Shahaf Shuler
2017-05-03 6:59 ` Nélio Laranjeiro
2017-05-03 7:32 ` Adrien Mazarguil
0 siblings, 2 replies; 4+ messages in thread
From: Shahaf Shuler @ 2017-05-03 6:55 UTC (permalink / raw)
To: nelio.laranjeiro, adrien.mazarguil; +Cc: dev
When TSO is enabled, Verbs layer aggregates the TSO
inline size with the txq inline size for the Tx creation,
while the PMD takes the maximum among them.
Fixing it by adjusting the max inline parameter before
passing to to Verbs.
Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
drivers/net/mlx5/mlx5_txq.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index f80740a13..24bd8c615 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -230,6 +230,9 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
struct ibv_exp_cq_attr cq_attr;
} attr;
unsigned int cqe_n;
+ const unsigned int max_tso_inline = ((MLX5_MAX_TSO_HEADER +
+ (RTE_CACHE_LINE_SIZE - 1)) /
+ RTE_CACHE_LINE_SIZE);
int ret = 0;
if (mlx5_getenv_int("MLX5_ENABLE_CQE_COMPRESSION")) {
@@ -307,16 +310,22 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
priv->inline_max_packet_sz) +
(RTE_CACHE_LINE_SIZE - 1)) /
RTE_CACHE_LINE_SIZE) * RTE_CACHE_LINE_SIZE;
+ } else if (priv->tso) {
+ int inline_diff = tmpl.txq.max_inline - max_tso_inline;
+
+ /* Adjust inline value as Verbs aggregates
+ * tso_inline and txq_inline fields.
+ */
+ attr.init.cap.max_inline_data = inline_diff > 0 ?
+ inline_diff *
+ RTE_CACHE_LINE_SIZE :
+ 0;
} else {
attr.init.cap.max_inline_data =
tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
}
}
if (priv->tso) {
- uint16_t max_tso_inline = ((MLX5_MAX_TSO_HEADER +
- (RTE_CACHE_LINE_SIZE - 1)) /
- RTE_CACHE_LINE_SIZE);
-
attr.init.max_tso_header =
max_tso_inline * RTE_CACHE_LINE_SIZE;
attr.init.comp_mask |= IBV_EXP_QP_INIT_ATTR_MAX_TSO_HEADER;
--
2.12.0
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO
2017-05-03 6:55 [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO Shahaf Shuler
@ 2017-05-03 6:59 ` Nélio Laranjeiro
2017-05-05 15:44 ` Thomas Monjalon
2017-05-03 7:32 ` Adrien Mazarguil
1 sibling, 1 reply; 4+ messages in thread
From: Nélio Laranjeiro @ 2017-05-03 6:59 UTC (permalink / raw)
To: Shahaf Shuler; +Cc: adrien.mazarguil, dev
On Wed, May 03, 2017 at 09:55:35AM +0300, Shahaf Shuler wrote:
> When TSO is enabled, Verbs layer aggregates the TSO
> inline size with the txq inline size for the Tx creation,
> while the PMD takes the maximum among them.
>
> Fixing it by adjusting the max inline parameter before
> passing to to Verbs.
>
> Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
>
> Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
> Acked-by: Yongseok Koh <yskoh@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_txq.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
> index f80740a13..24bd8c615 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -230,6 +230,9 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
> struct ibv_exp_cq_attr cq_attr;
> } attr;
> unsigned int cqe_n;
> + const unsigned int max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> + (RTE_CACHE_LINE_SIZE - 1)) /
> + RTE_CACHE_LINE_SIZE);
> int ret = 0;
>
> if (mlx5_getenv_int("MLX5_ENABLE_CQE_COMPRESSION")) {
> @@ -307,16 +310,22 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
> priv->inline_max_packet_sz) +
> (RTE_CACHE_LINE_SIZE - 1)) /
> RTE_CACHE_LINE_SIZE) * RTE_CACHE_LINE_SIZE;
> + } else if (priv->tso) {
> + int inline_diff = tmpl.txq.max_inline - max_tso_inline;
> +
> + /* Adjust inline value as Verbs aggregates
> + * tso_inline and txq_inline fields.
> + */
> + attr.init.cap.max_inline_data = inline_diff > 0 ?
> + inline_diff *
> + RTE_CACHE_LINE_SIZE :
> + 0;
> } else {
> attr.init.cap.max_inline_data =
> tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
> }
> }
> if (priv->tso) {
> - uint16_t max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> - (RTE_CACHE_LINE_SIZE - 1)) /
> - RTE_CACHE_LINE_SIZE);
> -
> attr.init.max_tso_header =
> max_tso_inline * RTE_CACHE_LINE_SIZE;
> attr.init.comp_mask |= IBV_EXP_QP_INIT_ATTR_MAX_TSO_HEADER;
> --
> 2.12.0
>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
--
Nélio Laranjeiro
6WIND
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO
2017-05-03 6:59 ` Nélio Laranjeiro
@ 2017-05-05 15:44 ` Thomas Monjalon
0 siblings, 0 replies; 4+ messages in thread
From: Thomas Monjalon @ 2017-05-05 15:44 UTC (permalink / raw)
To: Shahaf Shuler; +Cc: dev, Nélio Laranjeiro, adrien.mazarguil
03/05/2017 08:59, Nélio Laranjeiro:
> On Wed, May 03, 2017 at 09:55:35AM +0300, Shahaf Shuler wrote:
> > When TSO is enabled, Verbs layer aggregates the TSO
> > inline size with the txq inline size for the Tx creation,
> > while the PMD takes the maximum among them.
> >
> > Fixing it by adjusting the max inline parameter before
> > passing to to Verbs.
> >
> > Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
> >
> > Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
> > Acked-by: Yongseok Koh <yskoh@mellanox.com>
>
> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Applied with minor fix (from Adrien comment), thanks
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO
2017-05-03 6:55 [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO Shahaf Shuler
2017-05-03 6:59 ` Nélio Laranjeiro
@ 2017-05-03 7:32 ` Adrien Mazarguil
1 sibling, 0 replies; 4+ messages in thread
From: Adrien Mazarguil @ 2017-05-03 7:32 UTC (permalink / raw)
To: Shahaf Shuler; +Cc: nelio.laranjeiro, dev
On Wed, May 03, 2017 at 09:55:35AM +0300, Shahaf Shuler wrote:
> When TSO is enabled, Verbs layer aggregates the TSO
> inline size with the txq inline size for the Tx creation,
> while the PMD takes the maximum among them.
>
> Fixing it by adjusting the max inline parameter before
> passing to to Verbs.
>
> Fixes: 3f13f8c23a7c ("net/mlx5: support hardware TSO")
>
> Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
> Acked-by: Yongseok Koh <yskoh@mellanox.com>
> ---
> drivers/net/mlx5/mlx5_txq.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
> index f80740a13..24bd8c615 100644
> --- a/drivers/net/mlx5/mlx5_txq.c
> +++ b/drivers/net/mlx5/mlx5_txq.c
> @@ -230,6 +230,9 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
> struct ibv_exp_cq_attr cq_attr;
> } attr;
> unsigned int cqe_n;
> + const unsigned int max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> + (RTE_CACHE_LINE_SIZE - 1)) /
> + RTE_CACHE_LINE_SIZE);
> int ret = 0;
>
> if (mlx5_getenv_int("MLX5_ENABLE_CQE_COMPRESSION")) {
> @@ -307,16 +310,22 @@ txq_ctrl_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl,
> priv->inline_max_packet_sz) +
> (RTE_CACHE_LINE_SIZE - 1)) /
> RTE_CACHE_LINE_SIZE) * RTE_CACHE_LINE_SIZE;
> + } else if (priv->tso) {
> + int inline_diff = tmpl.txq.max_inline - max_tso_inline;
> +
> + /* Adjust inline value as Verbs aggregates
> + * tso_inline and txq_inline fields.
> + */
Minor nit about this comment, the coding style should match the rest of the
file with "/*" alone on its own line.
> + attr.init.cap.max_inline_data = inline_diff > 0 ?
> + inline_diff *
> + RTE_CACHE_LINE_SIZE :
> + 0;
> } else {
> attr.init.cap.max_inline_data =
> tmpl.txq.max_inline * RTE_CACHE_LINE_SIZE;
> }
> }
> if (priv->tso) {
> - uint16_t max_tso_inline = ((MLX5_MAX_TSO_HEADER +
> - (RTE_CACHE_LINE_SIZE - 1)) /
> - RTE_CACHE_LINE_SIZE);
> -
> attr.init.max_tso_header =
> max_tso_inline * RTE_CACHE_LINE_SIZE;
> attr.init.comp_mask |= IBV_EXP_QP_INIT_ATTR_MAX_TSO_HEADER;
> --
> 2.12.0
>
--
Adrien Mazarguil
6WIND
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-05-03 6:55 [dpdk-dev] [PATCH] net/mlx5: fix Tx max inline with TSO Shahaf Shuler
2017-05-03 6:59 ` Nélio Laranjeiro
2017-05-05 15:44 ` Thomas Monjalon
2017-05-03 7:32 ` Adrien Mazarguil
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